* arm.md (addsi3_carryin_shift): Add missing register constraints.
From-SVN: r74694
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2003-12-16 Richard Earnshaw <rearnsha@arm.com>
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* arm.md (addsi3_carryin_shift): Add missing register constraints.
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2003-12-16 Loren James Rittle <ljrittle@acm.org>
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* testsuite/g++.old-deja/g++.eh/badalloc1.C: Tweak to
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@ -792,13 +792,13 @@
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)
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(define_insn "*addsi3_carryin_shift"
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[(set (match_operand:SI 0 "s_register_operand" "")
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[(set (match_operand:SI 0 "s_register_operand" "=r")
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(plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
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(plus:SI
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(match_operator:SI 2 "shift_operator"
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[(match_operand:SI 3 "s_register_operand" "")
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(match_operand:SI 4 "reg_or_int_operand" "")])
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(match_operand:SI 1 "s_register_operand" ""))))]
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[(match_operand:SI 3 "s_register_operand" "r")
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(match_operand:SI 4 "reg_or_int_operand" "rM")])
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(match_operand:SI 1 "s_register_operand" "r"))))]
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"TARGET_ARM"
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"adc%?\\t%0, %1, %3%S2"
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[(set_attr "conds" "use")]
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