i386.c (ix86_print_operand): Handle %~.
* config/i386/i386.c (ix86_print_operand): Handle %~. (ix86_print_operand_punct_valid_p): Return true also for '~'. * config/i386/sse.md (i128): New mode_attr. (vec_extract_hi_<mode>, vec_extract_hi_<mode>, avx_vbroadcastf128_<mode>, *avx_vperm2f128<mode>_full, *avx_vperm2f128<mode>_nozero, vec_set_lo_<mode>, vec_set_hi_<mode>, *vec_concat<mode>_avx): Use <i128> in the patterns, use "<sseinsnmode>" for "mode" attribute. (vec_extract_hi_v16hi, vec_extract_hi_v32qi, vec_set_lo_v16hi, vec_set_hi_v16hi, vec_set_lo_v32qi, vec_set_hi_v32qi): Use %~128 in the patterns, use "OI" for "mode" attribute. From-SVN: r179125
This commit is contained in:
parent
a7c0acd019
commit
1db4406e77
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@ -1,3 +1,17 @@
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2011-09-23 Jakub Jelinek <jakub@redhat.com>
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* config/i386/i386.c (ix86_print_operand): Handle %~.
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(ix86_print_operand_punct_valid_p): Return true also for '~'.
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* config/i386/sse.md (i128): New mode_attr.
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(vec_extract_hi_<mode>, vec_extract_hi_<mode>,
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avx_vbroadcastf128_<mode>, *avx_vperm2f128<mode>_full,
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*avx_vperm2f128<mode>_nozero, vec_set_lo_<mode>,
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vec_set_hi_<mode>, *vec_concat<mode>_avx): Use <i128> in the
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patterns, use "<sseinsnmode>" for "mode" attribute.
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(vec_extract_hi_v16hi, vec_extract_hi_v32qi, vec_set_lo_v16hi,
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vec_set_hi_v16hi, vec_set_lo_v32qi, vec_set_hi_v32qi): Use
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%~128 in the patterns, use "OI" for "mode" attribute.
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2011-09-23 Georg-Johann Lay <avr@gjlay.de>
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PR target/50447
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@ -13513,6 +13513,7 @@ get_some_local_dynamic_name (void)
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Y -- print condition for XOP pcom* instruction.
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+ -- print a branch hint as 'cs' or 'ds' prefix
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; -- print a semicolon (after prefixes due to bug in older gas).
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~ -- print "i" if TARGET_AVX2, "f" otherwise.
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@ -- print a segment register of thread base pointer load
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*/
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@ -14006,6 +14007,10 @@ ix86_print_operand (FILE *file, rtx x, int code)
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fputs ("gs", file);
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return;
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case '~':
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putc (TARGET_AVX2 ? 'i' : 'f', file);
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return;
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default:
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output_operand_lossage ("invalid operand code '%c'", code);
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}
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@ -14141,7 +14146,7 @@ static bool
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ix86_print_operand_punct_valid_p (unsigned char code)
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{
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return (code == '@' || code == '*' || code == '+'
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|| code == '&' || code == ';');
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|| code == '&' || code == ';' || code == '~');
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}
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/* Print a memory operand whose address is ADDR. */
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@ -293,6 +293,11 @@
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;; Instruction suffix for sign and zero extensions.
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(define_code_attr extsuffix [(sign_extend "sx") (zero_extend "zx")])
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;; i128 for integer vectors and TARGET_AVX2, f128 otherwise.
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(define_mode_attr i128
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[(V8SF "f128") (V4DF "f128") (V32QI "%~128") (V16HI "%~128")
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(V8SI "%~128") (V4DI "%~128")])
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;; Mix-n-match
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(define_mode_iterator AVX256MODE2P [V8SI V8SF V4DF])
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@ -3834,23 +3839,13 @@
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(match_operand:VI8F_256 1 "register_operand" "x,x")
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(parallel [(const_int 2) (const_int 3)])))]
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"TARGET_AVX"
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{
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if (get_attr_mode (insn) == MODE_OI)
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return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}";
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else
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return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}";
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}
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"vextract<i128>\t{$0x1, %1, %0|%0, %1, 0x1}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "memory" "none,store")
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(set_attr "prefix" "vex")
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(set (attr "mode")
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(if_then_else
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(and (match_test "TARGET_AVX2")
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(eq (const_string "<MODE>mode") (const_string "V4DImode")))
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(const_string "OI")
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(const_string "V4DF")))])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn_and_split "vec_extract_lo_<mode>"
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[(set (match_operand:<ssehalfvecmode> 0 "nonimmediate_operand" "=x,m")
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@ -3879,23 +3874,13 @@
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(parallel [(const_int 4) (const_int 5)
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(const_int 6) (const_int 7)])))]
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"TARGET_AVX"
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{
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if (get_attr_mode (insn) == MODE_OI)
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return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}";
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else
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return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}";
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}
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"vextract<i128>\t{$0x1, %1, %0|%0, %1, 0x1}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "memory" "none,store")
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(set_attr "prefix" "vex")
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(set (attr "mode")
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(if_then_else
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(and (match_test "TARGET_AVX2")
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(eq (const_string "<MODE>mode") (const_string "V8SImode")))
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(const_string "OI")
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(const_string "V8SF")))])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn_and_split "vec_extract_lo_v16hi"
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[(set (match_operand:V8HI 0 "nonimmediate_operand" "=x,m")
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@ -3928,21 +3913,13 @@
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(const_int 12) (const_int 13)
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(const_int 14) (const_int 15)])))]
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"TARGET_AVX"
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{
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if (get_attr_mode (insn) == MODE_OI)
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return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}";
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else
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return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}";
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}
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"vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "memory" "none,store")
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(set_attr "prefix" "vex")
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(set (attr "mode")
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(if_then_else (match_test "TARGET_AVX2")
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(const_string "OI")
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(const_string "V8SF")))])
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(set_attr "mode" "OI")])
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(define_insn_and_split "vec_extract_lo_v32qi"
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[(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m")
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@ -3983,21 +3960,13 @@
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(const_int 28) (const_int 29)
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(const_int 30) (const_int 31)])))]
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"TARGET_AVX"
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{
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if (get_attr_mode (insn) == MODE_OI)
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return "vextracti128\t{$0x1, %1, %0|%0, %1, 0x1}";
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else
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return "vextractf128\t{$0x1, %1, %0|%0, %1, 0x1}";
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}
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"vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "memory" "none,store")
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(set_attr "prefix" "vex")
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(set (attr "mode")
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(if_then_else (match_test "TARGET_AVX2")
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(const_string "OI")
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(const_string "V8SF")))])
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(set_attr "mode" "OI")])
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(define_insn_and_split "*sse4_1_extractps"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=rm,x,x")
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@ -11612,14 +11581,14 @@
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(match_dup 1)))]
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"TARGET_AVX"
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"@
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vbroadcastf128\t{%1, %0|%0, %1}
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vinsertf128\t{$1, %1, %0, %0|%0, %0, %1, 1}
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vperm2f128\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}"
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vbroadcast<i128>\t{%1, %0|%0, %1}
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vinsert<i128>\t{$1, %1, %0, %0|%0, %0, %1, 1}
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vperm2<i128>\t{$0, %t1, %t1, %0|%0, %t1, %t1, 0}"
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[(set_attr "type" "ssemov,sselog1,sselog1")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "0,1,1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V4SF,V8SF,V8SF")])
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(set_attr "mode" "<sseinsnmode>")])
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;; Recognize broadcast as a vec_select as produced by builtin_vec_perm.
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;; If it so happens that the input is in memory, use vbroadcast.
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@ -11813,12 +11782,12 @@
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(match_operand:SI 3 "const_0_to_255_operand" "n")]
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UNSPEC_VPERMIL2F128))]
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"TARGET_AVX"
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"vperm2f128\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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"vperm2<i128>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "*avx_vperm2f128<mode>_nozero"
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[(set (match_operand:AVX256MODE2P 0 "register_operand" "=x")
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@ -11833,13 +11802,13 @@
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{
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int mask = avx_vperm2f128_parallel (operands[3], <MODE>mode) - 1;
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operands[3] = GEN_INT (mask);
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return "vperm2f128\t{%3, %2, %1, %0|%0, %1, %2, %3}";
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return "vperm2<i128>\t{%3, %2, %1, %0|%0, %1, %2, %3}";
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}
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_expand "avx_vinsertf128<mode>"
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[(match_operand:V_256 0 "register_operand" "")
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@ -11904,12 +11873,12 @@
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(match_operand:VI8F_256 1 "register_operand" "x")
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(parallel [(const_int 2) (const_int 3)]))))]
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"TARGET_AVX"
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"vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"
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"vinsert<i128>\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V4DF")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "vec_set_hi_<mode>"
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[(set (match_operand:VI8F_256 0 "register_operand" "=x")
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@ -11919,12 +11888,12 @@
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(parallel [(const_int 0) (const_int 1)]))
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(match_operand:<ssehalfvecmode> 2 "nonimmediate_operand" "xm")))]
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"TARGET_AVX"
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"vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"
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"vinsert<i128>\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V4DF")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "vec_set_lo_<mode>"
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[(set (match_operand:VI4F_256 0 "register_operand" "=x")
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@ -11935,12 +11904,12 @@
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(parallel [(const_int 4) (const_int 5)
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(const_int 6) (const_int 7)]))))]
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"TARGET_AVX"
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"vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"
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"vinsert<i128>\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "vec_set_hi_<mode>"
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[(set (match_operand:VI4F_256 0 "register_operand" "=x")
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@ -11951,12 +11920,12 @@
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(const_int 2) (const_int 3)]))
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(match_operand:<ssehalfvecmode> 2 "nonimmediate_operand" "xm")))]
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"TARGET_AVX"
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"vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"
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"vinsert<i128>\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "vec_set_lo_v16hi"
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[(set (match_operand:V16HI 0 "register_operand" "=x")
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|
@ -11969,12 +11938,12 @@
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(const_int 12) (const_int 13)
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(const_int 14) (const_int 15)]))))]
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"TARGET_AVX"
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"vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"
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"vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "OI")])
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(define_insn "vec_set_hi_v16hi"
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[(set (match_operand:V16HI 0 "register_operand" "=x")
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|
@ -11987,12 +11956,12 @@
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(const_int 6) (const_int 7)]))
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(match_operand:V8HI 2 "nonimmediate_operand" "xm")))]
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"TARGET_AVX"
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"vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"
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"vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "OI")])
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(define_insn "vec_set_lo_v32qi"
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[(set (match_operand:V32QI 0 "register_operand" "=x")
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|
@ -12009,12 +11978,12 @@
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(const_int 28) (const_int 29)
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(const_int 30) (const_int 31)]))))]
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"TARGET_AVX"
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"vinsertf128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"
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"vinsert%~128\t{$0x0, %2, %1, %0|%0, %1, %2, 0x0}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "OI")])
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(define_insn "vec_set_hi_v32qi"
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[(set (match_operand:V32QI 0 "register_operand" "=x")
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|
@ -12031,12 +12000,12 @@
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(const_int 14) (const_int 15)]))
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(match_operand:V16QI 2 "nonimmediate_operand" "xm")))]
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"TARGET_AVX"
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"vinsertf128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"
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"vinsert%~128\t{$0x1, %2, %1, %0|%0, %1, %2, 0x1}"
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[(set_attr "type" "sselog")
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(set_attr "prefix_extra" "1")
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(set_attr "length_immediate" "1")
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(set_attr "prefix" "vex")
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(set_attr "mode" "V8SF")])
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(set_attr "mode" "OI")])
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(define_expand "<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>"
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[(set (match_operand:V48_AVX2 0 "register_operand" "")
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|
@ -12417,7 +12386,7 @@
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|||
switch (which_alternative)
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{
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case 0:
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return "vinsertf128\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}";
|
||||
return "vinsert<i128>\t{$0x1, %2, %t1, %0|%0, %t1, %2, 0x1}";
|
||||
case 1:
|
||||
switch (get_attr_mode (insn))
|
||||
{
|
||||
|
|
Loading…
Reference in New Issue