Revert "Add the member integer_to_sse to processor_cost as a cost simulation for movd/pinsrd. It will be used to calculate the cost of vec_construct."
This reverts commit 872da9a6f6.
PR target/101936
PR target/101929
This commit is contained in:
liuhongt
parent
6e529985d8
commit
1db70e61a9
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@ -22203,11 +22203,7 @@ ix86_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost,
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case vec_construct:
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{
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/* N element inserts into SSE vectors. */
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int cost
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= TYPE_VECTOR_SUBPARTS (vectype) * (fp ?
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ix86_cost->sse_op
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: ix86_cost->integer_to_sse);
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int cost = TYPE_VECTOR_SUBPARTS (vectype) * ix86_cost->sse_op;
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/* One vinserti128 for combining two SSE vectors for AVX256. */
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if (GET_MODE_BITSIZE (mode) == 256)
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cost += ix86_vec_cost (mode, ix86_cost->addss);
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@ -165,7 +165,6 @@ struct processor_costs {
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const int xmm_move, ymm_move, /* cost of moving XMM and YMM register. */
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zmm_move;
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const int sse_to_integer; /* cost of moving SSE register to integer. */
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const int integer_to_sse; /* cost of moving integer to SSE register. */
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const int gather_static, gather_per_elt; /* Cost of gather load is computed
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as static + per_item * nelts. */
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const int scatter_static, scatter_per_elt; /* Cost of gather store is
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@ -102,7 +102,6 @@ struct processor_costs ix86_size_cost = {/* costs for tuning for size */
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in 128bit, 256bit and 512bit */
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3, 3, 3, /* cost of moving XMM,YMM,ZMM register */
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3, /* cost of moving SSE register to integer. */
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COSTS_N_BYTES (2), /* cost of moving integer to sse register. */
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5, 0, /* Gather load static, per_elt. */
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5, 0, /* Gather store static, per_elt. */
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0, /* size of l1 cache */
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@ -212,7 +211,6 @@ struct processor_costs i386_cost = { /* 386 specific costs */
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{4, 8, 16, 32, 64}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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3, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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4, 4, /* Gather load static, per_elt. */
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4, 4, /* Gather store static, per_elt. */
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0, /* size of l1 cache */
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@ -321,7 +319,6 @@ struct processor_costs i486_cost = { /* 486 specific costs */
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{4, 8, 16, 32, 64}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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3, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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4, 4, /* Gather load static, per_elt. */
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4, 4, /* Gather store static, per_elt. */
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4, /* size of l1 cache. 486 has 8kB cache
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@ -432,7 +429,6 @@ struct processor_costs pentium_cost = {
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{4, 8, 16, 32, 64}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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3, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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4, 4, /* Gather load static, per_elt. */
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4, 4, /* Gather store static, per_elt. */
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8, /* size of l1 cache. */
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@ -534,7 +530,6 @@ struct processor_costs lakemont_cost = {
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{4, 8, 16, 32, 64}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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3, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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4, 4, /* Gather load static, per_elt. */
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4, 4, /* Gather store static, per_elt. */
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8, /* size of l1 cache. */
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@ -651,7 +646,6 @@ struct processor_costs pentiumpro_cost = {
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{4, 8, 16, 32, 64}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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3, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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4, 4, /* Gather load static, per_elt. */
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4, 4, /* Gather store static, per_elt. */
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8, /* size of l1 cache. */
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@ -759,7 +753,6 @@ struct processor_costs geode_cost = {
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{2, 2, 8, 16, 32}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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6, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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2, 2, /* Gather load static, per_elt. */
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2, 2, /* Gather store static, per_elt. */
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64, /* size of l1 cache. */
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@ -867,7 +860,6 @@ struct processor_costs k6_cost = {
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{2, 2, 8, 16, 32}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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6, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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2, 2, /* Gather load static, per_elt. */
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2, 2, /* Gather store static, per_elt. */
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32, /* size of l1 cache. */
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@ -981,7 +973,6 @@ struct processor_costs athlon_cost = {
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{4, 4, 10, 10, 20}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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5, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (2), /* cost of moving integer to sse register. */
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4, 4, /* Gather load static, per_elt. */
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4, 4, /* Gather store static, per_elt. */
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64, /* size of l1 cache. */
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@ -1097,7 +1088,6 @@ struct processor_costs k8_cost = {
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{4, 4, 10, 10, 20}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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5, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (2), /* cost of moving integer to sse register. */
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4, 4, /* Gather load static, per_elt. */
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4, 4, /* Gather store static, per_elt. */
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64, /* size of l1 cache. */
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@ -1226,7 +1216,6 @@ struct processor_costs amdfam10_cost = {
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{4, 4, 5, 10, 20}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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3, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (2), /* cost of moving integer to sse register. */
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4, 4, /* Gather load static, per_elt. */
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4, 4, /* Gather store static, per_elt. */
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64, /* size of l1 cache. */
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@ -1347,7 +1336,6 @@ const struct processor_costs bdver_cost = {
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{10, 10, 10, 40, 60}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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16, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (2), /* cost of moving integer to sse register. */
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12, 12, /* Gather load static, per_elt. */
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10, 10, /* Gather store static, per_elt. */
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16, /* size of l1 cache. */
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@ -1489,7 +1477,6 @@ struct processor_costs znver1_cost = {
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{8, 8, 8, 16, 32}, /* cost of unaligned stores. */
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2, 3, 6, /* cost of moving XMM,YMM,ZMM register. */
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6, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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/* VGATHERDPD is 23 uops and throughput is 9, VGATHERDPD is 35 uops,
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throughput 12. Approx 9 uops do not depend on vector size and every load
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is 7 uops. */
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@ -1646,7 +1633,6 @@ struct processor_costs znver2_cost = {
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2, 2, 3, /* cost of moving XMM,YMM,ZMM
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register. */
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6, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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/* VGATHERDPD is 23 uops and throughput is 9, VGATHERDPD is 35 uops,
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throughput 12. Approx 9 uops do not depend on vector size and every load
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is 7 uops. */
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@ -1779,7 +1765,6 @@ struct processor_costs znver3_cost = {
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2, 2, 3, /* cost of moving XMM,YMM,ZMM
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register. */
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6, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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/* VGATHERDPD is 15 uops and throughput is 4, VGATHERDPS is 23 uops,
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throughput 9. Approx 7 uops do not depend on vector size and every load
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is 4 uops. */
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@ -1924,7 +1909,6 @@ struct processor_costs skylake_cost = {
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{8, 8, 8, 8, 16}, /* cost of unaligned stores. */
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2, 2, 4, /* cost of moving XMM,YMM,ZMM register */
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6, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (2)+1, /* cost of moving integer to sse register. */
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20, 8, /* Gather load static, per_elt. */
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22, 10, /* Gather store static, per_elt. */
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64, /* size of l1 cache. */
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@ -2051,7 +2035,6 @@ struct processor_costs icelake_cost = {
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{8, 8, 8, 8, 16}, /* cost of unaligned stores. */
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2, 2, 4, /* cost of moving XMM,YMM,ZMM register */
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6, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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20, 8, /* Gather load static, per_elt. */
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22, 10, /* Gather store static, per_elt. */
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64, /* size of l1 cache. */
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@ -2165,7 +2148,6 @@ const struct processor_costs btver1_cost = {
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{10, 10, 12, 48, 96}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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14, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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10, 10, /* Gather load static, per_elt. */
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10, 10, /* Gather store static, per_elt. */
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32, /* size of l1 cache. */
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@ -2276,7 +2258,6 @@ const struct processor_costs btver2_cost = {
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{10, 10, 12, 48, 96}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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14, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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10, 10, /* Gather load static, per_elt. */
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10, 10, /* Gather store static, per_elt. */
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32, /* size of l1 cache. */
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@ -2386,7 +2367,6 @@ struct processor_costs pentium4_cost = {
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{32, 32, 32, 64, 128}, /* cost of unaligned stores. */
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12, 24, 48, /* cost of moving XMM,YMM,ZMM register */
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20, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (2), /* cost of moving integer to sse register. */
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16, 16, /* Gather load static, per_elt. */
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16, 16, /* Gather store static, per_elt. */
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8, /* size of l1 cache. */
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@ -2499,7 +2479,6 @@ struct processor_costs nocona_cost = {
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{24, 24, 24, 48, 96}, /* cost of unaligned stores. */
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6, 12, 24, /* cost of moving XMM,YMM,ZMM register */
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20, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (2), /* cost of moving integer to sse register. */
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12, 12, /* Gather load static, per_elt. */
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12, 12, /* Gather store static, per_elt. */
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8, /* size of l1 cache. */
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@ -2610,7 +2589,6 @@ struct processor_costs atom_cost = {
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{16, 16, 16, 32, 64}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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8, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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8, 8, /* Gather load static, per_elt. */
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8, 8, /* Gather store static, per_elt. */
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32, /* size of l1 cache. */
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@ -2721,7 +2699,6 @@ struct processor_costs slm_cost = {
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{16, 16, 16, 32, 64}, /* cost of unaligned stores. */
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2, 4, 8, /* cost of moving XMM,YMM,ZMM register */
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8, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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8, 8, /* Gather load static, per_elt. */
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8, 8, /* Gather store static, per_elt. */
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32, /* size of l1 cache. */
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@ -2832,7 +2809,6 @@ struct processor_costs intel_cost = {
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{10, 10, 10, 10, 10}, /* cost of unaligned loads. */
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2, 2, 2, /* cost of moving XMM,YMM,ZMM register */
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4, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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6, 6, /* Gather load static, per_elt. */
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6, 6, /* Gather store static, per_elt. */
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32, /* size of l1 cache. */
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@ -2950,7 +2926,6 @@ struct processor_costs generic_cost = {
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{6, 6, 6, 10, 15}, /* cost of unaligned storess. */
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2, 3, 4, /* cost of moving XMM,YMM,ZMM register */
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6, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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18, 6, /* Gather load static, per_elt. */
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18, 6, /* Gather store static, per_elt. */
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32, /* size of l1 cache. */
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@ -3074,7 +3049,6 @@ struct processor_costs core_cost = {
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{6, 6, 6, 6, 12}, /* cost of unaligned stores. */
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2, 2, 4, /* cost of moving XMM,YMM,ZMM register */
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2, /* cost of moving SSE register to integer. */
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COSTS_N_INSNS (1), /* cost of moving integer to sse register. */
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/* VGATHERDPD is 7 uops, rec throughput 5, while VGATHERDPD is 9 uops,
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rec. throughput 6.
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So 5 uops statically and one uops per load. */
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@ -1,7 +1,7 @@
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/* PR target/99881. */
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/* { dg-do compile { target { ! ia32 } } } */
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/* { dg-options "-Ofast -march=skylake" } */
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/* { dg-final { scan-assembler-not "xmm\[0-9\]" } } */
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/* { dg-final { scan-assembler-not "xmm\[0-9\]" { xfail *-*-* } } } */
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void
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foo (int* __restrict a, int n, int c)
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