Enable TARGET_TSXLDTRK for GCC support.
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
* config.gcc: Add tsxldtrkintrin.h to extra_headers.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
TSXLDTRK.
* config/i386/i386-builtin.def: Add new builtins.
* config/i386/i386-c.c (ix86_target_macros_internal): Define
__TSXLDTRK__.
* config/i386/i386-options.c (ix86_target_string): Add
-mtsxldtrk.
(ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
* config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
New.
* config/i386/i386.md (define_c_enum "unspec"): Add
UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
(TSXLDTRK): New define_int_iterator.
("<tsxldtrk>"): New define_insn.
* config/i386/i386.opt: Add -mtsxldtrk.
* config/i386/immintrin.h: Include tsxldtrkintrin.h.
* config/i386/tsxldtrkintrin.h: New.
* doc/invoke.texi: Document -mtsxldtrk.
gcc/testsuite/
* g++.dg/other/i386-2.c: Add -mtsxldtrk.
* g++.dg/other/i386-3.c: Likewise.
* gcc.target/i386/sse-12.c: Likewise.
* gcc.target/i386/sse-13.c: Likewise.
* gcc.target/i386/sse-14.c: Likewise.
* gcc.target/i386/sse-22.c: Likewsie.
* gcc.target/i386/sse-23.c: Likewise.
* gcc.target/i386/tsxldtrk-1.c: New test.
* gcc.target/i386/funcspec-56.inc: Add target attribute tests
for tsxldtrk.
This commit is contained in:
liuhongt
parent
b4ace720e0
commit
1e47cb3597
@ -159,6 +159,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA2_CLDEMOTE_SET OPTION_MASK_ISA2_CLDEMOTE
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#define OPTION_MASK_ISA2_ENQCMD_SET OPTION_MASK_ISA2_ENQCMD
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#define OPTION_MASK_ISA2_SERIALIZE_SET OPTION_MASK_ISA2_SERIALIZE
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#define OPTION_MASK_ISA2_TSXLDTRK_SET OPTION_MASK_ISA2_TSXLDTRK
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/* Define a set of ISAs which aren't available when a given ISA is
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disabled. MMX and SSE ISAs are handled separately. */
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@ -244,6 +245,7 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA2_ENQCMD_UNSET OPTION_MASK_ISA2_ENQCMD
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#define OPTION_MASK_ISA2_SERIALIZE_UNSET OPTION_MASK_ISA2_SERIALIZE
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#define OPTION_MASK_ISA2_AVX512VP2INTERSECT_UNSET OPTION_MASK_ISA2_AVX512VP2INTERSECT
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#define OPTION_MASK_ISA2_TSXLDTRK_UNSET OPTION_MASK_ISA2_TSXLDTRK
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/* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same
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as -mno-sse4.1. */
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@ -915,6 +917,19 @@ ix86_handle_option (struct gcc_options *opts,
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}
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return true;
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case OPT_mtsxldtrk:
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if (value)
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{
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opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_TSXLDTRK_SET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_TSXLDTRK_SET;
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}
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else
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{
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opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_TSXLDTRK_UNSET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_TSXLDTRK_UNSET;
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}
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return true;
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case OPT_mfma:
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if (value)
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{
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@ -414,7 +414,8 @@ i[34567]86-*-*)
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pconfigintrin.h wbnoinvdintrin.h movdirintrin.h
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waitpkgintrin.h cldemoteintrin.h avx512bf16vlintrin.h
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avx512bf16intrin.h enqcmdintrin.h serializeintrin.h
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avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h"
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avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h
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tsxldtrkintrin.h"
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;;
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x86_64-*-*)
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cpu_type=i386
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@ -448,7 +449,8 @@ x86_64-*-*)
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pconfigintrin.h wbnoinvdintrin.h movdirintrin.h
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waitpkgintrin.h cldemoteintrin.h avx512bf16vlintrin.h
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avx512bf16intrin.h enqcmdintrin.h serializeintrin.h
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avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h"
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avx512vp2intersectintrin.h avx512vp2intersectvlintrin.h
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tsxldtrkintrin.h"
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;;
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ia64-*-*)
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extra_headers=ia64intrin.h
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@ -123,6 +123,8 @@
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#define bit_IBT (1 << 20)
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#define bit_PCONFIG (1 << 18)
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#define bit_SERIALIZE (1 << 14)
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#define bit_TSXLDTRK (1 << 16)
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/* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */
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#define bit_BNDREGS (1 << 3)
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#define bit_BNDCSR (1 << 4)
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@ -430,6 +430,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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unsigned int has_cldemote = 0;
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unsigned int has_avx512bf16 = 0;
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unsigned int has_serialize = 0;
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unsigned int has_tsxldtrk = 0;
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unsigned int has_ptwrite = 0;
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@ -536,6 +537,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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has_avx5124fmaps = edx & bit_AVX5124FMAPS;
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has_avx512vp2intersect = edx & bit_AVX512VP2INTERSECT;
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has_serialize = edx & bit_SERIALIZE;
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has_tsxldtrk = edx & bit_TSXLDTRK;
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has_shstk = ecx & bit_SHSTK;
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has_pconfig = edx & bit_PCONFIG;
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@ -1157,6 +1159,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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const char *vaes = has_vaes ? " -mvaes" : " -mno-vaes";
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const char *vpclmulqdq = has_vpclmulqdq ? " -mvpclmulqdq" : " -mno-vpclmulqdq";
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const char *avx512vp2intersect = has_avx512vp2intersect ? " -mavx512vp2intersect" : " -mno-avx512vp2intersect";
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const char *tsxldtrk = has_tsxldtrk ? " -mtsxldtrk " : " -mno-tsxldtrk";
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const char *avx512bitalg = has_avx512bitalg ? " -mavx512bitalg" : " -mno-avx512bitalg";
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const char *movdiri = has_movdiri ? " -mmovdiri" : " -mno-movdiri";
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const char *movdir64b = has_movdir64b ? " -mmovdir64b" : " -mno-movdir64b";
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@ -1181,7 +1184,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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avx512vbmi2, avx512vnni, vaes, vpclmulqdq,
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avx512bitalg, movdiri, movdir64b, waitpkg, cldemote,
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ptwrite, avx512bf16, enqcmd, avx512vp2intersect,
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serialize, NULL);
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serialize, tsxldtrk, NULL);
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}
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done:
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@ -448,6 +448,9 @@ BDESC (0, OPTION_MASK_ISA2_ENQCMD, CODE_FOR_nothing, "__builtin_ia32_enqcmds", I
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/* SERIALIZE */
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BDESC (0, OPTION_MASK_ISA2_SERIALIZE, CODE_FOR_serialize, "__builtin_ia32_serialize", IX86_BUILTIN_SERIALIZE, UNKNOWN, (int) VOID_FTYPE_VOID)
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/* TSXLDTRK */
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BDESC (0, OPTION_MASK_ISA2_TSXLDTRK, CODE_FOR_xsusldtrk, "__builtin_ia32_xsusldtrk", IX86_BUILTIN_XSUSLDTRK, UNKNOWN, (int) VOID_FTYPE_VOID)
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BDESC (0, OPTION_MASK_ISA2_TSXLDTRK, CODE_FOR_xresldtrk, "__builtin_ia32_xresldtrk", IX86_BUILTIN_XRESLDTRK, UNKNOWN, (int) VOID_FTYPE_VOID)
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BDESC_END (SPECIAL_ARGS, ARGS)
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@ -571,6 +571,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
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def_or_undef (parse_in, "__MMX_WITH_SSE__");
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if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD)
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def_or_undef (parse_in, "__ENQCMD__");
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if (isa_flag2 & OPTION_MASK_ISA2_TSXLDTRK)
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def_or_undef (parse_in, "__TSXLDTRK__");
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if (TARGET_IAMCU)
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{
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def_or_undef (parse_in, "__iamcu");
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@ -206,7 +206,8 @@ static struct ix86_target_opts isa2_opts[] =
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{ "-mptwrite", OPTION_MASK_ISA2_PTWRITE },
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{ "-mavx512bf16", OPTION_MASK_ISA2_AVX512BF16 },
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{ "-menqcmd", OPTION_MASK_ISA2_ENQCMD },
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{ "-mserialize", OPTION_MASK_ISA2_SERIALIZE }
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{ "-mserialize", OPTION_MASK_ISA2_SERIALIZE },
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{ "-mtsxldtrk", OPTION_MASK_ISA2_TSXLDTRK }
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};
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static struct ix86_target_opts isa_opts[] =
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{
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@ -1019,6 +1020,7 @@ ix86_valid_target_attribute_inner_p (tree fndecl, tree args, char *p_strings[],
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IX86_ATTR_ISA ("avx512bf16", OPT_mavx512bf16),
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IX86_ATTR_ISA ("enqcmd", OPT_menqcmd),
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IX86_ATTR_ISA ("serialize", OPT_mserialize),
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IX86_ATTR_ISA ("tsxldtrk", OPT_mtsxldtrk),
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/* enum options */
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IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_),
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@ -201,6 +201,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#define TARGET_ENQCMD_P(x) TARGET_ISA2_ENQCMD_P(x)
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#define TARGET_SERIALIZE TARGET_ISA2_SERIALIZE
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#define TARGET_SERIALIZE_P(x) TARGET_ISA2_SERIALIZE_P(x)
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#define TARGET_TSXLDTRK TARGET_ISA2_TSXLDTRK
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#define TARGET_TSXLDTRK_P(x) TARGET_ISA2_TSXLDTRK_P(x)
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#define TARGET_LP64 TARGET_ABI_64
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#define TARGET_LP64_P(x) TARGET_ABI_64_P(x)
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@ -284,6 +284,10 @@
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UNSPECV_MOVDIRI
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UNSPECV_MOVDIR64B
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;; For TSXLDTRK support
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UNSPECV_XSUSLDTRK
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UNSPECV_XRESLDTRK
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;; For WAITPKG support
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UNSPECV_UMWAIT
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UNSPECV_UMONITOR
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@ -21158,6 +21162,17 @@
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"movdir64b\t{%1, %0|%0, %1}"
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[(set_attr "type" "other")])
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;; TSXLDTRK
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(define_int_iterator TSXLDTRK [UNSPECV_XSUSLDTRK UNSPECV_XRESLDTRK])
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(define_int_attr tsxldtrk [(UNSPECV_XSUSLDTRK "xsusldtrk")
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(UNSPECV_XRESLDTRK "xresldtrk")])
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(define_insn "<tsxldtrk>"
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[(unspec_volatile [(const_int 0)] TSXLDTRK)]
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"TARGET_TSXLDTRK"
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"<tsxldtrk>"
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[(set_attr "type" "other")
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(set_attr "length" "4")])
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;; ENQCMD and ENQCMDS
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(define_int_iterator ENQCMD [UNSPECV_ENQCMD UNSPECV_ENQCMDS])
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@ -1111,3 +1111,7 @@ Support ENQCMD built-in functions and code generation.
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mserialize
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Target Report Mask(ISA2_SERIALIZE) Var(ix86_isa_flags2) Save
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Support SERIALIZE built-in functions and code generation.
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mtsxldtrk
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Target Report Mask(ISA2_TSXLDTRK) Var(ix86_isa_flags2) Save
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Support TSXLDTRK built-in functions and code generation.
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@ -142,6 +142,8 @@
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#include <serializeintrin.h>
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#include <tsxldtrkintrin.h>
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#include <rdseedintrin.h>
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#include <prfchwintrin.h>
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33
gcc/config/i386/tsxldtrkintrin.h
Normal file
33
gcc/config/i386/tsxldtrkintrin.h
Normal file
@ -0,0 +1,33 @@
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#if !defined _IMMINTRIN_H_INCLUDED
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#error "Never use <tsxldtrkintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef _TSXLDTRKINTRIN_H_INCLUDED
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#define _TSXLDTRKINTRIN_H_INCLUDED
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#if !defined(__TSXLDTRK__)
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#pragma GCC push_options
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#pragma GCC target("tsxldtrk")
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#define __DISABLE_TSXLDTRK__
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#endif /* __TSXLDTRK__ */
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extern __inline void
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_xsusldtrk (void)
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{
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__builtin_ia32_xsusldtrk ();
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}
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extern __inline void
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_xresldtrk (void)
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{
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__builtin_ia32_xresldtrk ();
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}
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#ifdef __DISABLE_TSXLDTRK__
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#undef __DISABLE_TSXLDTRK__
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#pragma GCC pop_options
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#endif /* __DISABLE_TSXLDTRK__ */
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#endif /* _TSXLDTRKINTRIN_H_INCLUDED */
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@ -1344,7 +1344,7 @@ See RS/6000 and PowerPC Options.
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-mshstk -mmanual-endbr -mforce-indirect-call -mavx512vbmi2 -mavx512bf16 -menqcmd @gol
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-mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq @gol
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-mavx5124fmaps -mavx512vnni -mavx5124vnniw -mprfchw -mrdpid @gol
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-mrdseed -msgx -mavx512vp2intersect -mserialize @gol
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-mrdseed -msgx -mavx512vp2intersect -mserialize -mtsxldtrk@gol
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-mcldemote -mms-bitfields -mno-align-stringops -minline-all-stringops @gol
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-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
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-mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol
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@ -29468,6 +29468,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
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@itemx -menqcmd
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@opindex menqcmd
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@need 200
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@itemx -mtsxldtrk
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@opindex mtsxldtrk
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@need 200
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@itemx -mavx512vpopcntdq
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@opindex mavx512vpopcntdq
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@need 200
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@ -1,11 +1,11 @@
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/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
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/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize" } */
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/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk" } */
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/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
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xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
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popcntintrin.h, fmaintrin.h, pkuintrin.h, avx5124fmapsintrin.h,
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avx5124vnniwintrin.h, avx512vpopcntdqintrin.h gfniintrin.h
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avx512bitalgintrin.h, avx512vp2intersectintrin.h,
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avx512bitalgintrin.h, avx512vp2intersectintrin.h, tsxldtrkintrin.h,
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avx512vp2intersectvlintrin.h and mm_malloc.h.h are usable
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with -O -pedantic-errors. */
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@ -1,11 +1,11 @@
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/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
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/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize" } */
|
||||
/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk" } */
|
||||
|
||||
/* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h,
|
||||
xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h,
|
||||
popcntintrin.h, fmaintrin.h, pkuintrin.h, avx5124fmapsintrin.h,
|
||||
avx5124vnniwintrin.h, avx512vpopcntdqintrin.h gfniintrin.h
|
||||
avx512bitalgintrin.h, avx512vp2intersectintrin.h,
|
||||
avx512bitalgintrin.h, avx512vp2intersectintrin.h, tsxldtrkintrin.h,
|
||||
avx512vp2intersectvlintrin.h and mm_malloc.h are usable
|
||||
with -O -fkeep-inline-functions. */
|
||||
|
||||
|
||||
@ -67,6 +67,7 @@ extern void test_clwb (void) __attribute__((__target__("clwb")));
|
||||
extern void test_cld (void) __attribute__((__target__("cld")));
|
||||
extern void test_recip (void) __attribute__((__target__("recip")));
|
||||
extern void test_serialize (void) __attribute__((__target__("serialize")));
|
||||
extern void test_tsxldtrk (void) __attribute__((__target__("tsxldtrk")));
|
||||
|
||||
extern void test_no_sgx (void) __attribute__((__target__("no-sgx")));
|
||||
extern void test_no_avx5124fmaps(void) __attribute__((__target__("no-avx5124fmaps")));
|
||||
@ -135,6 +136,7 @@ extern void test_no_clwb (void) __attribute__((__target__("no-clwb")));
|
||||
extern void test_no_cld (void) __attribute__((__target__("no-cld")));
|
||||
extern void test_no_recip (void) __attribute__((__target__("no-recip")));
|
||||
extern void test_no_serialize (void) __attribute__((__target__("no-serialize")));
|
||||
extern void test_no_tsxldtrk (void) __attribute__((__target__("no-tsxldtrk")));
|
||||
|
||||
extern void test_arch_nocona (void) __attribute__((__target__("arch=nocona")));
|
||||
extern void test_arch_core2 (void) __attribute__((__target__("arch=core2")));
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
popcntintrin.h gfniintrin.h and mm_malloc.h are usable
|
||||
with -O -std=c89 -pedantic-errors. */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize" } */
|
||||
/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk" } */
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mserialize" } */
|
||||
/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512vbmi2 -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mavx512vp2intersect -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mavx512bitalg -mpconfig -mwbnoinvd -mavx512bf16 -menqcmd -mserialize -mtsxldtrk" } */
|
||||
/* { dg-add-options bind_pic_locally } */
|
||||
|
||||
#include <mm_malloc.h>
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize" } */
|
||||
/* { dg-options "-O0 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx512vbmi2 -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku -msgx -mrdpid -mgfni -mpconfig -mwbnoinvd -mavx512vl -mavx512bf16 -menqcmd -mavx512vp2intersect -mserialize -mtsxldtrk" } */
|
||||
/* { dg-add-options bind_pic_locally } */
|
||||
|
||||
#include <mm_malloc.h>
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
/* Test that the intrinsics compile with optimization. All of them
|
||||
are defined as inline functions in {,x,e,p,t,s,w,a,b,i}mmintrin.h,
|
||||
mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h,
|
||||
tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h,
|
||||
tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h, tsxldtrkintrin.h,
|
||||
avx5124fmapsintrin.h, avx5124vnniwintrin.h, avx512vpopcntdqintrin.h,
|
||||
avx512bitalgintrin.h, avx512vp2intersectintrin.h,
|
||||
avx512vp2intersectvlintrin.h and mm_malloc.h that reference the proper
|
||||
@ -102,7 +102,7 @@
|
||||
|
||||
|
||||
#ifndef DIFFERENT_PRAGMAS
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize")
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512vbmi2,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk")
|
||||
#endif
|
||||
|
||||
/* Following intrinsics require immediate arguments. They
|
||||
@ -219,7 +219,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1)
|
||||
|
||||
/* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */
|
||||
#ifdef DIFFERENT_PRAGMAS
|
||||
#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize")
|
||||
#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx512vbmi2,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,gfni,avx512bitalg,avx512bf16,avx512vp2intersect,serialize,tsxldtrk")
|
||||
#endif
|
||||
#include <immintrin.h>
|
||||
test_1 (_cvtss_sh, unsigned short, float, 1)
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
/* Test that the intrinsics compile with optimization. All of them
|
||||
are defined as inline functions in {,x,e,p,t,s,w,a,b,i}mmintrin.h,
|
||||
mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h,
|
||||
tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h,
|
||||
tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h, tsxtrkintrin.h,
|
||||
avx5124fmapsintrin.h, avx5124vnniwintrin.h, avx512vpopcntdqintrin.h,
|
||||
avx512bitalgintrin.h, avx512vp2intersectintrin.h,
|
||||
avx512vp2intersectvlintrin.h and mm_malloc.h that reference the proper
|
||||
@ -697,6 +697,6 @@
|
||||
#define __builtin_ia32_vpclmulqdq_v2di(A, B, C) __builtin_ia32_vpclmulqdq_v2di(A, B, 1)
|
||||
#define __builtin_ia32_vpclmulqdq_v8di(A, B, C) __builtin_ia32_vpclmulqdq_v8di(A, B, 1)
|
||||
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd,avx512bf16,enqcmd,avx512vp2intersect,serialize")
|
||||
#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku,sgx,rdpid,gfni,avx512vbmi2,vpclmulqdq,avx512bitalg,pconfig,wbnoinvd,avx512bf16,enqcmd,avx512vp2intersect,serialize,tsxldtrk")
|
||||
|
||||
#include <x86intrin.h>
|
||||
|
||||
13
gcc/testsuite/gcc.target/i386/tsxldtrk-1.c
Normal file
13
gcc/testsuite/gcc.target/i386/tsxldtrk-1.c
Normal file
@ -0,0 +1,13 @@
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O2 -mtsxldtrk" } */
|
||||
/* { dg-final { scan-assembler "xsusldtrk" } } */
|
||||
/* { dg-final { scan-assembler "xresldtrk" } } */
|
||||
|
||||
#include <immintrin.h>
|
||||
|
||||
void
|
||||
foo (void)
|
||||
{
|
||||
_xsusldtrk ();
|
||||
_xresldtrk ();
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user