mips.c (block_move_loop): Test Pmode == DImode instead of TARGET_MIPS64.
* mips.c (block_move_loop): Test Pmode == DImode instead of TARGET_MIPS64. (expand_block_move, save_restore_insns): Likewise. (function_prologue, mips_expand_prologue): Likewise. (mips_expand_epilogue): Likewise. * mips.h (POINTER_SIZE): Allow specific targets to override. (Pmode): Allow specific targets to override. (FUNCTION_PROFILER): Test Pmode == DImode instead of TARGET_MIPS64 (POINTER_BOUNDARY, FUNCTION_MODE): Likewise. (TRAMPOLINE_TEMPLATE, TRAMPOLINE_SIZE): Likewise. (TRAMPOLINE_ALIGNMENT, INITIALIZE_TRAMPOLINE): Likewise. (CASE_VECTOR_MODE, ASM_OUTPUT_ADDR_VEC_ELT): Likewise. (ASM_OUTPUT_ADDR_DIFF_ELT, SIZE_TYPE, PTRDIFF_TYPE): Likewise. * mips.md (indirect, tablejump & casesi support): Test for Pmode == DImode instead of TARGET_MIPS64. (call patterns): Likewise. From-SVN: r19354
This commit is contained in:
parent
d2f5ef7012
commit
1eeed24eb2
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@ -1,3 +1,22 @@
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Tue Apr 21 12:05:32 1998 Jeffrey A Law (law@cygnus.com)
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* mips.c (block_move_loop): Test Pmode == DImode instead of
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TARGET_MIPS64.
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(expand_block_move, save_restore_insns): Likewise.
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(function_prologue, mips_expand_prologue): Likewise.
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(mips_expand_epilogue): Likewise.
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* mips.h (POINTER_SIZE): Allow specific targets to override.
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(Pmode): Allow specific targets to override.
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(FUNCTION_PROFILER): Test Pmode == DImode instead of TARGET_MIPS64
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(POINTER_BOUNDARY, FUNCTION_MODE): Likewise.
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(TRAMPOLINE_TEMPLATE, TRAMPOLINE_SIZE): Likewise.
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(TRAMPOLINE_ALIGNMENT, INITIALIZE_TRAMPOLINE): Likewise.
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(CASE_VECTOR_MODE, ASM_OUTPUT_ADDR_VEC_ELT): Likewise.
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(ASM_OUTPUT_ADDR_DIFF_ELT, SIZE_TYPE, PTRDIFF_TYPE): Likewise.
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* mips.md (indirect, tablejump & casesi support): Test for
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Pmode == DImode instead of TARGET_MIPS64.
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(call patterns): Likewise.
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Tue Apr 21 09:43:55 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
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* objc/sendmsg.c: Define gen_rtx_MEM() to 1, as is already done
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@ -3008,7 +3008,7 @@ block_move_loop (dest_reg, src_reg, bytes, align, orig_dest, orig_src)
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if (bytes > 0x7fff)
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{
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if (TARGET_LONG64)
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if (Pmode == DImode)
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{
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emit_insn (gen_movdi (final_src, bytes_rtx));
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emit_insn (gen_adddi3 (final_src, final_src, src_reg));
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@ -3021,7 +3021,7 @@ block_move_loop (dest_reg, src_reg, bytes, align, orig_dest, orig_src)
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}
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else
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{
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if (TARGET_LONG64)
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if (Pmode == DImode)
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emit_insn (gen_adddi3 (final_src, src_reg, bytes_rtx));
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else
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emit_insn (gen_addsi3 (final_src, src_reg, bytes_rtx));
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@ -3031,7 +3031,7 @@ block_move_loop (dest_reg, src_reg, bytes, align, orig_dest, orig_src)
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bytes_rtx = GEN_INT (MAX_MOVE_BYTES);
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emit_insn (gen_movstrsi_internal (dest_mem, src_mem, bytes_rtx, align_rtx));
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if (TARGET_LONG64)
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if (Pmode == DImode)
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{
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emit_insn (gen_adddi3 (src_reg, src_reg, bytes_rtx));
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emit_insn (gen_adddi3 (dest_reg, dest_reg, bytes_rtx));
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@ -3143,7 +3143,7 @@ expand_block_move (operands)
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bytes -= leftover;
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if (TARGET_LONG64)
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if (Pmode == DImode)
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{
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emit_insn (gen_iordi3 (temp, src_reg, dest_reg));
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emit_insn (gen_anddi3 (temp, temp, GEN_INT (UNITS_PER_WORD-1)));
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@ -5733,7 +5733,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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base_offset = large_offset;
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if (file == (FILE *)0)
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{
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if (TARGET_LONG64)
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if (Pmode == DImode)
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insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx));
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else
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insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx));
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@ -5742,7 +5742,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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}
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else
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fprintf (file, "\t%s\t%s,%s,%s\n",
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TARGET_LONG64 ? "daddu" : "addu",
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Pmode == DImode ? "daddu" : "addu",
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reg_names[MIPS_TEMP2_REGNUM],
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reg_names[REGNO (large_reg)],
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reg_names[STACK_POINTER_REGNUM]);
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@ -5780,7 +5780,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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if (TARGET_LONG64)
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if (Pmode == DImode)
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insn = emit_insn (gen_adddi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
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else
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insn = emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
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@ -5792,7 +5792,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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reg_names[MIPS_TEMP2_REGNUM],
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(long)base_offset,
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(long)base_offset,
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TARGET_LONG64 ? "daddu" : "addu",
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Pmode == DImode ? "daddu" : "addu",
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reg_names[MIPS_TEMP2_REGNUM],
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reg_names[MIPS_TEMP2_REGNUM],
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reg_names[STACK_POINTER_REGNUM]);
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@ -5947,7 +5947,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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base_offset = large_offset;
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if (file == (FILE *)0)
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{
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if (TARGET_LONG64)
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if (Pmode == DImode)
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insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx));
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else
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insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx));
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@ -5956,7 +5956,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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}
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else
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fprintf (file, "\t%s\t%s,%s,%s\n",
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TARGET_LONG64 ? "daddu" : "addu",
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Pmode == DImode ? "daddu" : "addu",
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reg_names[MIPS_TEMP2_REGNUM],
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reg_names[REGNO (large_reg)],
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reg_names[STACK_POINTER_REGNUM]);
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@ -5996,7 +5996,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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if (store_p)
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RTX_FRAME_RELATED_P (insn) = 1;
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if (TARGET_LONG64)
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if (Pmode == DImode)
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insn = emit_insn (gen_adddi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
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else
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insn = emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, stack_pointer_rtx));
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@ -6008,7 +6008,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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reg_names[MIPS_TEMP2_REGNUM],
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(long)base_offset,
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(long)base_offset,
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TARGET_LONG64 ? "daddu" : "addu",
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Pmode == DImode ? "daddu" : "addu",
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reg_names[MIPS_TEMP2_REGNUM],
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reg_names[MIPS_TEMP2_REGNUM],
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reg_names[STACK_POINTER_REGNUM]);
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@ -6242,7 +6242,7 @@ function_prologue (file, size)
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if (tsize > 0)
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{
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fprintf (file, "\t%s\t%s,%s,%ld\n",
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(TARGET_LONG64 ? "dsubu" : "subu"),
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(Pmode == DImode ? "dsubu" : "subu"),
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sp_str, sp_str, tsize);
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fprintf (file, "\t.cprestore %ld\n", current_frame_info.args_size);
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}
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@ -6403,7 +6403,7 @@ mips_expand_prologue ()
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if (TARGET_MIPS16 && current_function_outgoing_args_size != 0)
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{
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rtx incr = GEN_INT (current_function_outgoing_args_size);
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if (TARGET_LONG64)
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if (Pmode == DImode)
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insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
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stack_pointer_rtx,
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incr));
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@ -6412,7 +6412,7 @@ mips_expand_prologue ()
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stack_pointer_rtx,
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incr));
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}
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else if (TARGET_LONG64)
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else if (Pmode == DImode)
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insn = emit_insn (gen_movdi (hard_frame_pointer_rtx, stack_pointer_rtx));
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else
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insn = emit_insn (gen_movsi (hard_frame_pointer_rtx, stack_pointer_rtx));
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@ -6501,7 +6501,7 @@ mips_expand_prologue ()
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tsize_rtx = tmp_rtx;
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}
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if (TARGET_LONG64)
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if (Pmode == DImode)
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insn = emit_insn (gen_subdi3 (stack_pointer_rtx, stack_pointer_rtx,
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tsize_rtx));
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else
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@ -6528,7 +6528,7 @@ mips_expand_prologue ()
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reg_rtx = gen_rtx (REG, Pmode, 3);
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emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
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emit_move_insn (reg_rtx, tsize_rtx);
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if (TARGET_LONG64)
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if (Pmode == DImode)
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emit_insn (gen_subdi3 (hard_frame_pointer_rtx,
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hard_frame_pointer_rtx,
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reg_rtx));
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@ -6557,7 +6557,7 @@ mips_expand_prologue ()
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if (current_function_outgoing_args_size != 0)
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{
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rtx incr = GEN_INT (current_function_outgoing_args_size);
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if (TARGET_LONG64)
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if (Pmode == DImode)
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insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
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hard_frame_pointer_rtx,
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incr));
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@ -6570,7 +6570,7 @@ mips_expand_prologue ()
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else if (TARGET_MIPS16 && current_function_outgoing_args_size != 0)
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{
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rtx incr = GEN_INT (current_function_outgoing_args_size);
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if (TARGET_LONG64)
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if (Pmode == DImode)
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insn = emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
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stack_pointer_rtx,
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incr));
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@ -6579,7 +6579,7 @@ mips_expand_prologue ()
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stack_pointer_rtx,
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incr));
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}
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else if (TARGET_LONG64)
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else if (Pmode == DImode)
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insn = emit_insn (gen_movdi (hard_frame_pointer_rtx, stack_pointer_rtx));
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else
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insn = emit_insn (gen_movsi (hard_frame_pointer_rtx, stack_pointer_rtx));
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@ -6749,7 +6749,7 @@ mips_expand_epilogue ()
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rtx g6_rtx = gen_rtx (REG, Pmode, GP_REG_FIRST + 6);
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emit_move_insn (g6_rtx, GEN_INT (tsize));
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if (TARGET_LONG64)
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if (Pmode == DImode)
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emit_insn (gen_adddi3 (hard_frame_pointer_rtx,
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hard_frame_pointer_rtx,
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g6_rtx));
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@ -6764,7 +6764,7 @@ mips_expand_epilogue ()
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tsize_rtx = GEN_INT (tsize);
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}
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if (TARGET_LONG64)
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if (Pmode == DImode)
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emit_insn (gen_movdi (stack_pointer_rtx, hard_frame_pointer_rtx));
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else
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emit_insn (gen_movsi (stack_pointer_rtx, hard_frame_pointer_rtx));
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@ -6787,7 +6787,7 @@ mips_expand_epilogue ()
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abort ();
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emit_insn (gen_blockage ());
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if (TARGET_LONG64 && tsize != 0)
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if (Pmode == DImode && tsize != 0)
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emit_insn (gen_adddi3 (stack_pointer_rtx, stack_pointer_rtx,
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tsize_rtx));
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else if (tsize != 0)
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@ -1314,10 +1314,12 @@ do { \
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/* Width in bits of a pointer.
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See also the macro `Pmode' defined below. */
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#ifndef POINTER_SIZE
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#define POINTER_SIZE (TARGET_LONG64 ? 64 : 32)
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#endif
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/* Allocation boundary (in *bits*) for storing pointers in memory. */
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#define POINTER_BOUNDARY (TARGET_LONG64 ? 64 : 32)
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#define POINTER_BOUNDARY (Pmode == DImode ? 64 : 32)
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/* Allocation boundary (in *bits*) for storing arguments in argument list. */
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#define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
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@ -2495,7 +2497,7 @@ typedef struct mips_args {
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TARGET_64BIT ? "dsubu" : "subu", \
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reg_names[STACK_POINTER_REGNUM], \
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reg_names[STACK_POINTER_REGNUM], \
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TARGET_LONG64 ? 16 : 8); \
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Pmode == DImode ? 16 : 8); \
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fprintf (FILE, "\t.set\treorder\n"); \
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fprintf (FILE, "\t.set\tat\n"); \
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}
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@ -2524,7 +2526,7 @@ typedef struct mips_args {
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fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
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fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
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fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
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if (TARGET_LONG64) \
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if (Pmode == DImode) \
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{ \
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fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \
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fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \
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@ -2537,7 +2539,7 @@ typedef struct mips_args {
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fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \
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fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
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fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
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if (TARGET_LONG64) \
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if (Pmode == DImode) \
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{ \
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fprintf (STREAM, "\t.dword\t0x00000000\t\t# <function address>\n"); \
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fprintf (STREAM, "\t.dword\t0x00000000\t\t# <static chain value>\n"); \
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@ -2552,11 +2554,11 @@ typedef struct mips_args {
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/* A C expression for the size in bytes of the trampoline, as an
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integer. */
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#define TRAMPOLINE_SIZE (32 + (TARGET_LONG64 ? 16 : 8))
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#define TRAMPOLINE_SIZE (32 + (Pmode == DImode ? 16 : 8))
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/* Alignment required for trampolines, in bits. */
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#define TRAMPOLINE_ALIGNMENT (TARGET_LONG64 ? 64 : 32)
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#define TRAMPOLINE_ALIGNMENT (Pmode == DImode ? 64 : 32)
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/* INITIALIZE_TRAMPOLINE calls this library function to flush
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program and data caches. */
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@ -2574,7 +2576,7 @@ typedef struct mips_args {
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#define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
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{ \
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rtx addr = ADDR; \
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if (TARGET_LONG64) \
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if (Pmode == DImode) \
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{ \
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emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \
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emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\
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@ -3075,7 +3077,7 @@ while (0)
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overflow is no more likely than the overflow in a branch
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instruction. Large functions can currently break in both ways. */
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#define CASE_VECTOR_MODE \
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(TARGET_MIPS16 ? HImode : TARGET_LONG64 ? DImode : SImode)
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(TARGET_MIPS16 ? HImode : Pmode == DImode ? DImode : SImode)
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/* Define as C expression which evaluates to nonzero if the tablejump
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instruction expects the table to contain offsets from the address of the
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@ -3136,13 +3138,15 @@ while (0)
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After generation of rtl, the compiler makes no further distinction
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between pointers and any other objects of this machine mode. */
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#ifndef Pmode
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#define Pmode (TARGET_LONG64 ? DImode : SImode)
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#endif
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/* A function address in a call instruction
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is a word address (for indexing purposes)
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so give the MEM rtx a words's mode. */
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#define FUNCTION_MODE (TARGET_LONG64 ? DImode : SImode)
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#define FUNCTION_MODE (Pmode == DImode ? DImode : SImode)
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/* Define TARGET_MEM_FUNCTIONS if we want to use calls to memcpy and
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memset, instead of the BSD functions bcopy and bzero. */
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@ -4147,7 +4151,7 @@ do { \
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#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
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fprintf (STREAM, "\t%s\t%sL%d\n", \
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TARGET_LONG64 ? ".dword" : ".word", \
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Pmode == DImode ? ".dword" : ".word", \
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LOCAL_LABEL_PREFIX, \
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VALUE)
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@ -4162,15 +4166,15 @@ do { \
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LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
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else if (TARGET_EMBEDDED_PIC) \
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fprintf (STREAM, "\t%s\t%sL%d-%sLS%d\n", \
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TARGET_LONG64 ? ".dword" : ".word", \
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Pmode == DImode ? ".dword" : ".word", \
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LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \
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else if (mips_abi == ABI_32) \
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fprintf (STREAM, "\t%s\t%sL%d\n", \
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TARGET_LONG64 ? ".gpdword" : ".gpword", \
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Pmode == DImode ? ".gpdword" : ".gpword", \
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LOCAL_LABEL_PREFIX, VALUE); \
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else \
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fprintf (STREAM, "\t%s\t%sL%d\n", \
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TARGET_LONG64 ? ".dword" : ".word", \
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Pmode == DImode ? ".dword" : ".word", \
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LOCAL_LABEL_PREFIX, VALUE); \
|
||||
} while (0)
|
||||
|
||||
|
@ -4410,12 +4414,12 @@ while (0)
|
|||
|
||||
#ifndef SIZE_TYPE
|
||||
#define NO_BUILTIN_SIZE_TYPE
|
||||
#define SIZE_TYPE (TARGET_LONG64 ? "long unsigned int" : "unsigned int")
|
||||
#define SIZE_TYPE (Pmode == DImode ? "long unsigned int" : "unsigned int")
|
||||
#endif
|
||||
|
||||
#ifndef PTRDIFF_TYPE
|
||||
#define NO_BUILTIN_PTRDIFF_TYPE
|
||||
#define PTRDIFF_TYPE (TARGET_LONG64 ? "long int" : "int")
|
||||
#define PTRDIFF_TYPE (Pmode == DImode ? "long int" : "int")
|
||||
#endif
|
||||
|
||||
/* See mips_expand_prologue's use of loadgp for when this should be
|
||||
|
|
|
@ -8598,7 +8598,7 @@ move\\t%0,%z4\\n\\
|
|||
if (GET_CODE (dest) != REG || GET_MODE (dest) != Pmode)
|
||||
operands[0] = copy_to_mode_reg (Pmode, dest);
|
||||
|
||||
if (!TARGET_LONG64)
|
||||
if (!(Pmode == DImode))
|
||||
emit_jump_insn (gen_indirect_jump_internal1 (operands[0]));
|
||||
else
|
||||
emit_jump_insn (gen_indirect_jump_internal2 (operands[0]));
|
||||
|
@ -8609,7 +8609,7 @@ move\\t%0,%z4\\n\\
|
|||
|
||||
(define_insn "indirect_jump_internal1"
|
||||
[(set (pc) (match_operand:SI 0 "register_operand" "d"))]
|
||||
"!TARGET_LONG64"
|
||||
"!(Pmode == DImode)"
|
||||
"%*j\\t%0"
|
||||
[(set_attr "type" "jump")
|
||||
(set_attr "mode" "none")
|
||||
|
@ -8617,7 +8617,7 @@ move\\t%0,%z4\\n\\
|
|||
|
||||
(define_insn "indirect_jump_internal2"
|
||||
[(set (pc) (match_operand:DI 0 "se_register_operand" "d"))]
|
||||
"TARGET_LONG64"
|
||||
"Pmode == DImode"
|
||||
"%*j\\t%0"
|
||||
[(set_attr "type" "jump")
|
||||
(set_attr "mode" "none")
|
||||
|
@ -8638,7 +8638,7 @@ move\\t%0,%z4\\n\\
|
|||
{
|
||||
if (GET_MODE (operands[0]) != HImode)
|
||||
abort ();
|
||||
if (!TARGET_LONG64)
|
||||
if (!(Pmode == DImode))
|
||||
emit_jump_insn (gen_tablejump_mips161 (operands[0], operands[1]));
|
||||
else
|
||||
emit_jump_insn (gen_tablejump_mips162 (operands[0], operands[1]));
|
||||
|
@ -8650,14 +8650,14 @@ move\\t%0,%z4\\n\\
|
|||
|
||||
if (! flag_pic)
|
||||
{
|
||||
if (!TARGET_LONG64)
|
||||
if (!(Pmode == DImode))
|
||||
emit_jump_insn (gen_tablejump_internal1 (operands[0], operands[1]));
|
||||
else
|
||||
emit_jump_insn (gen_tablejump_internal2 (operands[0], operands[1]));
|
||||
}
|
||||
else
|
||||
{
|
||||
if (!TARGET_LONG64)
|
||||
if (!(Pmode == DImode))
|
||||
emit_jump_insn (gen_tablejump_internal3 (operands[0], operands[1]));
|
||||
else
|
||||
emit_jump_insn (gen_tablejump_internal4 (operands[0], operands[1]));
|
||||
|
@ -8671,7 +8671,7 @@ move\\t%0,%z4\\n\\
|
|||
[(set (pc)
|
||||
(match_operand:SI 0 "register_operand" "d"))
|
||||
(use (label_ref (match_operand 1 "" "")))]
|
||||
"!TARGET_LONG64"
|
||||
"!(Pmode == DImode)"
|
||||
"%*j\\t%0"
|
||||
[(set_attr "type" "jump")
|
||||
(set_attr "mode" "none")
|
||||
|
@ -8681,7 +8681,7 @@ move\\t%0,%z4\\n\\
|
|||
[(set (pc)
|
||||
(match_operand:DI 0 "se_register_operand" "d"))
|
||||
(use (label_ref (match_operand 1 "" "")))]
|
||||
"TARGET_LONG64"
|
||||
"Pmode == DImode"
|
||||
"%*j\\t%0"
|
||||
[(set_attr "type" "jump")
|
||||
(set_attr "mode" "none")
|
||||
|
@ -8698,7 +8698,7 @@ move\\t%0,%z4\\n\\
|
|||
[(set (pc) (plus:SI (sign_extend:SI
|
||||
(match_operand:HI 0 "register_operand" "d"))
|
||||
(label_ref:SI (match_operand:SI 1 "" ""))))]
|
||||
"TARGET_MIPS16 && !TARGET_LONG64"
|
||||
"TARGET_MIPS16 && !(Pmode == DImode)"
|
||||
"
|
||||
{
|
||||
if (operands[0]) /* eliminate unused code warnings. */
|
||||
|
@ -8720,7 +8720,7 @@ move\\t%0,%z4\\n\\
|
|||
[(set (pc) (plus:DI (sign_extend:DI
|
||||
(match_operand:HI 0 "register_operand" "d"))
|
||||
(label_ref:DI (match_operand:SI 1 "" ""))))]
|
||||
"TARGET_MIPS16 && TARGET_LONG64"
|
||||
"TARGET_MIPS16 && Pmode == DImode"
|
||||
"
|
||||
{
|
||||
if (operands[0]) /* eliminate unused code warnings. */
|
||||
|
@ -8748,7 +8748,7 @@ move\\t%0,%z4\\n\\
|
|||
[(set (pc)
|
||||
(plus:SI (match_operand:SI 0 "register_operand" "d")
|
||||
(label_ref:SI (match_operand:SI 1 "" ""))))]
|
||||
"!TARGET_LONG64 && next_active_insn (insn) != 0
|
||||
"!(Pmode == DImode) && next_active_insn (insn) != 0
|
||||
&& GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
|
||||
&& PREV_INSN (next_active_insn (insn)) == operands[1]"
|
||||
"*
|
||||
|
@ -8776,7 +8776,7 @@ move\\t%0,%z4\\n\\
|
|||
[(set (pc)
|
||||
(plus:DI (match_operand:DI 0 "se_register_operand" "d")
|
||||
(label_ref:DI (match_operand:SI 1 "" ""))))]
|
||||
"TARGET_LONG64 && next_active_insn (insn) != 0
|
||||
"Pmode == DImode && next_active_insn (insn) != 0
|
||||
&& GET_CODE (PATTERN (next_active_insn (insn))) == ADDR_DIFF_VEC
|
||||
&& PREV_INSN (next_active_insn (insn)) == operands[1]"
|
||||
"%*j\\t%0"
|
||||
|
@ -8810,7 +8810,7 @@ move\\t%0,%z4\\n\\
|
|||
"
|
||||
{
|
||||
/* We need slightly different code for eight byte table entries. */
|
||||
if (TARGET_LONG64)
|
||||
if (Pmode == DImode)
|
||||
abort ();
|
||||
|
||||
if (operands[0])
|
||||
|
@ -8871,7 +8871,7 @@ move\\t%0,%z4\\n\\
|
|||
"TARGET_ABICALLS"
|
||||
"
|
||||
{
|
||||
if (TARGET_LONG64)
|
||||
if (Pmode == DImode)
|
||||
emit_insn (gen_builtin_setjmp_setup_64 (operands[0]));
|
||||
else
|
||||
emit_insn (gen_builtin_setjmp_setup_32 (operands[0]));
|
||||
|
@ -8882,14 +8882,14 @@ move\\t%0,%z4\\n\\
|
|||
[(set (mem:SI (plus:SI (match_operand:SI 0 "register_operand" "r")
|
||||
(const_int 12)))
|
||||
(reg:SI 28))]
|
||||
"TARGET_ABICALLS && ! TARGET_LONG64"
|
||||
"TARGET_ABICALLS && ! (Pmode == DImode)"
|
||||
"")
|
||||
|
||||
(define_expand "builtin_setjmp_setup_64"
|
||||
[(set (mem:DI (plus:DI (match_operand:DI 0 "register_operand" "r")
|
||||
(const_int 24)))
|
||||
(reg:DI 28))]
|
||||
"TARGET_ABICALLS && TARGET_LONG64"
|
||||
"TARGET_ABICALLS && Pmode == DImode"
|
||||
"")
|
||||
|
||||
;; For o32/n32/n64, we need to arrange for longjmp to put the
|
||||
|
@ -8901,7 +8901,7 @@ move\\t%0,%z4\\n\\
|
|||
"
|
||||
{
|
||||
/* The elements of the buffer are, in order: */
|
||||
int W = (TARGET_LONG64 ? 8 : 4);
|
||||
int W = (Pmode == DImode ? 8 : 4);
|
||||
rtx fp = gen_rtx_MEM (Pmode, operands[0]);
|
||||
rtx lab = gen_rtx_MEM (Pmode, plus_constant (operands[0], 1*W));
|
||||
rtx stack = gen_rtx_MEM (Pmode, plus_constant (operands[0], 2*W));
|
||||
|
@ -9138,7 +9138,7 @@ move\\t%0,%z4\\n\\
|
|||
[(call (mem:SI (match_operand:SI 0 "register_operand" "r"))
|
||||
(match_operand 1 "" "i"))
|
||||
(clobber (match_operand:SI 2 "register_operand" "=d"))]
|
||||
"!TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"!(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"%*jal\\t%2,%0"
|
||||
[(set_attr "type" "call")
|
||||
(set_attr "mode" "none")
|
||||
|
@ -9148,7 +9148,7 @@ move\\t%0,%z4\\n\\
|
|||
[(call (mem:DI (match_operand:DI 0 "se_register_operand" "r"))
|
||||
(match_operand 1 "" "i"))
|
||||
(clobber (match_operand:SI 2 "register_operand" "=d"))]
|
||||
"TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"Pmode == DImode && !TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"%*jal\\t%2,%0"
|
||||
[(set_attr "type" "call")
|
||||
(set_attr "mode" "none")
|
||||
|
@ -9158,7 +9158,7 @@ move\\t%0,%z4\\n\\
|
|||
[(call (mem:SI (match_operand:SI 0 "register_operand" "r"))
|
||||
(match_operand 1 "" "i"))
|
||||
(clobber (match_operand:SI 2 "register_operand" "=d"))]
|
||||
"!TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"!(Pmode == DImode) && TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"*
|
||||
{
|
||||
if (REGNO (operands[0]) != PIC_FUNCTION_ADDR_REGNUM)
|
||||
|
@ -9174,7 +9174,7 @@ move\\t%0,%z4\\n\\
|
|||
[(call (mem:DI (match_operand:DI 0 "se_register_operand" "r"))
|
||||
(match_operand 1 "" "i"))
|
||||
(clobber (match_operand:SI 2 "register_operand" "=d"))]
|
||||
"TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"Pmode == DImode && TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"*
|
||||
{
|
||||
if (REGNO (operands[0]) != PIC_FUNCTION_ADDR_REGNUM)
|
||||
|
@ -9336,7 +9336,7 @@ move\\t%0,%z4\\n\\
|
|||
(call (mem:SI (match_operand:SI 1 "register_operand" "r"))
|
||||
(match_operand 2 "" "i")))
|
||||
(clobber (match_operand:SI 3 "register_operand" "=d"))]
|
||||
"!TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"!(Pmode == DImode) && !TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"%*jal\\t%3,%1"
|
||||
[(set_attr "type" "call")
|
||||
(set_attr "mode" "none")
|
||||
|
@ -9347,7 +9347,7 @@ move\\t%0,%z4\\n\\
|
|||
(call (mem:DI (match_operand:DI 1 "se_register_operand" "r"))
|
||||
(match_operand 2 "" "i")))
|
||||
(clobber (match_operand:SI 3 "register_operand" "=d"))]
|
||||
"TARGET_LONG64 && !TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"Pmode == DImode && !TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"%*jal\\t%3,%1"
|
||||
[(set_attr "type" "call")
|
||||
(set_attr "mode" "none")
|
||||
|
@ -9358,7 +9358,7 @@ move\\t%0,%z4\\n\\
|
|||
(call (mem:SI (match_operand:SI 1 "register_operand" "r"))
|
||||
(match_operand 2 "" "i")))
|
||||
(clobber (match_operand:SI 3 "register_operand" "=d"))]
|
||||
"!TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"!(Pmode == DImode) && TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"*
|
||||
{
|
||||
if (REGNO (operands[1]) != PIC_FUNCTION_ADDR_REGNUM)
|
||||
|
@ -9375,7 +9375,7 @@ move\\t%0,%z4\\n\\
|
|||
(call (mem:DI (match_operand:DI 1 "se_register_operand" "r"))
|
||||
(match_operand 2 "" "i")))
|
||||
(clobber (match_operand:SI 3 "register_operand" "=d"))]
|
||||
"TARGET_LONG64 && TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"Pmode == DImode && TARGET_ABICALLS && TARGET_LONG_CALLS"
|
||||
"*
|
||||
{
|
||||
if (REGNO (operands[1]) != PIC_FUNCTION_ADDR_REGNUM)
|
||||
|
|
Loading…
Reference in New Issue