vget_lane.c: Add fp16 tests.
* gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add fp16 tests. From-SVN: r236388
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@ -1,3 +1,7 @@
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2016-05-18 Christophe Lyon <christophe.lyon@linaro.org>
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* gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add fp16 tests.
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2016-05-18 Christophe Lyon <christophe.lyon@linaro.org>
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2016-05-18 Christophe Lyon <christophe.lyon@linaro.org>
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* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Add
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* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Add
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@ -13,6 +13,7 @@ uint32_t expected_u32 = 0xfffffff1;
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uint64_t expected_u64 = 0xfffffffffffffff0;
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uint64_t expected_u64 = 0xfffffffffffffff0;
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poly8_t expected_p8 = 0xf6;
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poly8_t expected_p8 = 0xf6;
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poly16_t expected_p16 = 0xfff2;
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poly16_t expected_p16 = 0xfff2;
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hfloat16_t expected_f16 = 0xcb80;
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hfloat32_t expected_f32 = 0xc1700000;
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hfloat32_t expected_f32 = 0xc1700000;
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int8_t expectedq_s8 = 0xff;
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int8_t expectedq_s8 = 0xff;
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@ -25,6 +26,7 @@ uint32_t expectedq_u32 = 0xfffffff2;
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uint64_t expectedq_u64 = 0xfffffffffffffff1;
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uint64_t expectedq_u64 = 0xfffffffffffffff1;
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poly8_t expectedq_p8 = 0xfe;
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poly8_t expectedq_p8 = 0xfe;
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poly16_t expectedq_p16 = 0xfff6;
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poly16_t expectedq_p16 = 0xfff6;
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hfloat16_t expectedq_f16 = 0xca80;
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hfloat32_t expectedq_f32 = 0xc1500000;
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hfloat32_t expectedq_f32 = 0xc1500000;
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int error_found = 0;
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int error_found = 0;
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@ -52,6 +54,10 @@ void exec_vget_lane (void)
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uint32_t var_int32;
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uint32_t var_int32;
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float32_t var_float32;
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float32_t var_float32;
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} var_int32_float32;
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} var_int32_float32;
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union {
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uint16_t var_int16;
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float16_t var_float16;
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} var_int16_float16;
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#define TEST_VGET_LANE_FP(Q, T1, T2, W, N, L) \
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#define TEST_VGET_LANE_FP(Q, T1, T2, W, N, L) \
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VAR(var, T1, W) = vget##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), L); \
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VAR(var, T1, W) = vget##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), L); \
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@ -81,10 +87,17 @@ void exec_vget_lane (void)
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VAR_DECL(var, uint, 64);
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VAR_DECL(var, uint, 64);
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VAR_DECL(var, poly, 8);
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VAR_DECL(var, poly, 8);
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VAR_DECL(var, poly, 16);
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VAR_DECL(var, poly, 16);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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VAR_DECL(var, float, 16);
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#endif
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VAR_DECL(var, float, 32);
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VAR_DECL(var, float, 32);
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/* Initialize input values. */
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/* Initialize input values. */
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TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
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TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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VLOAD(vector, buffer, , float, f, 16, 4);
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VLOAD(vector, buffer, q, float, f, 16, 8);
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#endif
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VLOAD(vector, buffer, , float, f, 32, 2);
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VLOAD(vector, buffer, , float, f, 32, 2);
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VLOAD(vector, buffer, q, float, f, 32, 4);
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VLOAD(vector, buffer, q, float, f, 32, 4);
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@ -99,6 +112,9 @@ void exec_vget_lane (void)
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TEST_VGET_LANE(, uint, u, 64, 1, 0);
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TEST_VGET_LANE(, uint, u, 64, 1, 0);
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TEST_VGET_LANE(, poly, p, 8, 8, 6);
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TEST_VGET_LANE(, poly, p, 8, 8, 6);
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TEST_VGET_LANE(, poly, p, 16, 4, 2);
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TEST_VGET_LANE(, poly, p, 16, 4, 2);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VGET_LANE_FP(, float, f, 16, 4, 1);
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#endif
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TEST_VGET_LANE_FP(, float, f, 32, 2, 1);
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TEST_VGET_LANE_FP(, float, f, 32, 2, 1);
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TEST_VGET_LANE(q, int, s, 8, 16, 15);
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TEST_VGET_LANE(q, int, s, 8, 16, 15);
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@ -111,6 +127,9 @@ void exec_vget_lane (void)
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TEST_VGET_LANE(q, uint, u, 64, 2, 1);
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TEST_VGET_LANE(q, uint, u, 64, 2, 1);
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TEST_VGET_LANE(q, poly, p, 8, 16, 14);
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TEST_VGET_LANE(q, poly, p, 8, 16, 14);
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TEST_VGET_LANE(q, poly, p, 16, 8, 6);
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TEST_VGET_LANE(q, poly, p, 16, 8, 6);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VGET_LANE_FP(q, float, f, 16, 8, 3);
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#endif
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TEST_VGET_LANE_FP(q, float, f, 32, 4, 3);
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TEST_VGET_LANE_FP(q, float, f, 32, 4, 3);
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}
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}
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