Minor performance improvements. Minor EH/unwind bug fix.
* config/ia64/ia64.c (ia64_expand_prologue): Don't abort if leaf function uses output registers. Don't save RP for leaf functions. Do save RP even if no epilogue. * config/ia64/ia64.h (FIXED_REGISTERS): Unmark in/out registers. (CALL_USED_REGISTERS): Unmark in registers. (REG_ALLOC_ORDER): Move out regs up, to near the top. Move in regs up, to near the middle. From-SVN: r32661
This commit is contained in:
Jim Wilson
Jim Wilson
parent
c1f6390295
commit
1ff5b671b6
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@ -1,3 +1,13 @@
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Mon Mar 20 19:53:53 2000 Jim Wilson <wilson@cygnus.com>
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* config/ia64/ia64.c (ia64_expand_prologue): Don't abort if leaf
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function uses output registers. Don't save RP for leaf functions.
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Do save RP even if no epilogue.
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* config/ia64/ia64.h (FIXED_REGISTERS): Unmark in/out registers.
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(CALL_USED_REGISTERS): Unmark in registers.
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(REG_ALLOC_ORDER): Move out regs up, to near the top. Move in regs up,
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to near the middle.
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2000-03-20 Geoff Keating <geoffk@cygnus.com>
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* config/rs6000/rs6000.md (bunordered): New expander.
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@ -775,12 +775,6 @@ save_restore_insns (save_p)
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/* ??? Get inefficient code when the frame size is larger than can fit in an
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adds instruction. */
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/* ??? Add support for allocating temporaries from the output registers if
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they do not need to live past call instructions. */
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/* ??? If the function does not return, then we don't need to save the rp
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and ar.pfs registers. */
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/* ??? If this is a leaf function, then fp/rp/ar.pfs should be put in the
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low 32 regs. */
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@ -807,7 +801,7 @@ ia64_expand_prologue ()
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leaf_function = leaf_function_p ();
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pop_topmost_sequence ();
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/* ??? If there is no epilogue, then we don't need some prologue insns. We
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/* If there is no epilogue, then we don't need some prologue insns. We
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need to avoid emitting the dead prologue insns, because flow will complain
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about them. */
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if (optimize)
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@ -863,10 +857,6 @@ ia64_expand_prologue ()
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else if (profile_block_flag == 2)
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outputs = MAX (outputs, 2);
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/* Leaf functions should not use any output registers. */
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if (leaf_function && outputs != 0)
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abort ();
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/* No rotating register support as yet. */
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rotates = 0;
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@ -874,6 +864,8 @@ ia64_expand_prologue ()
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/* Allocate two extra locals for saving/restoring rp and ar.pfs. Also
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allocate one local for use as the frame pointer if frame_pointer_needed
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is true. */
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/* ??? If this is a leaf function, then we aren't using one of these local
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registers for the RP anymore. */
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locals += 2 + frame_pointer_needed;
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/* Save these values in global registers for debugging info. */
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@ -925,6 +917,7 @@ ia64_expand_prologue ()
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/* We don't need an alloc instruction if this is a leaf function, and the
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locals and outputs are both zero sized. Since we have already allocated
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two locals for rp and ar.pfs, we check for two locals. */
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/* Leaf functions can use output registers as call-clobbered temporaries. */
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if (locals == 2 && outputs == 0 && leaf_function)
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{
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/* If there is no alloc, but there are input registers used, then we
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@ -940,21 +933,36 @@ ia64_expand_prologue ()
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else
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{
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ia64_need_regstk = 0;
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ia64_arpfs_regno = LOC_REG (locals - 1);
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ia64_rp_regno = LOC_REG (locals - 2);
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reg_names[RETURN_ADDRESS_REGNUM] = reg_names[ia64_rp_regno];
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emit_insn (gen_alloc (gen_rtx_REG (DImode, ia64_arpfs_regno),
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GEN_INT (inputs), GEN_INT (locals),
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GEN_INT (outputs), GEN_INT (rotates)));
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/* ??? FIXME ??? We don't need to save BR_REG (0) if this is a leaf
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function. We also don't need to allocate a local reg for it then. */
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/* ??? Likewise if there is no epilogue. */
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if (epilogue_p)
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emit_move_insn (gen_rtx_REG (DImode, ia64_rp_regno),
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gen_rtx_REG (DImode, BR_REG (0)));
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/* Emit a save of BR_REG (0) if we call other functions.
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Do this even if this function doesn't return, as EH
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depends on this to be able to unwind the stack. */
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if (! leaf_function)
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{
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rtx ia64_rp_reg;
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ia64_rp_regno = LOC_REG (locals - 2);
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reg_names[RETURN_ADDRESS_REGNUM] = reg_names[ia64_rp_regno];
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ia64_rp_reg = gen_rtx_REG (DImode, ia64_rp_regno);
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insn = emit_move_insn (ia64_rp_reg, gen_rtx_REG (DImode,
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BR_REG (0)));
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RTX_FRAME_RELATED_P (insn) = 1;
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if (! epilogue_p)
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{
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/* If we don't have an epilogue, then the return value
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doesn't appear to be needed and the above store will
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appear dead and will elicit a warning from flow. */
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emit_insn (gen_rtx_USE (VOIDmode, ia64_rp_reg));
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}
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}
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else
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ia64_rp_regno = 0;
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}
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/* Set up frame pointer and stack pointer. */
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@ -577,16 +577,14 @@ while (0)
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p0: constant true
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fp: eliminable frame pointer */
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/* The last 16 stacked regs are fixed, because they are reserved for the 8
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input and 8 output registers. */
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/* The last 16 stacked regs are reserved for the 8 input and 8 output
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registers. */
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/* ??? Must mark the next 3 stacked regs as fixed, because ia64_expand_prologue
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assumes that three locals are available for fp, b0, and ar.pfs. */
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/* ??? Should mark b0 as fixed? */
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/* ??? input and output registers do not have to be marked as fixed. */
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#define FIXED_REGISTERS \
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{ /* General registers. */ \
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1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
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@ -596,7 +594,7 @@ while (0)
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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/* Floating-point registers. */ \
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1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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@ -622,8 +620,6 @@ while (0)
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therefore identifies the registers that are not available for general
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allocation of values that must live across function calls. */
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/* ??? If inputs are not marked as fixed, then they are not call clobbered. */
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#define CALL_USED_REGISTERS \
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{ /* General registers. */ \
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1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
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@ -633,7 +629,7 @@ while (0)
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
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/* Floating-point registers. */ \
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1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
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@ -689,11 +685,6 @@ while (0)
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/* ??? Should the GR return value registers come before or after the rest
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of the caller-save GRs? */
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/* ??? Output registers are cheap, because they will be not be saved
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by the register engine. They probably should be early in the list.
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We need to make them not fixed first though. Similarly, input registers
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are callee-saved (RSE) like the stacked locals. */
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#define REG_ALLOC_ORDER \
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{ \
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/* Caller-saved general registers. */ \
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@ -701,6 +692,9 @@ while (0)
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R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \
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R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \
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R_GR (30), R_GR (31), \
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/* Output registers. */ \
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R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
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R_GR (126), R_GR (127), \
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/* Caller-saved general registers, also used for return values. */ \
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R_GR (8), R_GR (9), R_GR (10), R_GR (11), \
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/* addl caller-saved general registers. */ \
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@ -759,6 +753,9 @@ while (0)
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R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \
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R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \
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R_GR (108), \
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/* Input registers. */ \
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R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
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R_GR (118), R_GR (119), \
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/* Callee-saved general registers. */ \
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R_GR (4), R_GR (5), R_GR (6), R_GR (7), \
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/* Callee-saved FP registers. */ \
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@ -773,12 +770,6 @@ while (0)
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\
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/* ??? Stacked registers reserved for fp, rp, and ar.pfs. */ \
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R_GR (109), R_GR (110), R_GR (111), \
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/* Input registers. */ \
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R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
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R_GR (118), R_GR (119), \
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/* Output registers. */ \
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R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
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R_GR (126), R_GR (127), \
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\
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/* Special general registers. */ \
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R_GR (0), R_GR (1), R_GR (12), R_GR (13), \
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