[NDS32] Implement fp-as-gp optimization.
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add UNSPEC_VOLATILE_OMIT_FP_BEGIN and UNSPEC_VOLATILE_OMIT_FP_END. * config/nds32/nds32-fp-as-gp.c: New implementation of fp_as_gp optimization. * config/nds32/nds32-protos.h (nds32_naked_function_p): Declare. (make_pass_nds32_fp_as_gp): Declare. * config/nds32/nds32.c (nds32_register_passes): Add fp_as_gp as one optmization pass. (nds32_asm_function_end_prologue): Remove unused asm output. (nds32_asm_function_begin_epilogue): Remove unused asm output. (nds32_asm_file_start): Output necessary fp_as_gp information. (nds32_option_override): Adjust register usage. (nds32_expand_prologue): Consider fp_as_gp situation. (nds32_expand_prologue_v3push): Consider fp_as_gp situation. * config/nds32/nds32.md (prologue): Check fp_as_gp_p and naked_p. (epilogue): Ditto. (return): Ditto. (simple_return): Ditto. (omit_fp_begin): Output special directive for fp_as_gp. (omit_fp_end): Output special directive for fp_as_gp. * config/nds32/nds32.opt (mfp-as-gp, mno-fp-as-gp, mforce-fp-as-gp, mforbid-fp-as-gp): New options. Co-Authored-By: Shiva Chen <shiva0217@gmail.com> From-SVN: r261115
This commit is contained in:
Chung-Ju Wu
Chung-Ju Wu
parent
e812d4dd5d
commit
2140297cb3
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@ -1,3 +1,29 @@
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2018-06-02 Chung-Ju Wu <jasonwucj@gmail.com>
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Shiva Chen <shiva0217@gmail.com>
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* config/nds32/constants.md (unspec_volatile_element): Add
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UNSPEC_VOLATILE_OMIT_FP_BEGIN and UNSPEC_VOLATILE_OMIT_FP_END.
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* config/nds32/nds32-fp-as-gp.c: New implementation of fp_as_gp
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optimization.
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* config/nds32/nds32-protos.h (nds32_naked_function_p): Declare.
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(make_pass_nds32_fp_as_gp): Declare.
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* config/nds32/nds32.c (nds32_register_passes): Add fp_as_gp as one
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optmization pass.
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(nds32_asm_function_end_prologue): Remove unused asm output.
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(nds32_asm_function_begin_epilogue): Remove unused asm output.
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(nds32_asm_file_start): Output necessary fp_as_gp information.
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(nds32_option_override): Adjust register usage.
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(nds32_expand_prologue): Consider fp_as_gp situation.
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(nds32_expand_prologue_v3push): Consider fp_as_gp situation.
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* config/nds32/nds32.md (prologue): Check fp_as_gp_p and naked_p.
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(epilogue): Ditto.
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(return): Ditto.
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(simple_return): Ditto.
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(omit_fp_begin): Output special directive for fp_as_gp.
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(omit_fp_end): Output special directive for fp_as_gp.
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* config/nds32/nds32.opt (mfp-as-gp, mno-fp-as-gp, mforce-fp-as-gp,
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mforbid-fp-as-gp): New options.
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2018-06-01 Mark Wielaard <mark@klomp.org>
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* dwarf2out.c (dwarf2out_finish): Remove generation of
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@ -169,6 +169,8 @@
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UNSPEC_VOLATILE_SET_TRIG_EDGE
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UNSPEC_VOLATILE_GET_TRIG_TYPE
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UNSPEC_VOLATILE_RELAX_GROUP
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UNSPEC_VOLATILE_OMIT_FP_BEGIN
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UNSPEC_VOLATILE_OMIT_FP_END
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UNSPEC_VOLATILE_POP25_RETURN
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UNSPEC_VOLATILE_UNALIGNED_FEATURE
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UNSPEC_VOLATILE_ENABLE_UNALIGNED
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@ -26,19 +26,255 @@
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#include "system.h"
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#include "coretypes.h"
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#include "backend.h"
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#include "hard-reg-set.h"
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#include "tm_p.h"
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#include "rtl.h"
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#include "memmodel.h"
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#include "emit-rtl.h"
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#include "insn-config.h"
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#include "regs.h"
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#include "hard-reg-set.h"
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#include "ira.h"
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#include "ira-int.h"
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#include "df.h"
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#include "tree-core.h"
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#include "tree-pass.h"
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#include "nds32-protos.h"
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/* ------------------------------------------------------------------------ */
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/* A helper function to check if this function should contain prologue. */
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static bool
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nds32_have_prologue_p (void)
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{
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int i;
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for (i = 0; i < 28; i++)
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if (NDS32_REQUIRED_CALLEE_SAVED_P (i))
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return true;
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return (flag_pic
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|| NDS32_REQUIRED_CALLEE_SAVED_P (FP_REGNUM)
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|| NDS32_REQUIRED_CALLEE_SAVED_P (LP_REGNUM));
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}
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static int
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nds32_get_symbol_count (void)
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{
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int symbol_count = 0;
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rtx_insn *insn;
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basic_block bb;
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FOR_EACH_BB_FN (bb, cfun)
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{
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FOR_BB_INSNS (bb, insn)
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{
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/* Counting the insn number which the addressing mode is symbol. */
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if (single_set (insn) && nds32_symbol_load_store_p (insn))
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{
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rtx pattern = PATTERN (insn);
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rtx mem;
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gcc_assert (GET_CODE (pattern) == SET);
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if (GET_CODE (SET_SRC (pattern)) == REG )
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mem = SET_DEST (pattern);
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else
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mem = SET_SRC (pattern);
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/* We have only lwi37 and swi37 for fp-as-gp optimization,
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so don't count any other than SImode.
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MEM for QImode and HImode will wrap by ZERO_EXTEND
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or SIGN_EXTEND */
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if (GET_CODE (mem) == MEM)
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symbol_count++;
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}
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}
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}
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return symbol_count;
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}
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/* Function to determine whether it is worth to do fp_as_gp optimization.
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Return 0: It is NOT worth to do fp_as_gp optimization.
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Return 1: It is APPROXIMATELY worth to do fp_as_gp optimization.
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Return false: It is NOT worth to do fp_as_gp optimization.
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Return true: It is APPROXIMATELY worth to do fp_as_gp optimization.
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Note that if it is worth to do fp_as_gp optimization,
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we MUST set FP_REGNUM ever live in this function. */
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int
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static bool
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nds32_fp_as_gp_check_available (void)
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{
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/* By default we return 0. */
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return 0;
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basic_block bb;
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basic_block exit_bb;
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edge_iterator ei;
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edge e;
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bool first_exit_blocks_p;
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/* If there exists ANY of following conditions,
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we DO NOT perform fp_as_gp optimization:
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1. TARGET_FORBID_FP_AS_GP is set
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regardless of the TARGET_FORCE_FP_AS_GP.
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2. User explicitly uses 'naked'/'no_prologue' attribute.
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We use nds32_naked_function_p() to help such checking.
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3. Not optimize for size.
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4. Need frame pointer.
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5. If $fp is already required to be saved,
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it means $fp is already choosen by register allocator.
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Thus we better not to use it for fp_as_gp optimization.
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6. This function is a vararg function.
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DO NOT apply fp_as_gp optimization on this function
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because it may change and break stack frame.
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7. The epilogue is empty.
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This happens when the function uses exit()
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or its attribute is no_return.
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In that case, compiler will not expand epilogue
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so that we have no chance to output .omit_fp_end directive. */
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if (TARGET_FORBID_FP_AS_GP
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|| nds32_naked_function_p (current_function_decl)
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|| !optimize_size
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|| frame_pointer_needed
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|| NDS32_REQUIRED_CALLEE_SAVED_P (FP_REGNUM)
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|| (cfun->stdarg == 1)
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|| (find_fallthru_edge (EXIT_BLOCK_PTR_FOR_FN (cfun)->preds) == NULL))
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return false;
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/* Disable fp_as_gp if there is any infinite loop since the fp may
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reuse in infinite loops by register rename.
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For check infinite loops we should make sure exit_bb is post dominate
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all other basic blocks if there is no infinite loops. */
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first_exit_blocks_p = true;
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exit_bb = NULL;
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FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR_FOR_FN (cfun)->preds)
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{
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/* More than one exit block also do not perform fp_as_gp optimization. */
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if (!first_exit_blocks_p)
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return false;
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exit_bb = e->src;
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first_exit_blocks_p = false;
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}
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/* Not found exit_bb? just abort fp_as_gp! */
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if (!exit_bb)
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return false;
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/* Each bb should post dominate by exit_bb if there is no infinite loop! */
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FOR_EACH_BB_FN (bb, cfun)
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{
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if (!dominated_by_p (CDI_POST_DOMINATORS,
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bb,
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exit_bb))
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return false;
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}
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/* Now we can check the possibility of using fp_as_gp optimization. */
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if (TARGET_FORCE_FP_AS_GP)
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{
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/* User explicitly issues -mforce-fp-as-gp option. */
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return true;
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}
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else
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{
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/* In the following we are going to evaluate whether
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it is worth to do fp_as_gp optimization. */
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bool good_gain = false;
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int symbol_count;
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int threshold;
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/* We check if there already requires prologue.
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Note that $gp will be saved in prologue for PIC code generation.
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After that, we can set threshold by the existence of prologue.
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Each fp-implied instruction will gain 2-byte code size
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from gp-aware instruction, so we have following heuristics. */
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if (flag_pic
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|| nds32_have_prologue_p ())
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{
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/* Have-prologue:
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Compiler already intends to generate prologue content,
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so the fp_as_gp optimization will only insert
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'la $fp,_FP_BASE_' instruction, which will be
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converted into 4-byte instruction at link time.
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The threshold is "3" symbol accesses, 2 + 2 + 2 > 4. */
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threshold = 3;
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}
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else
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{
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/* None-prologue:
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Compiler originally does not generate prologue content,
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so the fp_as_gp optimization will NOT ONLY insert
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'la $fp,_FP_BASE' instruction, but also causes
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push/pop instructions.
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If we are using v3push (push25/pop25),
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the threshold is "5" symbol accesses, 5*2 > 4 + 2 + 2;
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If we are using normal push (smw/lmw),
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the threshold is "5+2" symbol accesses 7*2 > 4 + 4 + 4. */
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threshold = 5 + (TARGET_V3PUSH ? 0 : 2);
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}
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symbol_count = nds32_get_symbol_count ();
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if (symbol_count >= threshold)
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good_gain = true;
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/* Enable fp_as_gp optimization when potential gain is good enough. */
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return good_gain;
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}
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}
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static unsigned int
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nds32_fp_as_gp (void)
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{
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bool fp_as_gp_p;
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calculate_dominance_info (CDI_POST_DOMINATORS);
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fp_as_gp_p = nds32_fp_as_gp_check_available ();
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/* Here is a hack to IRA for enable/disable a hard register per function.
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We *MUST* review this way after migrate gcc 4.9! */
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if (fp_as_gp_p) {
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SET_HARD_REG_BIT(this_target_ira_int->x_no_unit_alloc_regs, FP_REGNUM);
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df_set_regs_ever_live (FP_REGNUM, 1);
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} else {
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CLEAR_HARD_REG_BIT(this_target_ira_int->x_no_unit_alloc_regs, FP_REGNUM);
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}
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cfun->machine->fp_as_gp_p = fp_as_gp_p;
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free_dominance_info (CDI_POST_DOMINATORS);
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return 1;
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}
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const pass_data pass_data_nds32_fp_as_gp =
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{
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RTL_PASS, /* type */
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"fp_as_gp", /* name */
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OPTGROUP_NONE, /* optinfo_flags */
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TV_MACH_DEP, /* tv_id */
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0, /* properties_required */
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0, /* properties_provided */
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0, /* properties_destroyed */
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0, /* todo_flags_start */
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0 /* todo_flags_finish */
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};
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class pass_nds32_fp_as_gp : public rtl_opt_pass
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{
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public:
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pass_nds32_fp_as_gp (gcc::context *ctxt)
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: rtl_opt_pass (pass_data_nds32_fp_as_gp, ctxt)
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{}
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/* opt_pass methods: */
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bool gate (function *)
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{
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return TARGET_16_BIT
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&& optimize_size;
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}
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unsigned int execute (function *) { return nds32_fp_as_gp (); }
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};
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rtl_opt_pass *
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make_pass_nds32_fp_as_gp (gcc::context *ctxt)
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{
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return new pass_nds32_fp_as_gp (ctxt);
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}
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/* ------------------------------------------------------------------------ */
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@ -155,9 +155,8 @@ extern int nds32_adjust_insn_length (rtx_insn *, int);
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/* Auxiliary functions for FP_AS_GP detection. */
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extern int nds32_fp_as_gp_check_available (void);
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extern bool nds32_symbol_load_store_p (rtx_insn *);
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extern bool nds32_naked_function_p (tree);
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/* Auxiliary functions for jump table generation. */
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@ -367,5 +366,6 @@ extern bool nds32_use_load_post_increment(machine_mode);
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/* Functions for create nds32 specific optimization pass. */
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extern rtl_opt_pass *make_pass_nds32_relax_opt (gcc::context *);
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extern rtl_opt_pass *make_pass_nds32_fp_as_gp (gcc::context *);
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/* ------------------------------------------------------------------------ */
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@ -1391,7 +1391,7 @@ nds32_needs_double_word_align (machine_mode mode, const_tree type)
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}
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/* Return true if FUNC is a naked function. */
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static bool
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bool
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nds32_naked_function_p (tree func)
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{
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/* FOR BACKWARD COMPATIBILITY,
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@ -1626,6 +1626,11 @@ nds32_register_pass (
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static void
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nds32_register_passes (void)
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{
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nds32_register_pass (
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make_pass_nds32_fp_as_gp,
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PASS_POS_INSERT_BEFORE,
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"ira");
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nds32_register_pass (
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make_pass_nds32_relax_opt,
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PASS_POS_INSERT_AFTER,
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@ -2191,56 +2196,12 @@ static void
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nds32_asm_function_end_prologue (FILE *file)
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{
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fprintf (file, "\t! END PROLOGUE\n");
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/* If frame pointer is NOT needed and -mfp-as-gp is issued,
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we can generate special directive: ".omit_fp_begin"
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to guide linker doing fp-as-gp optimization.
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However, for a naked function, which means
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it should not have prologue/epilogue,
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using fp-as-gp still requires saving $fp by push/pop behavior and
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there is no benefit to use fp-as-gp on such small function.
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So we need to make sure this function is NOT naked as well. */
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if (!frame_pointer_needed
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&& !cfun->machine->naked_p
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&& cfun->machine->fp_as_gp_p)
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{
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fprintf (file, "\t! ----------------------------------------\n");
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fprintf (file, "\t! Guide linker to do "
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"link time optimization: fp-as-gp\n");
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fprintf (file, "\t! We add one more instruction to "
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"initialize $fp near to $gp location.\n");
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fprintf (file, "\t! If linker fails to use fp-as-gp transformation,\n");
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fprintf (file, "\t! this extra instruction should be "
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"eliminated at link stage.\n");
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fprintf (file, "\t.omit_fp_begin\n");
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fprintf (file, "\tla\t$fp,_FP_BASE_\n");
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fprintf (file, "\t! ----------------------------------------\n");
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}
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}
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/* Before rtl epilogue has been expanded, this function is used. */
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static void
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nds32_asm_function_begin_epilogue (FILE *file)
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{
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/* If frame pointer is NOT needed and -mfp-as-gp is issued,
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we can generate special directive: ".omit_fp_end"
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to claim fp-as-gp optimization range.
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However, for a naked function,
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which means it should not have prologue/epilogue,
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using fp-as-gp still requires saving $fp by push/pop behavior and
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there is no benefit to use fp-as-gp on such small function.
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So we need to make sure this function is NOT naked as well. */
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if (!frame_pointer_needed
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&& !cfun->machine->naked_p
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&& cfun->machine->fp_as_gp_p)
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{
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fprintf (file, "\t! ----------------------------------------\n");
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fprintf (file, "\t! Claim the range of fp-as-gp "
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"link time optimization\n");
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fprintf (file, "\t.omit_fp_end\n");
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fprintf (file, "\t! ----------------------------------------\n");
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}
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fprintf (file, "\t! BEGIN EPILOGUE\n");
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}
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@ -3168,6 +3129,18 @@ nds32_asm_file_start (void)
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"for checking inconsistency on interrupt handler\n");
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fprintf (asm_out_file, "\t.vec_size\t%d\n", nds32_isr_vector_size);
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/* If user enables '-mforce-fp-as-gp' or compiles programs with -Os,
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the compiler may produce 'la $fp,_FP_BASE_' instruction
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at prologue for fp-as-gp optimization.
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We should emit weak reference of _FP_BASE_ to avoid undefined reference
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in case user does not pass '--relax' option to linker. */
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if (TARGET_FORCE_FP_AS_GP || optimize_size)
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{
|
||||
fprintf (asm_out_file, "\t! This weak reference is required to do "
|
||||
"fp-as-gp link time optimization\n");
|
||||
fprintf (asm_out_file, "\t.weak\t_FP_BASE_\n");
|
||||
}
|
||||
|
||||
fprintf (asm_out_file, "\t! ------------------------------------\n");
|
||||
|
||||
if (TARGET_ISA_V2)
|
||||
|
|
@ -4126,6 +4099,12 @@ nds32_option_override (void)
|
|||
fixed_regs[r] = call_used_regs[r] = 1;
|
||||
}
|
||||
|
||||
/* See if user explicitly would like to use fp-as-gp optimization.
|
||||
If so, we must prevent $fp from being allocated
|
||||
during register allocation. */
|
||||
if (TARGET_FORCE_FP_AS_GP)
|
||||
fixed_regs[FP_REGNUM] = call_used_regs[FP_REGNUM] = 1;
|
||||
|
||||
if (!TARGET_16_BIT)
|
||||
{
|
||||
/* Under no 16 bit ISA, we need to strictly disable TARGET_V3PUSH. */
|
||||
|
|
@ -4544,6 +4523,10 @@ nds32_expand_prologue (void)
|
|||
The result will be in cfun->machine. */
|
||||
nds32_compute_stack_frame ();
|
||||
|
||||
/* Check frame_pointer_needed again to prevent fp is need after reload. */
|
||||
if (frame_pointer_needed)
|
||||
cfun->machine->fp_as_gp_p = false;
|
||||
|
||||
/* If this is a variadic function, first we need to push argument
|
||||
registers that hold the unnamed argument value. */
|
||||
if (cfun->machine->va_args_size != 0)
|
||||
|
|
@ -4951,6 +4934,10 @@ nds32_expand_prologue_v3push (void)
|
|||
if (cfun->machine->callee_saved_gpr_regs_size > 0)
|
||||
df_set_regs_ever_live (FP_REGNUM, 1);
|
||||
|
||||
/* Check frame_pointer_needed again to prevent fp is need after reload. */
|
||||
if (frame_pointer_needed)
|
||||
cfun->machine->fp_as_gp_p = false;
|
||||
|
||||
/* If the function is 'naked',
|
||||
we do not have to generate prologue code fragment. */
|
||||
if (cfun->machine->naked_p && !flag_pic)
|
||||
|
|
|
|||
|
|
@ -1830,12 +1830,33 @@
|
|||
nds32_expand_prologue_v3push ();
|
||||
else
|
||||
nds32_expand_prologue ();
|
||||
|
||||
/* If cfun->machine->fp_as_gp_p is true, we can generate special
|
||||
directive to guide linker doing fp-as-gp optimization.
|
||||
However, for a naked function, which means
|
||||
it should not have prologue/epilogue,
|
||||
using fp-as-gp still requires saving $fp by push/pop behavior and
|
||||
there is no benefit to use fp-as-gp on such small function.
|
||||
So we need to make sure this function is NOT naked as well. */
|
||||
if (cfun->machine->fp_as_gp_p && !cfun->machine->naked_p)
|
||||
emit_insn (gen_omit_fp_begin (gen_rtx_REG (SImode, FP_REGNUM)));
|
||||
|
||||
DONE;
|
||||
})
|
||||
|
||||
(define_expand "epilogue" [(const_int 0)]
|
||||
""
|
||||
{
|
||||
/* If cfun->machine->fp_as_gp_p is true, we can generate special
|
||||
directive to guide linker doing fp-as-gp optimization.
|
||||
However, for a naked function, which means
|
||||
it should not have prologue/epilogue,
|
||||
using fp-as-gp still requires saving $fp by push/pop behavior and
|
||||
there is no benefit to use fp-as-gp on such small function.
|
||||
So we need to make sure this function is NOT naked as well. */
|
||||
if (cfun->machine->fp_as_gp_p && !cfun->machine->naked_p)
|
||||
emit_insn (gen_omit_fp_end (gen_rtx_REG (SImode, FP_REGNUM)));
|
||||
|
||||
/* Note that only under V3/V3M ISA, we could use v3pop epilogue.
|
||||
In addition, we need to check if v3push is indeed available. */
|
||||
if (NDS32_V3PUSH_AVAILABLE_P)
|
||||
|
|
@ -1935,7 +1956,8 @@
|
|||
"nds32_can_use_return_insn ()"
|
||||
{
|
||||
/* Emit as the simple return. */
|
||||
if (cfun->machine->naked_p
|
||||
if (!cfun->machine->fp_as_gp_p
|
||||
&& cfun->machine->naked_p
|
||||
&& (cfun->machine->va_args_size == 0))
|
||||
{
|
||||
emit_jump_insn (gen_return_internal ());
|
||||
|
|
@ -1945,9 +1967,14 @@
|
|||
|
||||
;; This pattern is expanded only by the shrink-wrapping optimization
|
||||
;; on paths where the function prologue has not been executed.
|
||||
;; However, such optimization may reorder the prologue/epilogue blocks
|
||||
;; together with basic blocks within function body.
|
||||
;; So we must disable this pattern if we have already decided
|
||||
;; to perform fp_as_gp optimization, which requires prologue to be
|
||||
;; first block and epilogue to be last block.
|
||||
(define_expand "simple_return"
|
||||
[(simple_return)]
|
||||
""
|
||||
"!cfun->machine->fp_as_gp_p"
|
||||
""
|
||||
)
|
||||
|
||||
|
|
@ -2162,6 +2189,25 @@
|
|||
[(set_attr "length" "0")]
|
||||
)
|
||||
|
||||
;; Output .omit_fp_begin for fp-as-gp optimization.
|
||||
;; Also we have to set $fp register.
|
||||
(define_insn "omit_fp_begin"
|
||||
[(set (match_operand:SI 0 "register_operand" "=x")
|
||||
(unspec_volatile:SI [(const_int 0)] UNSPEC_VOLATILE_OMIT_FP_BEGIN))]
|
||||
""
|
||||
"! -----\;.omit_fp_begin\;la\t$fp,_FP_BASE_\;! -----"
|
||||
[(set_attr "length" "8")]
|
||||
)
|
||||
|
||||
;; Output .omit_fp_end for fp-as-gp optimization.
|
||||
;; Claim that we have to use $fp register.
|
||||
(define_insn "omit_fp_end"
|
||||
[(unspec_volatile:SI [(match_operand:SI 0 "register_operand" "x")] UNSPEC_VOLATILE_OMIT_FP_END)]
|
||||
""
|
||||
"! -----\;.omit_fp_end\;! -----"
|
||||
[(set_attr "length" "0")]
|
||||
)
|
||||
|
||||
(define_insn "pop25return"
|
||||
[(return)
|
||||
(unspec_volatile:SI [(reg:SI LP_REGNUM)] UNSPEC_VOLATILE_POP25_RETURN)]
|
||||
|
|
|
|||
|
|
@ -32,6 +32,13 @@ EL
|
|||
Target RejectNegative Alias(mlittle-endian)
|
||||
Generate code in little-endian mode.
|
||||
|
||||
mfp-as-gp
|
||||
Target RejectNegative Alias(mforce-fp-as-gp)
|
||||
Force performing fp-as-gp optimization.
|
||||
|
||||
mno-fp-as-gp
|
||||
Target RejectNegative Alias(mforbid-fp-as-gp)
|
||||
Forbid performing fp-as-gp optimization.
|
||||
|
||||
; ---------------------------------------------------------------
|
||||
|
||||
|
|
@ -85,6 +92,14 @@ mlittle-endian
|
|||
Target Undocumented RejectNegative Negative(mbig-endian) InverseMask(BIG_ENDIAN)
|
||||
Generate code in little-endian mode.
|
||||
|
||||
mforce-fp-as-gp
|
||||
Target Undocumented Mask(FORCE_FP_AS_GP)
|
||||
Prevent $fp being allocated during register allocation so that compiler is able to force performing fp-as-gp optimization.
|
||||
|
||||
mforbid-fp-as-gp
|
||||
Target Undocumented Mask(FORBID_FP_AS_GP)
|
||||
Forbid using $fp to access static and global variables. This option strictly forbids fp-as-gp optimization regardless of '-mforce-fp-as-gp'.
|
||||
|
||||
mict-model=
|
||||
Target Undocumented RejectNegative Joined Enum(nds32_ict_model_type) Var(nds32_ict_model) Init(ICT_MODEL_SMALL)
|
||||
Specify the address generation strategy for ICT call's code model.
|
||||
|
|
|
|||
Loading…
Reference in New Issue