ia64.c (move_operand): Allow symbolic_operand, but not tls_symbolic_operand.
* config/ia64/ia64.c (move_operand): Allow symbolic_operand, but not tls_symbolic_operand. (ia64_expand_load_address): Remove scratch operand. (ia64_expand_tls_address): Split out from ia64_expand_move. (ia64_expand_move): Split symbolics only after reload. (ia64_emit_cond_move): New. * config/ia64/ia64-protos.h: Update. * config/ia64/ia64.md (movsi_symbolic, movdi_symbolic): Remove. (symbolic splitter): Accept SImode operands too. (cmove splitter): Use ia64_emit_cond_move. From-SVN: r65399
This commit is contained in:
parent
66d6bf1fcc
commit
21515593f6
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@ -1,3 +1,16 @@
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2003-04-09 Richard Henderson <rth@redhat.com>
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* config/ia64/ia64.c (move_operand): Allow symbolic_operand,
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but not tls_symbolic_operand.
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(ia64_expand_load_address): Remove scratch operand.
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(ia64_expand_tls_address): Split out from ia64_expand_move.
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(ia64_expand_move): Split symbolics only after reload.
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(ia64_emit_cond_move): New.
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* config/ia64/ia64-protos.h: Update.
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* config/ia64/ia64.md (movsi_symbolic, movdi_symbolic): Remove.
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(symbolic splitter): Accept SImode operands too.
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(cmove splitter): Use ia64_emit_cond_move.
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2003-04-09 Nick Clifton <nickc@redhat.com>
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* doc/install.texi: Note that ARM toolchains need binutils 2.13 or
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@ -76,6 +76,7 @@ extern int basereg_operand PARAMS((rtx, enum machine_mode));
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extern rtx ia64_expand_move PARAMS ((rtx, rtx));
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extern int ia64_move_ok PARAMS((rtx, rtx));
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extern void ia64_emit_cond_move PARAMS((rtx, rtx, rtx));
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extern int ia64_depz_field_mask PARAMS((rtx, rtx));
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extern rtx ia64_split_timode PARAMS((rtx[], rtx, rtx));
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extern rtx spill_tfmode_operand PARAMS((rtx, int));
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@ -89,7 +90,7 @@ extern void ia64_expand_prologue PARAMS((void));
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extern void ia64_expand_epilogue PARAMS((int));
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extern int ia64_direct_return PARAMS((void));
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extern void ia64_expand_load_address PARAMS((rtx, rtx, rtx));
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extern void ia64_expand_load_address PARAMS((rtx, rtx));
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extern int ia64_hard_regno_rename_ok PARAMS((int, int));
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extern void ia64_initialize_trampoline PARAMS((rtx, rtx, rtx));
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@ -165,6 +165,7 @@ static int ia64_first_cycle_multipass_dfa_lookahead_guard PARAMS ((rtx));
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static int ia64_dfa_new_cycle PARAMS ((FILE *, int, rtx, int, int, int *));
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static rtx gen_tls_get_addr PARAMS ((void));
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static rtx gen_thread_pointer PARAMS ((void));
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static rtx ia64_expand_tls_address PARAMS ((enum tls_model, rtx, rtx));
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static int find_gr_spill PARAMS ((int));
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static int next_scratch_gr_reg PARAMS ((void));
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static void mark_reg_gr_used_mask PARAMS ((rtx, void *));
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@ -564,21 +565,14 @@ setjmp_operand (op, mode)
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return retval;
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}
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/* Return 1 if OP is a general operand, but when pic exclude symbolic
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operands. */
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/* ??? If we drop no-pic support, can delete SYMBOL_REF, CONST, and LABEL_REF
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from PREDICATE_CODES. */
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/* Return 1 if OP is a general operand, excluding tls symbolic operands. */
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int
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move_operand (op, mode)
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rtx op;
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enum machine_mode mode;
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{
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if (! TARGET_NO_PIC && symbolic_operand (op, mode))
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return 0;
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return general_operand (op, mode);
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return general_operand (op, mode) && !tls_symbolic_operand (op, mode);
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}
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/* Return 1 if OP is a register operand that is (or could be) a GR reg. */
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@ -1099,40 +1093,37 @@ ia64_depz_field_mask (rop, rshift)
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}
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/* Expand a symbolic constant load. */
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/* ??? Should generalize this, so that we can also support 32 bit pointers. */
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void
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ia64_expand_load_address (dest, src, scratch)
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rtx dest, src, scratch;
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ia64_expand_load_address (dest, src)
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rtx dest, src;
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{
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rtx temp;
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/* The destination could be a MEM during initial rtl generation,
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which isn't a valid destination for the PIC load address patterns. */
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if (! register_operand (dest, DImode))
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if (! scratch || ! register_operand (scratch, DImode))
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temp = gen_reg_rtx (DImode);
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else
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temp = scratch;
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else
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temp = dest;
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if (tls_symbolic_operand (src, Pmode))
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if (tls_symbolic_operand (src, VOIDmode))
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abort ();
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if (GET_CODE (dest) != REG)
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abort ();
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if (TARGET_AUTO_PIC)
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emit_insn (gen_load_gprel64 (temp, src));
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else if (GET_CODE (src) == SYMBOL_REF && SYMBOL_REF_FLAG (src))
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emit_insn (gen_load_fptr (temp, src));
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else if ((GET_MODE (src) == Pmode || GET_MODE (src) == ptr_mode)
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&& sdata_symbolic_operand (src, VOIDmode))
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emit_insn (gen_load_gprel (temp, src));
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else if (GET_CODE (src) == CONST
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&& GET_CODE (XEXP (src, 0)) == PLUS
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&& GET_CODE (XEXP (XEXP (src, 0), 1)) == CONST_INT
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&& (INTVAL (XEXP (XEXP (src, 0), 1)) & 0x1fff) != 0)
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{
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rtx subtarget = no_new_pseudos ? temp : gen_reg_rtx (DImode);
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emit_insn (gen_load_gprel64 (dest, src));
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return;
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}
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else if (GET_CODE (src) == SYMBOL_REF && SYMBOL_REF_FLAG (src))
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{
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emit_insn (gen_load_fptr (dest, src));
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return;
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}
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else if (sdata_symbolic_operand (src, VOIDmode))
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{
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emit_insn (gen_load_gprel (dest, src));
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return;
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}
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if (GET_CODE (src) == CONST
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&& GET_CODE (XEXP (src, 0)) == PLUS
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&& GET_CODE (XEXP (XEXP (src, 0), 1)) == CONST_INT
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&& (INTVAL (XEXP (XEXP (src, 0), 1)) & 0x1fff) != 0)
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{
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rtx sym = XEXP (XEXP (src, 0), 0);
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HOST_WIDE_INT ofs, hi, lo;
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@ -1142,33 +1133,11 @@ ia64_expand_load_address (dest, src, scratch)
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lo = ((ofs & 0x3fff) ^ 0x2000) - 0x2000;
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hi = ofs - lo;
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if (! scratch)
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scratch = no_new_pseudos ? subtarget : gen_reg_rtx (DImode);
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emit_insn (gen_load_symptr (subtarget, plus_constant (sym, hi),
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scratch));
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emit_insn (gen_adddi3 (temp, subtarget, GEN_INT (lo)));
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emit_insn (gen_load_symptr (dest, plus_constant (sym, hi), dest));
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emit_insn (gen_adddi3 (dest, dest, GEN_INT (lo)));
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}
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else
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{
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rtx insn;
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if (! scratch)
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scratch = no_new_pseudos ? temp : gen_reg_rtx (DImode);
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insn = emit_insn (gen_load_symptr (temp, src, scratch));
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#ifdef POINTERS_EXTEND_UNSIGNED
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if (GET_MODE (temp) != GET_MODE (src))
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src = convert_memory_address (GET_MODE (temp), src);
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#endif
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REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, src, REG_NOTES (insn));
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}
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if (temp != dest)
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{
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if (GET_MODE (dest) != GET_MODE (temp))
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temp = convert_to_mode (GET_MODE (dest), temp, 0);
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emit_move_insn (dest, temp);
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}
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emit_insn (gen_load_symptr (dest, src, dest));
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}
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static GTY(()) rtx gen_tls_tga;
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@ -1176,9 +1145,7 @@ static rtx
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gen_tls_get_addr ()
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{
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if (!gen_tls_tga)
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{
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gen_tls_tga = init_one_libfunc ("__tls_get_addr");
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}
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gen_tls_tga = init_one_libfunc ("__tls_get_addr");
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return gen_tls_tga;
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}
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@ -1194,6 +1161,113 @@ gen_thread_pointer ()
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return thread_pointer_rtx;
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}
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static rtx
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ia64_expand_tls_address (tls_kind, op0, op1)
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enum tls_model tls_kind;
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rtx op0, op1;
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{
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rtx tga_op1, tga_op2, tga_ret, tga_eqv, tmp, insns;
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switch (tls_kind)
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{
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case TLS_MODEL_GLOBAL_DYNAMIC:
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start_sequence ();
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tga_op1 = gen_reg_rtx (Pmode);
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emit_insn (gen_load_ltoff_dtpmod (tga_op1, op1));
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tga_op1 = gen_rtx_MEM (Pmode, tga_op1);
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RTX_UNCHANGING_P (tga_op1) = 1;
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tga_op2 = gen_reg_rtx (Pmode);
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emit_insn (gen_load_ltoff_dtprel (tga_op2, op1));
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tga_op2 = gen_rtx_MEM (Pmode, tga_op2);
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RTX_UNCHANGING_P (tga_op2) = 1;
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tga_ret = emit_library_call_value (gen_tls_get_addr (), NULL_RTX,
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LCT_CONST, Pmode, 2, tga_op1,
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Pmode, tga_op2, Pmode);
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insns = get_insns ();
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end_sequence ();
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emit_libcall_block (insns, op0, tga_ret, op1);
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return NULL_RTX;
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case TLS_MODEL_LOCAL_DYNAMIC:
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/* ??? This isn't the completely proper way to do local-dynamic
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If the call to __tls_get_addr is used only by a single symbol,
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then we should (somehow) move the dtprel to the second arg
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to avoid the extra add. */
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start_sequence ();
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tga_op1 = gen_reg_rtx (Pmode);
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emit_insn (gen_load_ltoff_dtpmod (tga_op1, op1));
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tga_op1 = gen_rtx_MEM (Pmode, tga_op1);
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RTX_UNCHANGING_P (tga_op1) = 1;
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tga_op2 = const0_rtx;
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tga_ret = emit_library_call_value (gen_tls_get_addr (), NULL_RTX,
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LCT_CONST, Pmode, 2, tga_op1,
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Pmode, tga_op2, Pmode);
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insns = get_insns ();
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end_sequence ();
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tga_eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
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UNSPEC_LD_BASE);
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tmp = gen_reg_rtx (Pmode);
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emit_libcall_block (insns, tmp, tga_ret, tga_eqv);
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if (register_operand (op0, Pmode))
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tga_ret = op0;
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else
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tga_ret = gen_reg_rtx (Pmode);
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if (TARGET_TLS64)
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{
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emit_insn (gen_load_dtprel (tga_ret, op1));
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emit_insn (gen_adddi3 (tga_ret, tmp, tga_ret));
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}
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else
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emit_insn (gen_add_dtprel (tga_ret, tmp, op1));
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return (tga_ret == op0 ? NULL_RTX : tga_ret);
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case TLS_MODEL_INITIAL_EXEC:
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tmp = gen_reg_rtx (Pmode);
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emit_insn (gen_load_ltoff_tprel (tmp, op1));
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tmp = gen_rtx_MEM (Pmode, tmp);
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RTX_UNCHANGING_P (tmp) = 1;
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tmp = force_reg (Pmode, tmp);
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if (register_operand (op0, Pmode))
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op1 = op0;
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else
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op1 = gen_reg_rtx (Pmode);
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emit_insn (gen_adddi3 (op1, tmp, gen_thread_pointer ()));
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return (op1 == op0 ? NULL_RTX : op1);
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case TLS_MODEL_LOCAL_EXEC:
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if (register_operand (op0, Pmode))
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tmp = op0;
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else
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tmp = gen_reg_rtx (Pmode);
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if (TARGET_TLS64)
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{
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emit_insn (gen_load_tprel (tmp, op1));
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emit_insn (gen_adddi3 (tmp, gen_thread_pointer (), tmp));
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}
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else
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emit_insn (gen_add_tprel (tmp, gen_thread_pointer (), op1));
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return (tmp == op0 ? NULL_RTX : tmp);
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default:
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abort ();
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}
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}
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rtx
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ia64_expand_move (op0, op1)
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rtx op0, op1;
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@ -1203,149 +1277,15 @@ ia64_expand_move (op0, op1)
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if (!reload_in_progress && !reload_completed && !ia64_move_ok (op0, op1))
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op1 = force_reg (mode, op1);
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if (mode == Pmode || mode == ptr_mode)
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if ((mode == Pmode || mode == ptr_mode) && symbolic_operand (op1, VOIDmode))
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{
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enum tls_model tls_kind;
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if ((tls_kind = tls_symbolic_operand (op1, Pmode)))
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if ((tls_kind = tls_symbolic_operand (op1, VOIDmode)))
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return ia64_expand_tls_address (tls_kind, op0, op1);
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if (!TARGET_NO_PIC && reload_completed)
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{
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rtx tga_op1, tga_op2, tga_ret, tga_eqv, tmp, insns;
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switch (tls_kind)
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{
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case TLS_MODEL_GLOBAL_DYNAMIC:
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start_sequence ();
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tga_op1 = gen_reg_rtx (Pmode);
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emit_insn (gen_load_ltoff_dtpmod (tga_op1, op1));
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tga_op1 = gen_rtx_MEM (Pmode, tga_op1);
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RTX_UNCHANGING_P (tga_op1) = 1;
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tga_op2 = gen_reg_rtx (Pmode);
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emit_insn (gen_load_ltoff_dtprel (tga_op2, op1));
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tga_op2 = gen_rtx_MEM (Pmode, tga_op2);
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RTX_UNCHANGING_P (tga_op2) = 1;
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tga_ret = emit_library_call_value (gen_tls_get_addr (), NULL_RTX,
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LCT_CONST, Pmode, 2, tga_op1,
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Pmode, tga_op2, Pmode);
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insns = get_insns ();
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end_sequence ();
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emit_libcall_block (insns, op0, tga_ret, op1);
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return NULL_RTX;
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case TLS_MODEL_LOCAL_DYNAMIC:
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/* ??? This isn't the completely proper way to do local-dynamic
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If the call to __tls_get_addr is used only by a single symbol,
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then we should (somehow) move the dtprel to the second arg
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to avoid the extra add. */
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start_sequence ();
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tga_op1 = gen_reg_rtx (Pmode);
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emit_insn (gen_load_ltoff_dtpmod (tga_op1, op1));
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tga_op1 = gen_rtx_MEM (Pmode, tga_op1);
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RTX_UNCHANGING_P (tga_op1) = 1;
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tga_op2 = const0_rtx;
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tga_ret = emit_library_call_value (gen_tls_get_addr (), NULL_RTX,
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LCT_CONST, Pmode, 2, tga_op1,
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Pmode, tga_op2, Pmode);
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insns = get_insns ();
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end_sequence ();
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tga_eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
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UNSPEC_LD_BASE);
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tmp = gen_reg_rtx (Pmode);
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emit_libcall_block (insns, tmp, tga_ret, tga_eqv);
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if (register_operand (op0, Pmode))
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tga_ret = op0;
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else
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tga_ret = gen_reg_rtx (Pmode);
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if (TARGET_TLS64)
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{
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emit_insn (gen_load_dtprel (tga_ret, op1));
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emit_insn (gen_adddi3 (tga_ret, tmp, tga_ret));
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}
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else
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emit_insn (gen_add_dtprel (tga_ret, tmp, op1));
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if (tga_ret == op0)
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return NULL_RTX;
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op1 = tga_ret;
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break;
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case TLS_MODEL_INITIAL_EXEC:
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tmp = gen_reg_rtx (Pmode);
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emit_insn (gen_load_ltoff_tprel (tmp, op1));
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tmp = gen_rtx_MEM (Pmode, tmp);
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RTX_UNCHANGING_P (tmp) = 1;
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tmp = force_reg (Pmode, tmp);
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if (register_operand (op0, Pmode))
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op1 = op0;
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else
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op1 = gen_reg_rtx (Pmode);
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emit_insn (gen_adddi3 (op1, tmp, gen_thread_pointer ()));
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if (op1 == op0)
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return NULL_RTX;
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break;
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case TLS_MODEL_LOCAL_EXEC:
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if (register_operand (op0, Pmode))
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tmp = op0;
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else
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tmp = gen_reg_rtx (Pmode);
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if (TARGET_TLS64)
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{
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emit_insn (gen_load_tprel (tmp, op1));
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emit_insn (gen_adddi3 (tmp, gen_thread_pointer (), tmp));
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}
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else
|
||||
emit_insn (gen_add_tprel (tmp, gen_thread_pointer (), op1));
|
||||
if (tmp == op0)
|
||||
return NULL_RTX;
|
||||
op1 = tmp;
|
||||
break;
|
||||
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
}
|
||||
else if (!TARGET_NO_PIC &&
|
||||
(symbolic_operand (op1, Pmode) ||
|
||||
symbolic_operand (op1, ptr_mode)))
|
||||
{
|
||||
/* Before optimization starts, delay committing to any particular
|
||||
type of PIC address load. If this function gets deferred, we
|
||||
may acquire information that changes the value of the
|
||||
sdata_symbolic_operand predicate.
|
||||
|
||||
But don't delay for function pointers. Loading a function address
|
||||
actually loads the address of the descriptor not the function.
|
||||
If we represent these as SYMBOL_REFs, then they get cse'd with
|
||||
calls, and we end up with calls to the descriptor address instead
|
||||
of calls to the function address. Functions are not candidates
|
||||
for sdata anyways.
|
||||
|
||||
Don't delay for LABEL_REF because the splitter loses REG_LABEL
|
||||
notes. Don't delay for pool addresses on general principals;
|
||||
they'll never become non-local behind our back. */
|
||||
|
||||
if (rtx_equal_function_value_matters
|
||||
&& GET_CODE (op1) != LABEL_REF
|
||||
&& ! (GET_CODE (op1) == SYMBOL_REF
|
||||
&& (SYMBOL_REF_FLAG (op1)
|
||||
|| CONSTANT_POOL_ADDRESS_P (op1)
|
||||
|| STRING_POOL_ADDRESS_P (op1))))
|
||||
if (GET_MODE (op1) == DImode)
|
||||
emit_insn (gen_movdi_symbolic (op0, op1));
|
||||
else
|
||||
emit_insn (gen_movsi_symbolic (op0, op1));
|
||||
else
|
||||
ia64_expand_load_address (op0, op1, NULL_RTX);
|
||||
ia64_expand_load_address (op0, op1);
|
||||
return NULL_RTX;
|
||||
}
|
||||
}
|
||||
|
@ -1353,6 +1293,22 @@ ia64_expand_move (op0, op1)
|
|||
return op1;
|
||||
}
|
||||
|
||||
/* Split a move from OP1 to OP0 conditional on COND. */
|
||||
|
||||
void
|
||||
ia64_emit_cond_move (op0, op1, cond)
|
||||
rtx op0, op1, cond;
|
||||
{
|
||||
rtx insn, first = get_last_insn ();
|
||||
|
||||
emit_move_insn (op0, op1);
|
||||
|
||||
for (insn = get_last_insn (); insn != first; insn = PREV_INSN (insn))
|
||||
if (INSN_P (insn))
|
||||
PATTERN (insn) = gen_rtx_COND_EXEC (VOIDmode, copy_rtx (cond),
|
||||
PATTERN (insn));
|
||||
}
|
||||
|
||||
/* Split a post-reload TImode reference into two DImode components. */
|
||||
|
||||
rtx
|
||||
|
|
|
@ -292,29 +292,6 @@
|
|||
operands[1] = op1;
|
||||
})
|
||||
|
||||
;; This is used during early compilation to delay the decision on
|
||||
;; how to refer to a variable as long as possible. This is especially
|
||||
;; important between initial rtl generation and optimization for
|
||||
;; deferred functions, since we may acquire additional information
|
||||
;; on the variables used in the meantime.
|
||||
|
||||
(define_insn_and_split "movsi_symbolic"
|
||||
[(set (match_operand:SI 0 "register_operand" "=r")
|
||||
(match_operand:SI 1 "symbolic_operand" "s"))
|
||||
(clobber (match_scratch:DI 2 "=r"))
|
||||
(use (reg:DI 1))]
|
||||
""
|
||||
"* abort ();"
|
||||
"!no_new_pseudos || reload_completed"
|
||||
[(const_int 0)]
|
||||
{
|
||||
rtx scratch = operands[2];
|
||||
if (!reload_completed)
|
||||
scratch = gen_reg_rtx (Pmode);
|
||||
ia64_expand_load_address (operands[0], operands[1], scratch);
|
||||
DONE;
|
||||
})
|
||||
|
||||
(define_insn "*movsi_internal"
|
||||
[(set (match_operand:SI 0 "destination_operand" "=r,r,r,r, m, r,*f,*f, r,*d")
|
||||
(match_operand:SI 1 "move_operand" "rO,J,i,m,rO,*f,rO,*f,*d,rK"))]
|
||||
|
@ -344,29 +321,6 @@
|
|||
operands[1] = op1;
|
||||
})
|
||||
|
||||
;; This is used during early compilation to delay the decision on
|
||||
;; how to refer to a variable as long as possible. This is especially
|
||||
;; important between initial rtl generation and optimization for
|
||||
;; deferred functions, since we may acquire additional information
|
||||
;; on the variables used in the meantime.
|
||||
|
||||
(define_insn_and_split "movdi_symbolic"
|
||||
[(set (match_operand:DI 0 "register_operand" "=r")
|
||||
(match_operand:DI 1 "symbolic_operand" "s"))
|
||||
(clobber (match_scratch:DI 2 "=r"))
|
||||
(use (reg:DI 1))]
|
||||
""
|
||||
"* abort ();"
|
||||
"!no_new_pseudos || reload_completed"
|
||||
[(const_int 0)]
|
||||
{
|
||||
rtx scratch = operands[2];
|
||||
if (!reload_completed)
|
||||
scratch = gen_reg_rtx (Pmode);
|
||||
ia64_expand_load_address (operands[0], operands[1], scratch);
|
||||
DONE;
|
||||
})
|
||||
|
||||
(define_insn "*movdi_internal"
|
||||
[(set (match_operand:DI 0 "destination_operand"
|
||||
"=r,r,r,r, m, r,*f,*f,*f, Q, r,*b, r,*e, r,*d, r,*c")
|
||||
|
@ -404,12 +358,12 @@
|
|||
[(set_attr "itanium_class" "ialu,ialu,long_i,ld,st,frfr,tofr,fmisc,fld,stf,frbr,tobr,frar_i,toar_i,frar_m,toar_m,frpr,topr")])
|
||||
|
||||
(define_split
|
||||
[(set (match_operand:DI 0 "register_operand" "")
|
||||
(match_operand:DI 1 "symbolic_operand" ""))]
|
||||
[(set (match_operand 0 "register_operand" "")
|
||||
(match_operand 1 "symbolic_operand" ""))]
|
||||
"reload_completed && ! TARGET_NO_PIC"
|
||||
[(const_int 0)]
|
||||
{
|
||||
ia64_expand_load_address (operands[0], operands[1], NULL_RTX);
|
||||
ia64_expand_load_address (operands[0], operands[1]);
|
||||
DONE;
|
||||
})
|
||||
|
||||
|
@ -4452,26 +4406,23 @@
|
|||
"reload_completed"
|
||||
[(const_int 0)]
|
||||
{
|
||||
rtx tmp;
|
||||
int emitted_something;
|
||||
bool emitted_something = false;
|
||||
rtx dest = operands[0];
|
||||
rtx srct = operands[2];
|
||||
rtx srcf = operands[3];
|
||||
rtx cond = operands[4];
|
||||
|
||||
emitted_something = 0;
|
||||
if (! rtx_equal_p (operands[0], operands[2]))
|
||||
if (! rtx_equal_p (dest, srct))
|
||||
{
|
||||
tmp = gen_rtx_SET (VOIDmode, operands[0], operands[2]);
|
||||
tmp = gen_rtx_COND_EXEC (VOIDmode, operands[4], tmp);
|
||||
emit_insn (tmp);
|
||||
emitted_something = 1;
|
||||
ia64_emit_cond_move (dest, srct, cond);
|
||||
emitted_something = true;
|
||||
}
|
||||
if (! rtx_equal_p (operands[0], operands[3]))
|
||||
if (! rtx_equal_p (dest, srcf))
|
||||
{
|
||||
tmp = gen_rtx_fmt_ee (GET_CODE (operands[4]) == NE ? EQ : NE,
|
||||
VOIDmode, operands[1], const0_rtx);
|
||||
tmp = gen_rtx_COND_EXEC (VOIDmode, tmp,
|
||||
gen_rtx_SET (VOIDmode, operands[0],
|
||||
operands[3]));
|
||||
emit_insn (tmp);
|
||||
emitted_something = 1;
|
||||
cond = gen_rtx_fmt_ee (GET_CODE (cond) == NE ? EQ : NE,
|
||||
VOIDmode, operands[1], const0_rtx);
|
||||
ia64_emit_cond_move (dest, srcf, cond);
|
||||
emitted_something = true;
|
||||
}
|
||||
if (! emitted_something)
|
||||
emit_note (NULL, NOTE_INSN_DELETED);
|
||||
|
|
Loading…
Reference in New Issue