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change local vars to rtx_insn * 

gcc/ChangeLog:

2015-05-02  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* builtins.c (expand_builtin_trap): Change type of local
	variable to rtx_insn *.
	* config/arc/arc.md: Likewise.
	* config/arm/arm.c (arm_barrier_cost): Likewise.
	* config/avr/avr.c (avr_reorg): Likewise.
	* config/bfin/bfin.c (workaround_speculation): Likewise.
	(add_sched_insns_for_speculation): Likewise.
	* config/i386/i386.c (ix86_init_pic_reg): Likewise.
	(ix86_emit_save_regs): Likewise.
	(get_scratch_register_on_entry): Likewise.
	(ix86_emit_restore_reg_using_pop): Likewise.
	(ix86_emit_leave): Likewise.
	(ix86_emit_restore_regs_using_mov): Likewise.
	(ix86_expand_epilogue): Likewise.
	* config/rl78/rl78.c (rl78_alloc_physical_registers_cmp):
	Likewise.
	(rl78_alloc_physical_registers_umul): Likewise.
	* config/sh/sh.md: Likewise.
	* cselib.c (discard_useless_locs): Likewise.
	(cselib_invalidate_regno): Likewise.
	(cselib_invalidate_mem): Likewise.
	* function.c (expand_function_start): Likewise.
	(emit_use_return_register_into_block): Likewise.
	* gcse.c: Likewise.
	* haifa-sched.c (ok_for_early_queue_removal): Likewise.
	* ifcvt.c (noce_get_alt_condition): Likewise.
	* loop-doloop.c (doloop_condition_get): Likewise.
	* lra-constraints.c (inherit_in_ebb): Likewise.
	* modulo-sched.c (sms_schedule_by_order): Likewise.
	* recog.c (next_insn_tests_no_inequality): Likewise.
	* reorg.c (emit_delay_sequence): Likewise.
	(update_reg_dead_notes): Likewise.
	(fix_reg_dead_note): Likewise.
	(fill_slots_from_thread): Likewise.
	(delete_computation): Likewise.

From-SVN: r222730
This commit is contained in:
Trevor Saunders 2015-05-02 21:03:53 +00:00 committed by Trevor Saunders
parent 563777d7fc
commit 21afc57d08
19 changed files with 74 additions and 37 deletions
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31
gcc/ChangeLog
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@ -1,3 +1,34 @@
2015-05-02 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* builtins.c (expand_builtin_trap): Change type of local
variable to rtx_insn *.
(add_sched_insns_for_speculation): Likewise.
(ix86_emit_save_regs): Likewise.
(get_scratch_register_on_entry): Likewise.
(ix86_emit_restore_reg_using_pop): Likewise.
(ix86_emit_leave): Likewise.
(ix86_emit_restore_regs_using_mov): Likewise.
(ix86_expand_epilogue): Likewise.
Likewise.
(rl78_alloc_physical_registers_umul): Likewise.
* cselib.c (discard_useless_locs): Likewise.
(cselib_invalidate_regno): Likewise.
(cselib_invalidate_mem): Likewise.
* function.c (expand_function_start): Likewise.
(emit_use_return_register_into_block): Likewise.
* gcse.c: Likewise.
* haifa-sched.c (ok_for_early_queue_removal): Likewise.
* ifcvt.c (noce_get_alt_condition): Likewise.
* loop-doloop.c (doloop_condition_get): Likewise.
* lra-constraints.c (inherit_in_ebb): Likewise.
* modulo-sched.c (sms_schedule_by_order): Likewise.
* recog.c (next_insn_tests_no_inequality): Likewise.
* reorg.c (emit_delay_sequence): Likewise.
(update_reg_dead_notes): Likewise.
(fix_reg_dead_note): Likewise.
(fill_slots_from_thread): Likewise.
(delete_computation): Likewise.
2015-05-01 Sandra Loosemore <sandra@codesourcery.com>
* doc/extend.texi (Variable Attributes): Add menu and proper

2
gcc/builtins.c
View File

@ -4754,7 +4754,7 @@ expand_builtin_trap (void)
#ifdef HAVE_trap
if (HAVE_trap)
{
rtx insn = emit_insn (gen_trap ());
rtx_insn *insn = emit_insn (gen_trap ());
/* For trap insns when not accumulating outgoing args force
REG_ARGS_SIZE note to prevent crossjumping of calls with
different args sizes. */

4
gcc/config/arc/arc.md
View File

@ -4877,7 +4877,7 @@
{
/* At least four instructions are needed between the setting of LP_COUNT
and the loop end - but the lp instruction qualifies as one. */
rtx prev = prev_nonnote_insn (insn);
rtx_insn *prev = prev_nonnote_insn (insn);
if (!INSN_P (prev) || dead_or_set_regno_p (prev, LP_COUNT))
output_asm_insn ("nop", operands);
@ -4933,7 +4933,7 @@
""
"*
{
rtx prev = prev_nonnote_insn (insn);
rtx_insn *prev = prev_nonnote_insn (insn);
/* If there is an immediately preceding label, we must output a nop,
lest a branch to that label will fall out of the loop.

2
gcc/config/arm/arm.c
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@ -16609,7 +16609,7 @@ arm_barrier_cost (rtx insn)
but at the moment, the basic block information seems to be
corrupt by this stage of the compilation. */
int base_cost = 50;
rtx next = next_nonnote_insn (insn);
rtx_insn *next = next_nonnote_insn (insn);
if (next != NULL && LABEL_P (next))
base_cost -= 20;

2
gcc/config/avr/avr.c
View File

@ -11094,7 +11094,7 @@ avr_reorg (void)
{
/* Now we work under compare insn with difficult branch. */
rtx next = next_real_insn (insn);
rtx_insn *next = next_real_insn (insn);
rtx pat = PATTERN (next);
pattern = SET_SRC (pattern);

4
gcc/config/bfin/bfin.c
View File

@ -4521,7 +4521,7 @@ workaround_speculation (void)
if (delay_needed > cycles_since_jump)
{
rtx prev = prev_real_insn (label);
rtx_insn *prev = prev_real_insn (label);
delay_needed -= cycles_since_jump;
if (dump_file)
fprintf (dump_file, "Adding %d nops after %d\n",
@ -4587,7 +4587,7 @@ add_sched_insns_for_speculation (void)
if (any_condjump_p (insn)
&& !cbranch_predicted_taken_p (insn))
{
rtx n = next_real_insn (insn);
rtx_insn *n = next_real_insn (insn);
emit_insn_before (gen_stall (GEN_INT (3)), n);
}
}

20
gcc/config/i386/i386.c
View File

@ -6407,7 +6407,7 @@ ix86_init_pic_reg (void)
rtx reg = crtl->profile
? gen_rtx_REG (Pmode, REAL_PIC_OFFSET_TABLE_REGNUM)
: pic_offset_table_rtx;
rtx insn = emit_insn (gen_set_got (reg));
rtx_insn *insn = emit_insn (gen_set_got (reg));
RTX_FRAME_RELATED_P (insn) = 1;
if (crtl->profile)
emit_move_insn (pic_offset_table_rtx, reg);
@ -10373,7 +10373,7 @@ static void
ix86_emit_save_regs (void)
{
unsigned int regno;
rtx insn;
rtx_insn *insn;
for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; )
if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true))
@ -10837,7 +10837,7 @@ get_scratch_register_on_entry (struct scratch_reg *sr)
sr->reg = gen_rtx_REG (Pmode, regno);
if (sr->saved)
{
rtx insn = emit_insn (gen_push (sr->reg));
rtx_insn *insn = emit_insn (gen_push (sr->reg));
RTX_FRAME_RELATED_P (insn) = 1;
}
}
@ -11804,7 +11804,7 @@ static void
ix86_emit_restore_reg_using_pop (rtx reg)
{
struct machine_function *m = cfun->machine;
rtx insn = emit_insn (gen_pop (reg));
rtx_insn *insn = emit_insn (gen_pop (reg));
ix86_add_cfa_restore_note (insn, reg, m->fs.sp_offset);
m->fs.sp_offset -= UNITS_PER_WORD;
@ -11874,7 +11874,7 @@ static void
ix86_emit_leave (void)
{
struct machine_function *m = cfun->machine;
rtx insn = emit_insn (ix86_gen_leave ());
rtx_insn *insn = emit_insn (ix86_gen_leave ());
ix86_add_queued_cfa_restore_notes (insn);
@ -11910,7 +11910,8 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset,
if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return))
{
rtx reg = gen_rtx_REG (word_mode, regno);
rtx insn, mem;
rtx mem;
rtx_insn *insn;
mem = choose_baseaddr (cfa_offset);
mem = gen_frame_mem (word_mode, mem);
@ -12082,7 +12083,8 @@ ix86_expand_epilogue (int style)
/* eh_return epilogues need %ecx added to the stack pointer. */
if (style == 2)
{
rtx insn, sa = EH_RETURN_STACKADJ_RTX;
rtx sa = EH_RETURN_STACKADJ_RTX;
rtx_insn *insn;
/* Stack align doesn't work with eh_return. */
gcc_assert (!stack_realign_drap);
@ -12210,7 +12212,7 @@ ix86_expand_epilogue (int style)
if (using_drap)
{
int param_ptr_offset = UNITS_PER_WORD;
rtx insn;
rtx_insn *insn;
gcc_assert (stack_realign_drap);
@ -12272,7 +12274,7 @@ ix86_expand_epilogue (int style)
if (crtl->args.pops_args >= 65536)
{
rtx ecx = gen_rtx_REG (SImode, CX_REG);
rtx insn;
rtx_insn *insn;
/* There is no "pascal" calling convention in any 64bit ABI. */
gcc_assert (!TARGET_64BIT);

4
gcc/config/rl78/rl78.c
View File

@ -3262,7 +3262,7 @@ rl78_alloc_physical_registers_cmp (rtx_insn * insn)
{
int tmp_id;
rtx saved_op1;
rtx prev = prev_nonnote_nondebug_insn (insn);
rtx_insn *prev = prev_nonnote_nondebug_insn (insn);
rtx first;
OP (1) = transcode_memory_rtx (OP (1), DE, insn);
@ -3353,7 +3353,7 @@ rl78_alloc_physical_registers_cmp (rtx_insn * insn)
static void
rl78_alloc_physical_registers_umul (rtx_insn * insn)
{
rtx prev = prev_nonnote_nondebug_insn (insn);
rtx_insn *prev = prev_nonnote_nondebug_insn (insn);
rtx first;
int tmp_id;
rtx saved_op1;

2
gcc/config/sh/sh.md
View File

@ -5964,7 +5964,7 @@ label:
When we're here, the not:SI pattern obviously has been matched already
and we only have to see whether the following insn is the left shift. */
rtx i = next_nonnote_insn_bb (curr_insn);
rtx_insn *i = next_nonnote_insn_bb (curr_insn);
if (i == NULL_RTX || !NONJUMP_INSN_P (i))
FAIL;

6
gcc/cselib.c
View File

@ -642,7 +642,7 @@ discard_useless_locs (cselib_val **x, void *info ATTRIBUTE_UNUSED)
cselib_val *v = *x;
struct elt_loc_list **p = &v->locs;
bool had_locs = v->locs != NULL;
rtx setting_insn = v->locs ? v->locs->setting_insn : NULL;
rtx_insn *setting_insn = v->locs ? v->locs->setting_insn : NULL;
while (*p)
{
@ -2190,7 +2190,7 @@ cselib_invalidate_regno (unsigned int regno, machine_mode mode)
{
cselib_val *v = (*l)->elt;
bool had_locs;
rtx setting_insn;
rtx_insn *setting_insn;
struct elt_loc_list **p;
unsigned int this_last = i;
@ -2268,7 +2268,7 @@ cselib_invalidate_mem (rtx mem_rtx)
bool has_mem = false;
struct elt_loc_list **p = &v->locs;
bool had_locs = v->locs != NULL;
rtx setting_insn = v->locs ? v->locs->setting_insn : NULL;
rtx_insn *setting_insn = v->locs ? v->locs->setting_insn : NULL;
while (*p)
{

6
gcc/function.c
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@ -5094,7 +5094,8 @@ expand_function_start (tree subr)
if (cfun->static_chain_decl)
{
tree parm = cfun->static_chain_decl;
rtx local, chain, insn;
rtx local, chain;
rtx_insn *insn;
local = gen_reg_rtx (Pmode);
chain = targetm.calls.static_chain (current_function_decl, true);
@ -5657,7 +5658,8 @@ prologue_epilogue_contains (const_rtx insn)
static void
emit_use_return_register_into_block (basic_block bb)
{
rtx seq, insn;
rtx seq;
rtx_insn *insn;
start_sequence ();
use_return_register ();
seq = get_insns ();

3
gcc/gcse.c
View File

@ -573,7 +573,8 @@ compute_can_copy (void)
{
int i;
#ifndef AVOID_CCMODE_COPIES
rtx reg, insn;
rtx reg;
rtx_insn *insn;
#endif
memset (can_copy, 0, NUM_MACHINE_MODES);

3
gcc/haifa-sched.c
View File

@ -5241,7 +5241,6 @@ ok_for_early_queue_removal (rtx insn)
{
if (targetm.sched.is_costly_dependence)
{
rtx prev_insn;
int n_cycles;
int i = scheduled_insns.length ();
for (n_cycles = flag_sched_stalled_insns_dep; n_cycles; n_cycles--)
@ -5250,7 +5249,7 @@ ok_for_early_queue_removal (rtx insn)
{
int cost;
prev_insn = scheduled_insns[i];
rtx_insn *prev_insn = scheduled_insns[i];
if (!NOTE_P (prev_insn))
{

2
gcc/ifcvt.c
View File

@ -1864,7 +1864,7 @@ noce_get_alt_condition (struct noce_if_info *if_info, rtx target,
enum rtx_code code = GET_CODE (if_info->cond);
rtx op_a = XEXP (if_info->cond, 0);
rtx op_b = XEXP (if_info->cond, 1);
rtx prev_insn;
rtx_insn *prev_insn;
/* First, look to see if we put a constant in a register. */
prev_insn = prev_nonnote_insn (if_info->cond_earliest);

2
gcc/loop-doloop.c
View File

@ -141,7 +141,7 @@ doloop_condition_get (rtx doloop_pat)
if (GET_CODE (pattern) != PARALLEL)
{
rtx cond;
rtx prev_insn = prev_nondebug_insn (doloop_pat);
rtx_insn *prev_insn = prev_nondebug_insn (doloop_pat);
rtx cmp_arg1, cmp_arg2;
rtx cmp_orig;

2
gcc/lra-constraints.c
View File

@ -5567,7 +5567,7 @@ inherit_in_ebb (rtx_insn *head, rtx_insn *tail)
|| reg_renumber[src_regno] >= 0)
{
bool before_p;
rtx use_insn = curr_insn;
rtx_insn *use_insn = curr_insn;
before_p = (JUMP_P (curr_insn)
|| (CALL_P (curr_insn) && reg->type == OP_IN));

2
gcc/modulo-sched.c
View File

@ -2203,7 +2203,7 @@ sms_schedule_by_order (ddg_ptr g, int mii, int maxii, int *nodes_order)
{
int u = nodes_order[i];
ddg_node_ptr u_node = &ps->g->nodes[u];
rtx insn = u_node->insn;
rtx_insn *insn = u_node->insn;
if (!NONDEBUG_INSN_P (insn))
{

2
gcc/recog.c
View File

@ -978,7 +978,7 @@ validate_simplify_insn (rtx insn)
int
next_insn_tests_no_inequality (rtx insn)
{
rtx next = next_cc0_user (insn);
rtx_insn *next = next_cc0_user (insn);
/* If there is no next insn, we have to take the conservative choice. */
if (next == 0)

12
gcc/reorg.c
View File

@ -535,7 +535,7 @@ emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length)
/* Unlink INSN from the insn chain, so that we can put it into
the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
rtx after = PREV_INSN (insn);
rtx_insn *after = PREV_INSN (insn);
remove_insn (insn);
SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
@ -1809,7 +1809,8 @@ reorg_redirect_jump (rtx_insn *jump, rtx nlabel)
static void
update_reg_dead_notes (rtx insn, rtx delayed_insn)
{
rtx p, link, next;
rtx link, next;
rtx_insn *p;
for (p = next_nonnote_insn (insn); p != delayed_insn;
p = next_nonnote_insn (p))
@ -1842,7 +1843,8 @@ update_reg_dead_notes (rtx insn, rtx delayed_insn)
static void
fix_reg_dead_note (rtx start_insn, rtx stop_insn)
{
rtx p, link, next;
rtx link, next;
rtx_insn *p;
for (p = next_nonnote_insn (start_insn); p != stop_insn;
p = next_nonnote_insn (p))
@ -2693,7 +2695,7 @@ fill_slots_from_thread (rtx_insn *insn, rtx condition, rtx thread_or_return,
&& REG_P (SET_DEST (pat))
&& !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
{
rtx next = next_nonnote_insn (trial);
rtx_insn *next = next_nonnote_insn (trial);
if (next && NONJUMP_INSN_P (next)
&& GET_CODE (PATTERN (next)) != USE
@ -3121,7 +3123,7 @@ delete_computation (rtx insn)
if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
{
rtx prev = prev_nonnote_insn (insn);
rtx_insn *prev = prev_nonnote_insn (insn);
/* We assume that at this stage
CC's are always set explicitly
and always immediately before the jump that