arm.c (arm_size_rtx_costs): New function.
* arm.c (arm_size_rtx_costs): New function. (arm_override_options): Use it if optimizing for space. From-SVN: r86211
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Richard Earnshaw
Richard Earnshaw
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542a8afa8a
commit
21b5653c3d
@ -1,3 +1,8 @@
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2004-08-18 Richard Earnshaw <rearnsha@arm.com>
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* arm.c (arm_size_rtx_costs): New function.
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(arm_override_options): Use it if optimizing for space.
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2004-08-18 Richard Henderson <rth@redhat.com>
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* emit-rtl.c (gen_const_mem): New.
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@ -127,6 +127,7 @@ static void arm_internal_label (FILE *, const char *, unsigned long);
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static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT,
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tree);
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static int arm_rtx_costs_1 (rtx, enum rtx_code, enum rtx_code);
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static bool arm_size_rtx_costs (rtx, int, int, int *);
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static bool arm_slowmul_rtx_costs (rtx, int, int, int *);
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static bool arm_fastmul_rtx_costs (rtx, int, int, int *);
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static bool arm_xscale_rtx_costs (rtx, int, int, int *);
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@ -870,7 +871,10 @@ arm_override_options (void)
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abort ();
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tune_flags = all_cores[(int)arm_tune].flags;
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targetm.rtx_costs = all_cores[(int)arm_tune].rtx_costs;
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if (optimize_size)
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targetm.rtx_costs = arm_size_rtx_costs;
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else
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targetm.rtx_costs = all_cores[(int)arm_tune].rtx_costs;
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/* Make sure that the processor choice does not conflict with any of the
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other command line choices. */
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@ -3938,6 +3942,227 @@ arm_rtx_costs_1 (rtx x, enum rtx_code code, enum rtx_code outer)
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}
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}
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/* RTX costs when optimizing for size. */
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static bool
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arm_size_rtx_costs (rtx x, int code, int outer_code, int *total)
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{
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enum machine_mode mode = GET_MODE (x);
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if (TARGET_THUMB)
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{
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/* XXX TBD. For now, use the standard costs. */
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*total = thumb_rtx_costs (x, code, outer_code);
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return true;
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}
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switch (code)
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{
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case MEM:
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/* A memory access costs 1 insn if the mode is small, or the address is
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a single register, otherwise it costs one insn per word. */
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if (REG_P (XEXP (x, 0)))
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*total = COSTS_N_INSNS (1);
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else
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*total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
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return true;
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case DIV:
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case MOD:
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case UDIV:
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case UMOD:
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/* Needs a libcall, so it costs about this. */
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*total = COSTS_N_INSNS (2);
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return false;
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case ROTATE:
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if (mode == SImode && GET_CODE (XEXP (x, 1)) == REG)
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{
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*total = COSTS_N_INSNS (2) + rtx_cost (XEXP (x, 0), code);
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return true;
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}
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/* Fall through */
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case ROTATERT:
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case ASHIFT:
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case LSHIFTRT:
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case ASHIFTRT:
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if (mode == DImode && GET_CODE (XEXP (x, 1)) == CONST_INT)
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{
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*total = COSTS_N_INSNS (3) + rtx_cost (XEXP (x, 0), code);
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return true;
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}
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else if (mode == SImode)
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{
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*total = COSTS_N_INSNS (1) + rtx_cost (XEXP (x, 0), code);
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/* Slightly disparage register shifts, but not by much. */
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if (GET_CODE (XEXP (x, 1)) != CONST_INT)
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*total += 1 + rtx_cost (XEXP (x, 1), code);
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return true;
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}
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/* Needs a libcall. */
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*total = COSTS_N_INSNS (2);
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return false;
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case MINUS:
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if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
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{
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*total = COSTS_N_INSNS (1);
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return false;
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}
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if (mode == SImode)
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{
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enum rtx_code subcode0 = GET_CODE (XEXP (x, 0));
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enum rtx_code subcode1 = GET_CODE (XEXP (x, 1));
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if (subcode0 == ROTATE || subcode0 == ROTATERT || subcode0 == ASHIFT
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|| subcode0 == LSHIFTRT || subcode0 == ASHIFTRT
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|| subcode1 == ROTATE || subcode1 == ROTATERT
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|| subcode1 == ASHIFT || subcode1 == LSHIFTRT
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|| subcode1 == ASHIFTRT)
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{
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/* It's just the cost of the two operands. */
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*total = 0;
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return false;
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}
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*total = COSTS_N_INSNS (1);
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return false;
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}
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*total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
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return false;
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case PLUS:
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if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
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{
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*total = COSTS_N_INSNS (1);
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return false;
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}
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/* Fall through */
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case AND: case XOR: case IOR:
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if (mode == SImode)
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{
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enum rtx_code subcode = GET_CODE (XEXP (x, 0));
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if (subcode == ROTATE || subcode == ROTATERT || subcode == ASHIFT
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|| subcode == LSHIFTRT || subcode == ASHIFTRT
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|| (code == AND && subcode == NOT))
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{
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/* It's just the cost of the two operands. */
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*total = 0;
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return false;
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}
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}
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*total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
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return false;
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case MULT:
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*total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
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return false;
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case NEG:
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if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
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*total = COSTS_N_INSNS (1);
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/* Fall through */
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case NOT:
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*total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
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return false;
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case IF_THEN_ELSE:
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*total = 0;
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return false;
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case COMPARE:
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if (cc_register (XEXP (x, 0), VOIDmode))
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* total = 0;
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else
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*total = COSTS_N_INSNS (1);
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return false;
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case ABS:
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if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
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*total = COSTS_N_INSNS (1);
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else
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*total = COSTS_N_INSNS (1 + ARM_NUM_REGS (mode));
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return false;
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case SIGN_EXTEND:
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*total = 0;
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if (GET_MODE_SIZE (GET_MODE (XEXP (x, 0))) < 4)
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{
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if (!(arm_arch4 && MEM_P (XEXP (x, 0))))
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*total += COSTS_N_INSNS (arm_arch6 ? 1 : 2);
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}
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if (mode == DImode)
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*total += COSTS_N_INSNS (1);
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return false;
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case ZERO_EXTEND:
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*total = 0;
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if (!(arm_arch4 && MEM_P (XEXP (x, 0))))
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{
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switch (GET_MODE (XEXP (x, 0)))
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{
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case QImode:
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*total += COSTS_N_INSNS (1);
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break;
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case HImode:
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*total += COSTS_N_INSNS (arm_arch6 ? 1 : 2);
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case SImode:
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break;
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default:
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*total += COSTS_N_INSNS (2);
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}
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}
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if (mode == DImode)
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*total += COSTS_N_INSNS (1);
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return false;
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case CONST_INT:
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if (const_ok_for_arm (INTVAL (x)))
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*total = COSTS_N_INSNS (outer_code == SET ? 1 : 0);
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else if (const_ok_for_arm (~INTVAL (x)))
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*total = COSTS_N_INSNS (outer_code == AND ? 0 : 1);
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else if (const_ok_for_arm (-INTVAL (x)))
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{
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if (outer_code == COMPARE || outer_code == PLUS
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|| outer_code == MINUS)
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*total = 0;
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else
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*total = COSTS_N_INSNS (1);
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}
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else
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*total = COSTS_N_INSNS (2);
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return true;
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case CONST:
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case LABEL_REF:
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case SYMBOL_REF:
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*total = COSTS_N_INSNS (2);
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return true;
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case CONST_DOUBLE:
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*total = COSTS_N_INSNS (4);
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return true;
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default:
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if (mode != VOIDmode)
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*total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
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else
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*total = COSTS_N_INSNS (4); /* How knows? */
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return false;
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}
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}
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/* RTX costs for cores with a slow MUL implementation. */
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static bool
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@ -11581,7 +11806,7 @@ arm_final_prescan_insn (rtx insn)
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}
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/* Returns true if REGNO is a valid register
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for holding a quantity of tyoe MODE. */
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for holding a quantity of type MODE. */
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int
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arm_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode)
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{
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