re PR target/60205 (No ABI warning for AVX-512)
PR target/60205 * config/i386/i386.h (struct ix86_args): Add warn_avx512f. * config/i386/i386.c (init_cumulative_args): Initialize warn_avx512f. (type_natural_mode): Warn ABI change when %zmm register is not available for AVX512F vector value passing. testsuite/ChangeLog: PR target/60205 * gcc.target/i386/pr60205-1.c: New test. * gcc.target/i386/pr60205-2.c: Ditto. From-SVN: r207851
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@ -1,9 +1,17 @@
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2014-02-18 Uros Bizjak <ubizjak@gmail.com>
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PR target/60205
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* config/i386/i386.h (struct ix86_args): Add warn_avx512f.
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* config/i386/i386.c (init_cumulative_args): Initialize warn_avx512f.
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(type_natural_mode): Warn ABI change when %zmm register is not
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available for AVX512F vector value passing.
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2014-02-18 Kai Tietz <ktietz@redhat.com>
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PR target/60193
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* config/i386/i386.c (ix86_expand_prologue): Use
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rax register as displacement for restoring %r10, %rax.
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Additional fix wrong offset for restoring both-registers.
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* config/i386/i386.c (ix86_expand_prologue): Use value in
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rax register as displacement when restoring %r10 or %rax.
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Fix wrong offset when restoring both registers.
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2014-02-18 Eric Botcazou <ebotcazou@adacore.com>
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@ -59,8 +67,7 @@
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2014-02-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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* config/rs6000/altivec.md (p8_vmrgew): Handle little endian
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targets.
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* config/rs6000/altivec.md (p8_vmrgew): Handle little endian targets.
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(p8_vmrgow): Likewise.
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2014-02-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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@ -89,16 +96,14 @@
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2014-02-15 Richard Biener <rguenther@suse.de>
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PR tree-optimization/60183
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* tree-ssa-phiprop.c (propagate_with_phi): Avoid speculating
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loads.
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* tree-ssa-phiprop.c (propagate_with_phi): Avoid speculating loads.
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(tree_ssa_phiprop): Calculate and free post-dominators.
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2014-02-14 Jeff Law <law@redhat.com>
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PR rtl-optimization/60131
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* ree.c (get_extended_src_reg): New function.
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(combine_reaching_defs): Use it rather than assuming location
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of REG.
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(combine_reaching_defs): Use it rather than assuming location of REG.
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(find_and_remove_re): Verify first operand of extension is
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a REG before adding the insns to the copy list.
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@ -139,8 +144,7 @@
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DECL_FUNCTION_SPECIFIC_TARGET.
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(hash_tree): Do not hash DECL_FUNCTION_SPECIFIC_TARGET.
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* tree-streamer-out.c (pack_ts_target_option): Remove.
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(streamer_pack_tree_bitfields): Do not stream
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TS_TARGET_OPTION.
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(streamer_pack_tree_bitfields): Do not stream TS_TARGET_OPTION.
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(write_ts_function_decl_tree_pointers): Do not stream
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DECL_FUNCTION_SPECIFIC_TARGET.
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* tree-streamer-in.c (unpack_ts_target_option): Remove.
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@ -150,8 +154,7 @@
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2014-02-14 Jakub Jelinek <jakub@redhat.com>
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* tree-vect-loop.c (vect_is_slp_reduction): Don't set
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use_stmt twice.
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* tree-vect-loop.c (vect_is_slp_reduction): Don't set use_stmt twice.
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(get_initial_def_for_induction, vectorizable_induction): Ignore
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debug stmts when looking for exit_phi.
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(vectorizable_live_operation): Fix up condition.
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@ -6129,6 +6129,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Argument info to initialize */
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}
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if (TARGET_MMX)
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cum->mmx_nregs = MMX_REGPARM_MAX;
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cum->warn_avx512f = true;
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cum->warn_avx = true;
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cum->warn_sse = true;
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cum->warn_mmx = true;
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@ -6154,6 +6155,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Argument info to initialize */
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cum->nregs = 0;
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cum->sse_nregs = 0;
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cum->mmx_nregs = 0;
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cum->warn_avx512f = 0;
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cum->warn_avx = 0;
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cum->warn_sse = 0;
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cum->warn_mmx = 0;
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@ -6211,7 +6213,7 @@ type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum,
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if (TREE_CODE (type) == VECTOR_TYPE && !VECTOR_MODE_P (mode))
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{
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HOST_WIDE_INT size = int_size_in_bytes (type);
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if ((size == 8 || size == 16 || size == 32)
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if ((size == 8 || size == 16 || size == 32 || size == 64)
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/* ??? Generic code allows us to create width 1 vectors. Ignore. */
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&& TYPE_VECTOR_SUBPARTS (type) > 1)
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{
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@ -6227,7 +6229,29 @@ type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum,
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if (GET_MODE_NUNITS (mode) == TYPE_VECTOR_SUBPARTS (type)
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&& GET_MODE_INNER (mode) == innermode)
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{
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if (size == 32 && !TARGET_AVX)
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if (size == 64 && !TARGET_AVX512F)
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{
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static bool warnedavx512f;
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static bool warnedavx512f_ret;
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if (cum
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&& !warnedavx512f
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&& cum->warn_avx512f)
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{
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warnedavx512f = true;
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warning (0, "AVX512F vector argument without AVX512F "
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"enabled changes the ABI");
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}
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else if (in_return & !warnedavx512f_ret)
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{
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warnedavx512f_ret = true;
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warning (0, "AVX512F vector return without AVX512F "
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"enabled changes the ABI");
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}
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return TYPE_MODE (type);
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}
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else if (size == 32 && !TARGET_AVX)
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{
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static bool warnedavx;
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static bool warnedavx_ret;
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@ -1606,6 +1606,8 @@ typedef struct ix86_args {
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is used */
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int sse_words; /* # sse words passed so far */
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int sse_nregs; /* # sse registers available for passing */
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int warn_avx512f; /* True when we want to warn
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about AVX512F ABI. */
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int warn_avx; /* True when we want to warn about AVX ABI. */
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int warn_sse; /* True when we want to warn about SSE ABI. */
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int warn_mmx; /* True when we want to warn about MMX ABI. */
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@ -1,3 +1,9 @@
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2014-02-18 Uros Bizjak <ubizjak@gmail.com>
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PR target/60205
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* gcc.target/i386/pr60205-1.c: New test.
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* gcc.target/i386/pr60205-2.c: Ditto.
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2014-02-18 Kai Tietz <ktietz@redhat.com>
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PR target/60193
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@ -0,0 +1,14 @@
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/* PR target/60205 */
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/* { dg-options "-O2 -mno-avx512f -Wno-psabi" } */
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/* { dg-skip-if "no AVX512F vector" { *-*-mingw* } } */
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typedef int __v16si __attribute__ ((__vector_size__ (64)));
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extern __v16si x;
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extern void bar (__v16si);
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void
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foo (void)
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{
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bar (x); /* { dg-message "warning: AVX512F vector argument without AVX512F enabled changes the ABI" } */
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}
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@ -0,0 +1,13 @@
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/* PR target/60205 */
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/* { dg-options "-O2 -mno-avx512f" } */
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/* { dg-skip-if "no AVX512F vector" { *-*-mingw* } } */
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typedef int __v16si __attribute__ ((__vector_size__ (64)));
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extern __v16si x;
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__v16si
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foo (void)
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{ /* { dg-warning "AVX512F vector return without AVX512F enabled changes the ABI" } */
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return x;
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}
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