l_fma_float_?.c: Update.
* gcc.target/i386/l_fma_float_?.c: Update. * gcc.target/i386/l_fma_double_?.c: Update. * tree-vect-loop-manip.c (vect_do_peeling_for_loop_bound, vect_do_peeling_for_alignment): Fix loop bound computation. * tree-vect-loop.c (vect_transform_loop): Maintain loop bounds. From-SVN: r193241
This commit is contained in:
Jan Hubicka
Jan Hubicka
parent
c8fef899e8
commit
22458c5af7
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@ -1,3 +1,9 @@
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2012-11-06 Jan Hubicka <jh@suse.cz>
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* tree-vect-loop-manip.c (vect_do_peeling_for_loop_bound,
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vect_do_peeling_for_alignment): Fix loop bound computation.
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* tree-vect-loop.c (vect_transform_loop): Maintain loop bounds.
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2012-11-06 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/54089
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@ -1,3 +1,8 @@
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2012-11-06 Jan Hubicka <jh@suse.cz>
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* gcc.target/i386/l_fma_float_?.c: Update.
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* gcc.target/i386/l_fma_double_?.c: Update.
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2012-11-06 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/54089
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@ -16,11 +16,11 @@
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/* { dg-final { scan-assembler-times "vfnmadd231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfmadd213sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfmsub213sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfnmadd213sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfnmsub213sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfmadd213sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfmsub213sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfnmadd213sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfnmsub213sd" 16 } } */
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@ -12,7 +12,7 @@
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/* { dg-final { scan-assembler-times "vfmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 32 } } */
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@ -16,11 +16,11 @@
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/* { dg-final { scan-assembler-times "vfnmadd231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfmadd213sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfmsub213sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfnmadd213sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfnmsub213sd" 20 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfmadd213sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfmsub213sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfnmadd213sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 16 } } */
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/* { dg-final { scan-assembler-times "vfnmsub213sd" 16 } } */
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@ -12,7 +12,7 @@
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/* { dg-final { scan-assembler-times "vfmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 32 } } */
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@ -12,7 +12,7 @@
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/* { dg-final { scan-assembler-times "vfmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 32 } } */
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@ -12,7 +12,7 @@
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/* { dg-final { scan-assembler-times "vfmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 40 } } */
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/* { dg-final { scan-assembler-times "vfmadd132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132sd" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132sd" 32 } } */
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@ -16,11 +16,11 @@
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/* { dg-final { scan-assembler-times "vfnmadd231ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub231ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfmadd213ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfmsub213ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfnmadd213ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfnmsub213ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfmadd213ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub213ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmadd213ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmsub213ss" 32 } } */
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@ -12,7 +12,7 @@
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/* { dg-final { scan-assembler-times "vfmsub132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 64 } } */
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@ -16,11 +16,11 @@
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/* { dg-final { scan-assembler-times "vfnmadd231ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub231ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfmadd213ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfmsub213ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfnmadd213ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfnmsub213ss" 36 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfmadd213ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub213ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmadd213ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfnmsub213ss" 32 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ps" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 72 } } */
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/* { dg-final { scan-assembler-times "vfmadd132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ss" 64 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132ss" 64 } } */
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@ -1954,9 +1954,16 @@ vect_do_peeling_for_loop_bound (loop_vec_info loop_vinfo, tree *ratio,
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by ratio_mult_vf_name steps. */
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vect_update_ivs_after_vectorizer (loop_vinfo, ratio_mult_vf_name, update_e);
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max_iter = LOOP_VINFO_VECT_FACTOR (loop_vinfo) - 1;
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/* For vectorization factor N, we need to copy last N-1 values in epilogue
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and this means N-2 loopback edge executions.
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PEELING_FOR_GAPS works by subtracting last iteration and thus the epilogue
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will execute at least LOOP_VINFO_VECT_FACTOR times. */
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max_iter = (LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo)
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? LOOP_VINFO_VECT_FACTOR (loop_vinfo) * 2
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: LOOP_VINFO_VECT_FACTOR (loop_vinfo)) - 2;
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if (check_profitability)
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max_iter = MAX (max_iter, (int) th);
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max_iter = MAX (max_iter, (int) th - 1);
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record_niter_bound (new_loop, double_int::from_shwi (max_iter), false, true);
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dump_printf (MSG_OPTIMIZED_LOCATIONS,
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"Setting upper bound of nb iterations for epilogue "
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@ -2186,9 +2193,11 @@ vect_do_peeling_for_alignment (loop_vec_info loop_vinfo,
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#ifdef ENABLE_CHECKING
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slpeel_verify_cfg_after_peeling (new_loop, loop);
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#endif
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max_iter = LOOP_VINFO_VECT_FACTOR (loop_vinfo) - 1;
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/* For vectorization factor N, we need to copy at most N-1 values
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for alignment and this means N-2 loopback edge executions. */
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max_iter = LOOP_VINFO_VECT_FACTOR (loop_vinfo) - 2;
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if (check_profitability)
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max_iter = MAX (max_iter, (int) th);
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max_iter = MAX (max_iter, (int) th - 1);
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record_niter_bound (new_loop, double_int::from_shwi (max_iter), false, true);
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dump_printf (MSG_OPTIMIZED_LOCATIONS,
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"Setting upper bound of nb iterations for prologue "
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@ -5448,10 +5448,16 @@ vect_transform_loop (loop_vec_info loop_vinfo)
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bool transform_pattern_stmt = false;
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bool check_profitability = false;
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int th;
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/* Record number of iterations before we started tampering with the profile. */
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gcov_type expected_iterations = expected_loop_iterations_unbounded (loop);
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if (dump_enabled_p ())
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dump_printf_loc (MSG_NOTE, vect_location, "=== vec_transform_loop ===");
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/* If profile is inprecise, we have chance to fix it up. */
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if (LOOP_VINFO_NITERS_KNOWN_P (loop_vinfo))
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expected_iterations = LOOP_VINFO_INT_NITERS (loop_vinfo);
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/* Use the more conservative vectorization threshold. If the number
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of iterations is constant assume the cost check has been performed
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by our caller. If the threshold makes all loops profitable that
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@ -5735,6 +5741,25 @@ vect_transform_loop (loop_vec_info loop_vinfo)
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slpeel_make_loop_iterate_ntimes (loop, ratio);
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/* Reduce loop iterations by the vectorization factor. */
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scale_loop_profile (loop, RDIV (REG_BR_PROB_BASE , vectorization_factor),
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expected_iterations / vectorization_factor);
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loop->nb_iterations_upper_bound
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= loop->nb_iterations_upper_bound.udiv (double_int::from_uhwi (vectorization_factor),
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FLOOR_DIV_EXPR);
|
||||
if (LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo)
|
||||
&& loop->nb_iterations_upper_bound != double_int_zero)
|
||||
loop->nb_iterations_upper_bound = loop->nb_iterations_upper_bound - double_int_one;
|
||||
if (loop->any_estimate)
|
||||
{
|
||||
loop->nb_iterations_estimate
|
||||
= loop->nb_iterations_estimate.udiv (double_int::from_uhwi (vectorization_factor),
|
||||
FLOOR_DIV_EXPR);
|
||||
if (LOOP_VINFO_PEELING_FOR_GAPS (loop_vinfo)
|
||||
&& loop->nb_iterations_estimate != double_int_zero)
|
||||
loop->nb_iterations_estimate = loop->nb_iterations_estimate - double_int_one;
|
||||
}
|
||||
|
||||
/* The memory tags and pointers in vectorized statements need to
|
||||
have their SSA forms updated. FIXME, why can't this be delayed
|
||||
until all the loops have been transformed? */
|
||||
|
|
|
|||
Loading…
Reference in New Issue