[BACKPORT] Disable generating load/store vector pairs for block copies.

Testing has found that using load and store vector pair for block copies
can result in a slow down on power10.  This patch disables using the
vector pair instructions for block copies if we are tuning for power10.

2022-06-11   Michael Meissner  <meissner@linux.ibm.com>

gcc/

	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Do
	not generate block copies with vector pair instructions if we are
	tuning for power10.  Back port from master branch.
This commit is contained in:
Michael Meissner 2022-07-14 11:16:08 -04:00
parent 0380d008b1
commit 22736f3d0d
1 changed files with 4 additions and 1 deletions

View File

@ -4151,7 +4151,10 @@ rs6000_option_override_internal (bool global_init_p)
if (!(rs6000_isa_flags_explicit & OPTION_MASK_BLOCK_OPS_VECTOR_PAIR))
{
if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX)
/* Do not generate lxvp and stxvp on power10 since there are some
performance issues. */
if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX
&& rs6000_tune != PROCESSOR_POWER10)
rs6000_isa_flags |= OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
else
rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;