re PR target/55303 ([SH] Add support for clips / clipu instructions)
PR target/55303 * config/sh/sh.c (sh_rtx_costs): Handle SMIN and SMAX cases. * config/sh/sh.md (*clips, uminsi3, *clipu, clipu_one): New insns and related expanders. * config/sh/iterators.md (SMIN_SMAX): New code iterator. * config/sh/predicates.md (arith_reg_or_0_or_1_operand, clips_min_const_int, clips_max_const_int, clipu_max_const_int): New predicates. PR target/55303 * gcc.target/sh/pr55303-1.c: New. * gcc.target/sh/pr55303-2.c: New. * gcc.target/sh/pr55303-3.c: New. From-SVN: r198617
This commit is contained in:
Oleg Endo
parent
459efabf05
commit
2353515daf
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@ -1,3 +1,14 @@
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2013-05-06 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/55303
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* config/sh/sh.c (sh_rtx_costs): Handle SMIN and SMAX cases.
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* config/sh/sh.md (*clips, uminsi3, *clipu, clipu_one): New insns and
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related expanders.
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* config/sh/iterators.md (SMIN_SMAX): New code iterator.
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* config/sh/predicates.md (arith_reg_or_0_or_1_operand,
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clips_min_const_int, clips_max_const_int, clipu_max_const_int):
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New predicates.
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2013-05-05 Steven Bosscher <steven@gcc.gnu.org>
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John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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@ -41,3 +41,6 @@
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;; Lowpart subreg byte position code attributes for big and little endian.
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(define_mode_attr lowpart_be [(QI "3") (HI "2")])
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(define_mode_attr lowpart_le [(QI "0") (HI "0")])
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;; Signed minimum/maximum code iterator.
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(define_code_iterator SMIN_SMAX [smin smax])
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@ -195,6 +195,34 @@
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return 0;
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})
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;; Returns true if OP is either a register or constant 0 or constant 1.
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(define_predicate "arith_reg_or_0_or_1_operand"
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(match_code "subreg,reg,const_int,const_vector")
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{
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return arith_reg_or_0_operand (op, mode) || satisfies_constraint_M (op);
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})
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;; Returns true if OP is a suitable constant for the minimum value of a
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;; clips.b or clips.w insn.
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(define_predicate "clips_min_const_int"
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(and (match_code "const_int")
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(ior (match_test "INTVAL (op) == -128")
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(match_test "INTVAL (op) == -32768"))))
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;; Returns true if OP is a suitable constant for the maximum value of a
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;; clips.b or clips.w insn.
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(define_predicate "clips_max_const_int"
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(and (match_code "const_int")
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(ior (match_test "INTVAL (op) == 127")
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(match_test "INTVAL (op) == 32767"))))
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;; Returns true if OP is a suitable constant for the maximum value of a
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;; clipu.b or clipu.w insn.
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(define_predicate "clipu_max_const_int"
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(and (match_code "const_int")
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(ior (match_test "INTVAL (op) == 255")
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(match_test "INTVAL (op) == 65535"))))
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;; Returns 1 if OP is a floating point operator with two operands.
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(define_predicate "binary_float_operator"
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(and (match_code "plus,minus,mult,div")
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@ -3504,6 +3504,22 @@ sh_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
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else
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return false;
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case SMIN:
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case SMAX:
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/* This is most likely a clips.b or clips.w insn that is being made up
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by combine. */
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if (TARGET_SH2A
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&& (GET_CODE (XEXP (x, 0)) == SMAX || GET_CODE (XEXP (x, 0)) == SMIN)
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&& CONST_INT_P (XEXP (XEXP (x, 0), 1))
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&& REG_P (XEXP (XEXP (x, 0), 0))
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&& CONST_INT_P (XEXP (x, 1)))
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{
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*total = COSTS_N_INSNS (1);
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return true;
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}
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else
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return false;
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case CONST:
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case LABEL_REF:
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case SYMBOL_REF:
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@ -11710,6 +11710,140 @@ label:
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[(set_attr "length" "0")
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(set_attr "in_delay_slot" "no")])
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;; -------------------------------------------------------------------------
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;; Minimum / maximum operations.
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;; -------------------------------------------------------------------------
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;; The SH2A clips.b and clips.w insns do a signed min-max function. If smin
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;; and smax standard name patterns are defined, they will be used during
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;; initial expansion and combine will then be able to form the actual min-max
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;; pattern.
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;; The clips.b and clips.w set the SR.CS bit if the value in the register is
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;; clipped, but there is currently no way of making use of this information.
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;; The only way to read or reset the SR.CS bit is by accessing the SR.
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(define_expand "<code>si3"
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[(parallel [(set (match_operand:SI 0 "arith_reg_dest")
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(SMIN_SMAX:SI (match_operand:SI 1 "arith_reg_operand")
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(match_operand 2 "const_int_operand")))
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(clobber (reg:SI T_REG))])]
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"TARGET_SH2A"
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{
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/* Force the comparison value into a register, because greater-than
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comparisons can work only on registers. Combine will be able to pick up
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the constant value from the REG_EQUAL note when trying to form a min-max
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pattern. */
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operands[2] = force_reg (SImode, operands[2]);
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})
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;; Convert
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;; smax (smin (...))
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;; to
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;; smin (smax (...))
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(define_insn_and_split "*clips"
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[(set (match_operand:SI 0 "arith_reg_dest")
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(smax:SI (smin:SI (match_operand:SI 1 "arith_reg_operand")
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(match_operand 2 "clips_max_const_int"))
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(match_operand 3 "clips_min_const_int")))]
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"TARGET_SH2A"
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"#"
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"&& 1"
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[(set (match_dup 0)
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(smin:SI (smax:SI (match_dup 1) (match_dup 3)) (match_dup 2)))])
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(define_insn "*clips"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(smin:SI (smax:SI (match_operand:SI 1 "arith_reg_operand" "0")
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(match_operand 2 "clips_min_const_int"))
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(match_operand 3 "clips_max_const_int")))]
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"TARGET_SH2A"
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{
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if (INTVAL (operands[3]) == 127)
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return "clips.b %0";
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else if (INTVAL (operands[3]) == 32767)
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return "clips.w %0";
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else
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gcc_unreachable ();
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}
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[(set_attr "type" "arith")])
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;; If the expanded smin or smax patterns were not combined, split them into
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;; a compare and branch sequence, because there are no real smin or smax
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;; insns.
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(define_insn_and_split "*<code>si3"
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[(set (match_operand:SI 0 "arith_reg_dest")
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(SMIN_SMAX:SI (match_operand:SI 1 "arith_reg_operand")
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(match_operand:SI 2 "arith_reg_or_0_or_1_operand")))
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(clobber (reg:SI T_REG))]
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"TARGET_SH2A && can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(const_int 0)]
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{
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rtx skip_label = gen_label_rtx ();
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emit_move_insn (operands[0], operands[1]);
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rtx cmp_val = operands[2];
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if (satisfies_constraint_M (cmp_val))
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cmp_val = const0_rtx;
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emit_insn (gen_cmpgtsi_t (operands[0], cmp_val));
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emit_jump_insn (<CODE> == SMIN
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? gen_branch_false (skip_label)
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: gen_branch_true (skip_label));
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emit_label_after (skip_label, emit_move_insn (operands[0], operands[2]));
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DONE;
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})
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;; The SH2A clipu.b and clipu.w insns can be used to implement a min function
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;; with a register and a constant.
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;; The clipu.b and clipu.w set the SR.CS bit if the value in the register is
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;; clipped, but there is currently no way of making use of this information.
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;; The only way to read or reset the SR.CS bit is by accessing the SR.
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(define_expand "uminsi3"
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[(set (match_operand:SI 0 "arith_reg_dest")
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(umin:SI (match_operand:SI 1 "arith_reg_operand")
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(match_operand 2 "const_int_operand")))]
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"TARGET_SH2A"
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{
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if (INTVAL (operands[2]) == 1)
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{
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emit_insn (gen_clipu_one (operands[0], operands[1]));
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DONE;
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}
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else if (! clipu_max_const_int (operands[2], VOIDmode))
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FAIL;
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})
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(define_insn "*clipu"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(umin:SI (match_operand:SI 1 "arith_reg_operand" "0")
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(match_operand 2 "clipu_max_const_int")))]
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"TARGET_SH2A"
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{
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if (INTVAL (operands[2]) == 255)
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return "clipu.b %0";
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else if (INTVAL (operands[2]) == 65535)
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return "clipu.w %0";
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else
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gcc_unreachable ();
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}
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[(set_attr "type" "arith")])
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(define_insn_and_split "clipu_one"
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[(set (match_operand:SI 0 "arith_reg_dest")
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(umin:SI (match_operand:SI 1 "arith_reg_operand") (const_int 1)))
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(clobber (reg:SI T_REG))]
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"TARGET_SH2A"
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"#"
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"&& can_create_pseudo_p ()"
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[(const_int 0)]
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{
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emit_insn (gen_cmpeqsi_t (operands[1], const0_rtx));
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emit_insn (gen_movnegt (operands[0], get_t_reg_rtx ()));
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DONE;
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})
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;; -------------------------------------------------------------------------
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;; Misc
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;; -------------------------------------------------------------------------
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@ -1,3 +1,10 @@
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2013-05-06 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/55303
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* gcc.target/sh/pr55303-1.c: New.
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* gcc.target/sh/pr55303-2.c: New.
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* gcc.target/sh/pr55303-3.c: New.
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2013-05-05 Tobias Burnus <burnus@net-b.de>
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* gfortran.dg/allocate_with_source_3.f90: New.
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@ -0,0 +1,87 @@
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/* Verify that the SH2A clips and clipu instructions are generated as
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expected. */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-options "-O2" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a*" } } */
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/* { dg-final { scan-assembler-times "clips.b" 2 } } */
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/* { dg-final { scan-assembler-times "clips.w" 2 } } */
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/* { dg-final { scan-assembler-times "clipu.b" 2 } } */
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/* { dg-final { scan-assembler-times "clipu.w" 2 } } */
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static inline int
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min (int a, int b)
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{
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return a < b ? a : b;
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}
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static inline int
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max (int a, int b)
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{
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return a < b ? b : a;
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}
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int
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test_00 (int a)
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{
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/* 1x clips.b */
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return max (-128, min (127, a));
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}
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int
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test_01 (int a)
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{
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/* 1x clips.b */
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return min (127, max (-128, a));
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}
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int
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test_02 (int a)
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{
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/* 1x clips.w */
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return max (-32768, min (32767, a));
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}
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int
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test_03 (int a)
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{
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/* 1x clips.w */
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return min (32767, max (-32768, a));
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}
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unsigned int
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test_04 (unsigned int a)
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{
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/* 1x clipu.b */
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return a > 255 ? 255 : a;
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}
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unsigned int
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test_05 (unsigned int a)
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{
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/* 1x clipu.b */
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return a >= 255 ? 255 : a;
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}
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unsigned int
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test_06 (unsigned int a)
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{
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/* 1x clipu.w */
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return a > 65535 ? 65535 : a;
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}
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unsigned int
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test_07 (unsigned int a)
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{
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/* 1x clipu.w */
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return a >= 65535 ? 65535 : a;
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}
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void
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test_08 (unsigned short a, unsigned short b, unsigned int* r)
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{
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/* Must not see a clip insn here -- it is not needed. */
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unsigned short x = a + b;
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if (x > 65535)
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x = 65535;
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*r = x;
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}
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@ -0,0 +1,35 @@
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/* Verify that for SH2A smax/smin -> cbranch conversion is done properly
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if the clips insn is not used and the expected comparison insns are
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generated. */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-options "-O2" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a*" } } */
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/* { dg-final { scan-assembler-times "cmp/pl" 4 } } */
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int
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test_00 (int a)
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{
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/* 1x cmp/pl */
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return a >= 0 ? a : 0;
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}
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int
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test_01 (int a)
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{
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/* 1x cmp/pl */
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return a <= 0 ? a : 0;
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}
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int
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test_02 (int a)
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{
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/* 1x cmp/pl */
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return a < 1 ? 1 : a;
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}
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int
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test_03 (int a)
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{
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/* 1x cmp/pl */
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return a < 1 ? a : 1;
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}
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@ -0,0 +1,15 @@
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/* Verify that the special case (umin (reg const_int 1)) results in the
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expected instruction sequence on SH2A. */
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/* { dg-do compile { target "sh*-*-*" } } */
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/* { dg-options "-O2" } */
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/* { dg-skip-if "" { "sh*-*-*" } { "*" } { "-m2a*" } } */
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/* { dg-final { scan-assembler-times "tst" 1 } } */
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/* { dg-final { scan-assembler-times "movrt" 1 } } */
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unsigned int
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test_00 (unsigned int a)
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{
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/* 1x tst
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1x movrt */
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return a > 1 ? 1 : a;
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}
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