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re PR rtl-optimization/81803 (miscompilation at -O1 on mips64el) 

PR rtl-optimization/81803
	* lra-constraints.c (curr_insn_transform): Also reload the whole
	register for a strict subreg no wider than a word if this is for
	a WORD_REGISTER_OPERATIONS target.

From-SVN: r254488
This commit is contained in:
Eric Botcazou 2017-11-07 07:44:58 +00:00 committed by Eric Botcazou
parent cf0cc17f25
commit 2364fa7f79
2 changed files with 19 additions and 3 deletions
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11
gcc/ChangeLog
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@ -1,3 +1,14 @@
2017-11-07 Eric Botcazou <ebotcazou@adacore.com>
Backport from mainline
2017-10-31 Matthew Fortune <matthew.fortune@imgtec.com>
Eric Botcazou <ebotcazou@adacore.com>
PR rtl-optimization/81803
* lra-constraints.c (curr_insn_transform): Also reload the whole
register for a strict subreg no wider than a word if this is for
a WORD_REGISTER_OPERATIONS target.
2017-11-03 Wilco Dijkstra <wdijkstr@arm.com>
PR middle-end/60580

11
gcc/lra-constraints.c
View File

@ -4222,8 +4222,9 @@ curr_insn_transform (bool check_only_p)
reg = SUBREG_REG (*loc);
byte = SUBREG_BYTE (*loc);
if (REG_P (reg)
/* Strict_low_part requires reload the register not
the sub-register. */
/* Strict_low_part requires reloading the register and not
just the subreg. Likewise for a strict subreg no wider
than a word for WORD_REGISTER_OPERATIONS targets. */
&& (curr_static_id->operand[i].strict_low
|| (GET_MODE_SIZE (mode)
<= GET_MODE_SIZE (GET_MODE (reg))
@ -4235,7 +4236,11 @@ curr_insn_transform (bool check_only_p)
&& (goal_alt[i] == NO_REGS
|| (simplify_subreg_regno
(ira_class_hard_regs[goal_alt[i]][0],
GET_MODE (reg), byte, mode) >= 0)))))
GET_MODE (reg), byte, mode) >= 0)))
|| (GET_MODE_PRECISION (mode)
< GET_MODE_PRECISION (GET_MODE (reg))
&& GET_MODE_SIZE (GET_MODE (reg)) <= UNITS_PER_WORD
&& WORD_REGISTER_OPERATIONS)))
{
/* An OP_INOUT is required when reloading a subreg of a
mode wider than a word to ensure that data beyond the