mips.md (addsi3): Remove workaround for adds of -32768.
* config/mips/mips.md (addsi3): Remove workaround for adds of -32768. (addsi3_internal, adddi3, adddi3_internal_2): Likewise. (adddi3_internal_3, addsi3_internal_2): Likewise. From-SVN: r68822
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@ -1,3 +1,9 @@
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2003-07-02 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.md (addsi3): Remove workaround for adds of -32768.
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(addsi3_internal, adddi3, adddi3_internal_2): Likewise.
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(adddi3_internal_3, addsi3_internal_2): Likewise.
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2003-07-02 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.c (machine_function): Add new fields:
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@ -703,15 +703,6 @@
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""
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"
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{
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/* The mips16 assembler handles -32768 correctly, and so does gas,
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but some other MIPS assemblers think that -32768 needs to be
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loaded into a register before it can be added in. */
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if (! TARGET_MIPS16
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&& ! TARGET_GAS
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&& GET_CODE (operands[2]) == CONST_INT
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&& INTVAL (operands[2]) == -32768)
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operands[2] = force_reg (SImode, operands[2]);
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/* If a large stack adjustment was forced into a register, we may be
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asked to generate rtx such as:
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@ -738,10 +729,7 @@
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[(set (match_operand:SI 0 "register_operand" "=d,d")
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(plus:SI (match_operand:SI 1 "reg_or_0_operand" "dJ,dJ")
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(match_operand:SI 2 "arith_operand" "d,Q")))]
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"! TARGET_MIPS16
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&& (TARGET_GAS
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|| GET_CODE (operands[2]) != CONST_INT
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|| INTVAL (operands[2]) != -32768)"
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"!TARGET_MIPS16"
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"@
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addu\\t%0,%z1,%2
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addiu\\t%0,%z1,%2"
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@ -888,15 +876,6 @@
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"TARGET_64BIT || (!TARGET_DEBUG_G_MODE && !TARGET_MIPS16)"
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"
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{
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/* The mips16 assembler handles -32768 correctly, and so does gas,
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but some other MIPS assemblers think that -32768 needs to be
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loaded into a register before it can be added in. */
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if (! TARGET_MIPS16
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&& ! TARGET_GAS
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&& GET_CODE (operands[2]) == CONST_INT
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&& INTVAL (operands[2]) == -32768)
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operands[2] = force_reg (DImode, operands[2]);
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/* If a large stack adjustment was forced into a register, we may be
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asked to generate rtx such as:
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@ -1010,10 +989,7 @@
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(plus:DI (match_operand:DI 1 "register_operand" "%d,%d,%d")
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(match_operand:DI 2 "small_int" "P,J,N")))
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(clobber (match_operand:SI 3 "register_operand" "=d,d,d"))]
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"!TARGET_64BIT && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16
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&& (TARGET_GAS
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|| GET_CODE (operands[2]) != CONST_INT
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|| INTVAL (operands[2]) != -32768)"
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"!TARGET_64BIT && !TARGET_DEBUG_G_MODE && !TARGET_MIPS16"
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"@
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addu\\t%L0,%L1,%2\;sltu\\t%3,%L0,%2\;addu\\t%M0,%M1,%3
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move\\t%L0,%L1\;move\\t%M0,%M1
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@ -1074,11 +1050,7 @@
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[(set (match_operand:DI 0 "register_operand" "=d,d")
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(plus:DI (match_operand:DI 1 "reg_or_0_operand" "dJ,dJ")
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(match_operand:DI 2 "arith_operand" "d,Q")))]
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"TARGET_64BIT
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&& !TARGET_MIPS16
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&& (TARGET_GAS
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|| GET_CODE (operands[2]) != CONST_INT
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|| INTVAL (operands[2]) != -32768)"
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"TARGET_64BIT && !TARGET_MIPS16"
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"@
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daddu\\t%0,%z1,%2
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daddiu\\t%0,%z1,%2"
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@ -1221,11 +1193,7 @@
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[(set (match_operand:DI 0 "register_operand" "=d,d")
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(sign_extend:DI (plus:SI (match_operand:SI 1 "reg_or_0_operand" "dJ,dJ")
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(match_operand:SI 2 "arith_operand" "d,Q"))))]
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"TARGET_64BIT
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&& !TARGET_MIPS16
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&& (TARGET_GAS
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|| GET_CODE (operands[2]) != CONST_INT
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|| INTVAL (operands[2]) != -32768)"
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"TARGET_64BIT && !TARGET_MIPS16"
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"@
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addu\\t%0,%z1,%2
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addiu\\t%0,%z1,%2"
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