rs6000: Add scalar cfuged instruction
Add the centifuge-doubleword instruction and built-in access. [gcc] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New #define. (BU_FUTURE_MISC_1): Likewise. (BU_FUTURE_MISC_2): Likewise. (BU_FUTURE_MISC_3): Likewise. (__builtin_cfuged): New built-in function definition. * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant. (cfuged): New insn. * doc/extend.texi (Basic PowerPC Built-in Functions Available for a Future Architecture): New subsubsection. [gcc/testsuite] 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target.powerpc/cfuged-0.c: New test. * gcc.target.powerpc/cfuged-1.c: New test.
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@ -1,3 +1,16 @@
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2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
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* config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
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#define.
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(BU_FUTURE_MISC_1): Likewise.
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(BU_FUTURE_MISC_2): Likewise.
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(BU_FUTURE_MISC_3): Likewise.
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(__builtin_cfuged): New built-in function definition.
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* config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
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(cfuged): New insn.
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* doc/extend.texi (Basic PowerPC Built-in Functions Available for
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a Future Architecture): New subsubsection.
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2020-05-11 Richard Biener <rguenther@suse.de>
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PR tree-optimization/95049
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@ -993,6 +993,40 @@
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| RS6000_BTC_TERNARY), \
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CODE_FOR_nothing) /* ICODE */
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/* Miscellaneous (non-vector) builtins for instructions which may be
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added at some point in the future. */
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#define BU_FUTURE_MISC_0(ENUM, NAME, ATTR, ICODE) \
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RS6000_BUILTIN_0 (FUTURE_BUILTIN_ ## ENUM, /* ENUM */ \
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"__builtin_" NAME, /* NAME */ \
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RS6000_BTM_FUTURE, /* MASK */ \
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(RS6000_BTC_ ## ATTR /* ATTR */ \
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| RS6000_BTC_SPECIAL), \
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CODE_FOR_ ## ICODE) /* ICODE */
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#define BU_FUTURE_MISC_1(ENUM, NAME, ATTR, ICODE) \
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RS6000_BUILTIN_1 (FUTURE_BUILTIN_ ## ENUM, /* ENUM */ \
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"__builtin_" NAME, /* NAME */ \
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RS6000_BTM_FUTURE, /* MASK */ \
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(RS6000_BTC_ ## ATTR /* ATTR */ \
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| RS6000_BTC_UNARY), \
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CODE_FOR_ ## ICODE) /* ICODE */
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#define BU_FUTURE_MISC_2(ENUM, NAME, ATTR, ICODE) \
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RS6000_BUILTIN_2 (FUTURE_BUILTIN_ ## ENUM, /* ENUM */ \
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"__builtin_" NAME, /* NAME */ \
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RS6000_BTM_FUTURE, /* MASK */ \
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(RS6000_BTC_ ## ATTR /* ATTR */ \
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| RS6000_BTC_BINARY), \
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CODE_FOR_ ## ICODE) /* ICODE */
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#define BU_FUTURE_MISC_3(ENUM, NAME, ATTR, ICODE) \
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RS6000_BUILTIN_3 (FUTURE_BUILTIN_ ## ENUM, /* ENUM */ \
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"__builtin_" NAME, /* NAME */ \
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RS6000_BTM_FUTURE, /* MASK */ \
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(RS6000_BTC_ ## ATTR /* ATTR */ \
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| RS6000_BTC_TERNARY), \
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CODE_FOR_ ## ICODE) /* ICODE */
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#endif
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@ -2539,6 +2573,9 @@ BU_P9_OVERLOAD_2 (CMPRB, "byte_in_range")
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BU_P9_OVERLOAD_2 (CMPRB2, "byte_in_either_range")
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BU_P9_OVERLOAD_2 (CMPEQB, "byte_in_set")
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/* Future architecture scalar built-ins. */
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BU_FUTURE_MISC_2 (CFUGED, "cfuged", CONST, cfuged)
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/* Future architecture vector built-ins. */
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BU_FUTURE_V_2 (VCLZDM, "vclzdm", CONST, vclzdm)
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BU_FUTURE_V_2 (VCTZDM, "vctzdm", CONST, vctzdm)
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@ -148,6 +148,7 @@
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UNSPEC_SI_FROM_SF
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UNSPEC_PLTSEQ
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UNSPEC_PLT16_HA
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UNSPEC_CFUGED
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])
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;;
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@ -2453,6 +2454,15 @@
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"prty<wd> %0,%1"
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[(set_attr "type" "popcnt")])
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(define_insn "cfuged"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(unspec:DI [(match_operand:DI 1 "gpc_reg_operand" "r")
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(match_operand:DI 2 "gpc_reg_operand" "r")]
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UNSPEC_CFUGED))]
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"TARGET_FUTURE && TARGET_64BIT"
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"cfuged %0,%1,%2"
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[(set_attr "type" "integer")])
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(define_insn "cmpb<mode>3"
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
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(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")
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@ -16980,6 +16980,7 @@ implementing assertions.
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* Basic PowerPC Built-in Functions Available on ISA 2.06::
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* Basic PowerPC Built-in Functions Available on ISA 2.07::
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* Basic PowerPC Built-in Functions Available on ISA 3.0::
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* Basic PowerPC Built-in Functions Available for a Future Architecture::
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@end menu
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This section describes PowerPC built-in functions that do not require
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@ -17533,6 +17534,27 @@ the FPSCR. The instruction is a lower latency version of the @code{mffs}
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instruction. If the @code{mffsl} instruction is not available, then the
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builtin uses the older @code{mffs} instruction to read the FPSCR.
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@node Basic PowerPC Built-in Functions Available for a Future Architecture
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@subsubsection Basic PowerPC Built-in Functions Available for a Future Architecture
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The basic built-in functions described in this section are
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available on the PowerPC family of processors starting with a
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hypothetical CPU which may or may not be available in the future, as
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requested by specifying @option{-mcpu=future} on the command line.
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Unless explicitly disabled on the command line,
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specifying @option{-mcpu=future} has the effect of enabling all the
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same options as for @option{-mcpu=power9}.
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The following built-in functions are available on Linux 64-bit systems
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that use a future architecture instruction set (@option{-mcpu=future}):
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@smallexample
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@exdent unsigned long long int
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@exdent __builtin_cfuged (unsigned long long int, unsigned long long int)
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@end smallexample
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Perform a 64-bit centrifuge operation, as if implemented by the Future
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@code{cfuged} instruction.
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@findex __builtin_cfuged
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@node PowerPC AltiVec/VSX Built-in Functions
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@subsection PowerPC AltiVec/VSX Built-in Functions
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@ -1,3 +1,8 @@
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2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
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* gcc.target.powerpc/cfuged-0.c: New test.
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* gcc.target.powerpc/cfuged-1.c: New test.
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2020-05-11 Richard Biener <rguenther@suse.de>
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PR tree-optimization/95049
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gcc/testsuite/gcc.target/powerpc/cfuged-0.c
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gcc/testsuite/gcc.target/powerpc/cfuged-0.c
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/* { dg-require-effective-target lp64 } */
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/* { dg-options "-mdejagnu-cpu=future" } */
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extern void abort (void);
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unsigned long long int
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do_cfuged (unsigned long long int source, unsigned long long int mask)
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{
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return __builtin_cfuged (source, mask);
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}
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int main (int argc, char *argv [])
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{
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unsigned long long int sources [4], masks [4];
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unsigned long long int results [4][4] = {
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/* sources[0] with each of masks [0 .. 3] */
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{0x7e3ca5f0ll, 0xa5f07e3cll, 0xaf7350ecll, 0x50ecaf73ll },
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/* sources[1] with each of masks [0 .. 3] */
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{ 0xa5f07e3cll, 0x7e3ca5f0ll, 0x73afec50ll, 0xec5073afll },
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/* sources[2] with each of masks [0 .. 3] */
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{ 0xf07e3ca5ll, 0x3ca5f07ell, 0x3af7c50ell, 0xc50e3af7ll },
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/* sources[3] with each of masks [0 .. 3] */
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{ 0xe7c35a0fll, 0x5a0fe7c3ll, 0x50ecaf73ll, 0xaf7350ecll },
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};
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sources[0] = 0xa5f07e3cll;
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sources[1] = 0x7e3ca5f0ll;
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sources[2] = 0x3ca5f07ell;
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sources[3] = 0x5a0fe7c3ll;
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masks[0] = 0xffff0000ll;
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masks[1] = 0x0000ffffll;
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masks[2] = 0x0f0f0f0fll;
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masks[3] = 0xf0f0f0f0ll;
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unsigned long long int result;
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for (int i = 0; i < 4; i++)
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{
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for (int j = 0; j < 4; j++)
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{
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if (do_cfuged (sources[i], masks[j]) != results [i][j])
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abort ();
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}
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}
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return 0;
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}
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/* { dg-final { scan-assembler {\mcfuged\M} } } */
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gcc/testsuite/gcc.target/powerpc/cfuged-1.c
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gcc/testsuite/gcc.target/powerpc/cfuged-1.c
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/* { dg-do run } */
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/* { dg-require-effective-target lp64 } */
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/* { dg-require-effective-target powerpc_future_hw } */
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/* { dg-options "-mdejagnu-cpu=future" } */
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extern void abort (void);
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unsigned long long int
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do_cfuged (unsigned long long int source, unsigned long long int mask)
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{
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return __builtin_cfuged (source, mask);
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}
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int main (int argc, char *argv [])
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{
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unsigned long long int sources [4], masks [4];
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unsigned long long int results [4][4] = {
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/* sources[0] with each of masks [0 .. 3] */
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{0x7e3ca5f0ll, 0xa5f07e3cll, 0xaf7350ecll, 0x50ecaf73ll },
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/* sources[1] with each of masks [0 .. 3] */
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{ 0xa5f07e3cll, 0x7e3ca5f0ll, 0x73afec50ll, 0xec5073afll },
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/* sources[2] with each of masks [0 .. 3] */
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{ 0xf07e3ca5ll, 0x3ca5f07ell, 0x3af7c50ell, 0xc50e3af7ll },
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/* sources[3] with each of masks [0 .. 3] */
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{ 0xe7c35a0fll, 0x5a0fe7c3ll, 0x50ecaf73ll, 0xaf7350ecll },
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};
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sources[0] = 0xa5f07e3cll;
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sources[1] = 0x7e3ca5f0ll;
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sources[2] = 0x3ca5f07ell;
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sources[3] = 0x5a0fe7c3ll;
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masks[0] = 0xffff0000ll;
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masks[1] = 0x0000ffffll;
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masks[2] = 0x0f0f0f0fll;
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masks[3] = 0xf0f0f0f0ll;
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unsigned long long int result;
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for (int i = 0; i < 4; i++)
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{
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for (int j = 0; j < 4; j++)
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{
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if (do_cfuged (sources[i], masks[j]) != results [i][j])
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abort ();
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}
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}
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return 0;
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}
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