(gen_shl_and): Try to generate shorter constant for and.
From-SVN: r13101
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@ -1273,6 +1273,11 @@ gen_shl_and (dest, left_rtx, mask_rtx, source)
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shift_gen_fun = gen_shifty_op;
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case 2:
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case 3:
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/* If the topmost bit that matters is set, set the topmost bits
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that don't matter. This way, we might be able to get a shorter
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signed constant. */
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if (mask & ((HOST_WIDE_INT)1 << 31 - total_shift))
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mask |= (HOST_WIDE_INT)~0 << (31 - total_shift);
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/* Don't expand fine-grained when combining, because that will
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make the pattern fail. */
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if (rtx_equal_function_value_matters
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