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re PR target/77270 (Flag -mprftchw is shared with 3dnow for -march=k8)

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PR target/77270
	* config/i386/i386.md (prefetch): When TARGET_PRFCHW or
	TARGET_PREFETCHWT1 are disabled, emit 3dNOW! write prefetches for
	non-SSE2 athlons only, otherwise prefer SSE prefetches.

From-SVN: r239643
This commit is contained in:
Uros Bizjak 2016-08-21 20:53:48 +02:00 committed by Uros Bizjak
parent 21afd9113c
commit 2561f329f1
2 changed files with 17 additions and 6 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2016-08-21 Uros Bizjak <ubizjak@gmail.com>
PR target/77270
* config/i386/i386.md (prefetch): When TARGET_PRFCHW or
TARGET_PREFETCHWT1 are disabled, emit 3dNOW! write prefetches for
non-SSE2 athlons only, otherwise prefer SSE prefetches.
2016-08-20 Kugan Vivekanandarajah <kuganv@linaro.org>
* tree-vrp.c (vrp_visit_assignment_or_call): Changed to Return VR.

16
gcc/config/i386/i386.md
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@ -18634,20 +18634,24 @@
gcc_assert (IN_RANGE (locality, 0, 3));
/* Use 3dNOW prefetch in case we are asking for write prefetch not
supported by SSE counterpart or the SSE prefetch is not available
(K6 machines). Otherwise use SSE prefetch as it allows specifying
of locality. */
supported by SSE counterpart (non-SSE2 athlon machines) or the
SSE prefetch is not available (K6 machines). Otherwise use SSE
prefetch as it allows specifying of locality. */
if (write)
{
if (TARGET_PREFETCHWT1)
operands[2] = GEN_INT (MAX (locality, 2));
else if (TARGET_3DNOW || TARGET_PRFCHW)
else if (TARGET_PRFCHW)
operands[2] = GEN_INT (3);
else if (TARGET_3DNOW && !TARGET_SSE2)
operands[2] = GEN_INT (3);
else if (TARGET_PREFETCH_SSE)
operands[1] = const0_rtx;
else
{
gcc_assert (TARGET_PREFETCH_SSE);
operands[1] = const0_rtx;
gcc_assert (TARGET_3DNOW);
operands[2] = GEN_INT (3);
}
}
else