mips.md (alu_type): New attribute.
2010-06-26 Catherine Moore <clm@codesourcery.com> * config/mips/mips.md (alu_type): New attribute. (type): Infer type from alu_type. (*add<mode>3, *add<mode>3_mips16, *addsi3_extended, *baddu_si_eb, *baddu_si_el, *baddu_di, sub<mode>3, *subsi3_extended, negsi2, negdi2, *low<mode>, *low<mode>_mips16, *ior<mode>3, *ior<mode>3_mips16, xor<mode>3, *nor<mode>3, *zero_extend<GPR:mode>_trunc<SHORT:mode>, *zero_extendhi_truncqi): Set alu_type instead of type. From-SVN: r161440
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@ -1,3 +1,15 @@
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2010-06-26 Catherine Moore <clm@codesourcery.com>
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* config/mips/mips.md (alu_type): New attribute.
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(type): Infer type from alu_type.
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(*add<mode>3, *add<mode>3_mips16, *addsi3_extended,
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*baddu_si_eb, *baddu_si_el, *baddu_di, sub<mode>3,
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*subsi3_extended, negsi2, negdi2, *low<mode>,
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*low<mode>_mips16, *ior<mode>3, *ior<mode>3_mips16,
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xor<mode>3, *nor<mode>3,
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*zero_extend<GPR:mode>_trunc<SHORT:mode>,
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*zero_extendhi_truncqi): Set alu_type instead of type.
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2010-06-26 Douglas B Rupp <rupp@gnat.com>
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* config/alpha/alpha.c (alpha_need_linkage): Adjust
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@ -199,6 +199,9 @@
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shift_shift,lui_movf"
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(const_string "unknown"))
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(define_attr "alu_type" "unknown,add,sub,not,nor,and,or,xor"
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(const_string "unknown"))
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;; Main data type used by the insn
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(define_attr "mode" "unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FPSW"
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(const_string "unknown"))
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@ -275,6 +278,10 @@
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(cond [(eq_attr "jal" "!unset") (const_string "call")
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(eq_attr "got" "load") (const_string "load")
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(eq_attr "alu_type" "add,sub") (const_string "arith")
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(eq_attr "alu_type" "not,nor,and,or,xor") (const_string "logical")
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;; If a doubleword move uses these expensive instructions,
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;; it is usually better to schedule them in the same way
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;; as the singleword form, rather than as "multi".
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@ -978,7 +985,7 @@
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"@
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<d>addu\t%0,%1,%2
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<d>addiu\t%0,%1,%2"
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "add")
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(set_attr "mode" "<MODE>")])
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(define_insn "*add<mode>3_mips16"
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@ -992,7 +999,7 @@
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<d>addiu\t%0,%2
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<d>addiu\t%0,%1,%2
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<d>addu\t%0,%1,%2"
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "add")
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(set_attr "mode" "<MODE>")
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(set_attr_alternative "length"
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[(if_then_else (match_operand 2 "m16_simm8_8")
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@ -1130,7 +1137,7 @@
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"@
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addu\t%0,%1,%2
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addiu\t%0,%1,%2"
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "add")
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(set_attr "mode" "SI")])
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;; Split this insn so that the addiu splitters can have a crack at it.
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@ -1145,7 +1152,7 @@
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"&& reload_completed"
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[(set (match_dup 3) (plus:SI (match_dup 1) (match_dup 2)))]
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{ operands[3] = gen_lowpart (SImode, operands[0]); }
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "add")
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(set_attr "mode" "SI")
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(set_attr "extended_mips16" "yes")])
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@ -1159,7 +1166,7 @@
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(match_operand:SI 2 "register_operand" "d")) 3)))]
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"ISA_HAS_BADDU && BYTES_BIG_ENDIAN"
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"baddu\\t%0,%1,%2"
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[(set_attr "type" "arith")])
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[(set_attr "alu_type" "add")])
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(define_insn "*baddu_si_el"
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[(set (match_operand:SI 0 "register_operand" "=d")
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@ -1169,7 +1176,7 @@
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(match_operand:SI 2 "register_operand" "d")) 0)))]
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"ISA_HAS_BADDU && !BYTES_BIG_ENDIAN"
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"baddu\\t%0,%1,%2"
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[(set_attr "type" "arith")])
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[(set_attr "alu_type" "add")])
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(define_insn "*baddu_di<mode>"
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[(set (match_operand:GPR 0 "register_operand" "=d")
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@ -1179,7 +1186,7 @@
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(match_operand:DI 2 "register_operand" "d")))))]
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"ISA_HAS_BADDU && TARGET_64BIT"
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"baddu\\t%0,%1,%2"
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[(set_attr "type" "arith")])
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[(set_attr "alu_type" "add")])
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;;
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;; ....................
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@ -1204,7 +1211,7 @@
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(match_operand:GPR 2 "register_operand" "d")))]
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""
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"<d>subu\t%0,%1,%2"
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "sub")
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(set_attr "mode" "<MODE>")])
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(define_insn "*subsi3_extended"
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@ -1214,7 +1221,7 @@
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(match_operand:SI 2 "register_operand" "d"))))]
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"TARGET_64BIT"
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"subu\t%0,%1,%2"
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "sub")
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(set_attr "mode" "DI")])
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;;
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@ -2483,7 +2490,7 @@
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else
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return "subu\t%0,%.,%1";
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}
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "sub")
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(set_attr "mode" "SI")])
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(define_insn "negdi2"
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@ -2491,7 +2498,7 @@
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(neg:DI (match_operand:DI 1 "register_operand" "d")))]
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"TARGET_64BIT && !TARGET_MIPS16"
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"dsubu\t%0,%.,%1"
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "sub")
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(set_attr "mode" "DI")])
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;; neg.fmt is an arithmetic instruction and treats all NaN inputs as
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@ -2516,7 +2523,7 @@
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else
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return "nor\t%0,%.,%1";
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}
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[(set_attr "type" "logical")
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[(set_attr "alu_type" "not")
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(set_attr "mode" "<MODE>")])
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;;
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@ -2638,7 +2645,7 @@
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"@
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or\t%0,%1,%2
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ori\t%0,%1,%x2"
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[(set_attr "type" "logical")
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[(set_attr "alu_type" "or")
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(set_attr "mode" "<MODE>")])
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(define_insn "*ior<mode>3_mips16"
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@ -2647,7 +2654,7 @@
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(match_operand:GPR 2 "register_operand" "d")))]
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"TARGET_MIPS16"
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"or\t%0,%2"
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[(set_attr "type" "logical")
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[(set_attr "alu_type" "or")
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(set_attr "mode" "<MODE>")])
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(define_expand "xor<mode>3"
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@ -2665,7 +2672,7 @@
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"@
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xor\t%0,%1,%2
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xori\t%0,%1,%x2"
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[(set_attr "type" "logical")
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[(set_attr "alu_type" "xor")
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(set_attr "mode" "<MODE>")])
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(define_insn ""
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@ -2677,7 +2684,7 @@
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xor\t%0,%2
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cmpi\t%1,%2
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cmp\t%1,%2"
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[(set_attr "type" "logical,arith,arith")
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[(set_attr "alu_type" "xor")
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(set_attr "mode" "<MODE>")
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(set_attr_alternative "length"
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[(const_int 4)
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@ -2692,7 +2699,7 @@
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(not:GPR (match_operand:GPR 2 "register_operand" "d"))))]
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"!TARGET_MIPS16"
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"nor\t%0,%1,%2"
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[(set_attr "type" "logical")
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[(set_attr "alu_type" "nor")
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(set_attr "mode" "<MODE>")])
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;;
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@ -2910,7 +2917,7 @@
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operands[2] = GEN_INT (GET_MODE_MASK (<SHORT:MODE>mode));
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return "andi\t%0,%1,%x2";
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}
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[(set_attr "type" "logical")
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[(set_attr "alu_type" "and")
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(set_attr "mode" "<GPR:MODE>")])
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(define_insn "*zero_extendhi_truncqi"
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@ -2919,7 +2926,7 @@
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(truncate:QI (match_operand:DI 1 "register_operand" "d"))))]
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"TARGET_64BIT && !TARGET_MIPS16"
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"andi\t%0,%1,0xff"
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[(set_attr "type" "logical")
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[(set_attr "alu_type" "and")
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(set_attr "mode" "HI")])
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;;
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@ -3851,7 +3858,7 @@
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(match_operand:P 2 "immediate_operand" "")))]
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"!TARGET_MIPS16"
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"<d>addiu\t%0,%1,%R2"
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "add")
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(set_attr "mode" "<MODE>")])
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(define_insn "*low<mode>_mips16"
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@ -3860,7 +3867,7 @@
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(match_operand:P 2 "immediate_operand" "")))]
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"TARGET_MIPS16"
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"<d>addiu\t%0,%R2"
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[(set_attr "type" "arith")
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[(set_attr "alu_type" "add")
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(set_attr "mode" "<MODE>")
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(set_attr "extended_mips16" "yes")])
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