20090811-1.c: Skip for incompatible options, do not override other options.

* gcc/testsuite/gcc.target/arm/20090811-1.c: Skip for incompatible
	options, do not override other options.
	* gcc/testsuite/gcc.target/arm/combine-cmp-shift.c: Skip for
	incompatible options.
	* gcc/testsuite/gcc.target/arm/pr45094.c: Likewise.
	* gcc/testsuite/gcc.target/arm/scd42-1.c: Likewise.
	* gcc/testsuite/gcc.target/arm/scd42-3.c: Likewise.
	* gcc/testsuite/gcc.target/arm/thumb-ltu.c: Likewise.

From-SVN: r174920
This commit is contained in:
Janis Johnson 2011-06-10 18:23:11 +00:00 committed by Janis Johnson
parent f7ba183bc7
commit 2644044926
7 changed files with 17 additions and 0 deletions

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@ -1,5 +1,14 @@
2011-06-10 Janis Johnson <janisjo@codesourcery.com>
* gcc/testsuite/gcc.target/arm/20090811-1.c: Skip for incompatible
options, do not override other options.
* gcc/testsuite/gcc.target/arm/combine-cmp-shift.c: Skip for
incompatible options.
* gcc/testsuite/gcc.target/arm/pr45094.c: Likewise.
* gcc/testsuite/gcc.target/arm/scd42-1.c: Likewise.
* gcc/testsuite/gcc.target/arm/scd42-3.c: Likewise.
* gcc/testsuite/gcc.target/arm/thumb-ltu.c: Likewise.
* lib/target-supports.exp
(check_effective_target_arm_neon_fp16_ok_nocache): Return 0 if
multilib flags use -mfpu with a value other than neon-fp16.

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/* { dg-do compile } */
/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv7-a" } } */
/* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-a8" } } */
/* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=softfp" } } */
/* { dg-options "-O3 -mcpu=cortex-a8 -mfpu=vfp3 -mfloat-abi=softfp" } */
typedef struct cb

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/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv7-a" } } */
/* { dg-options "-O2 -mcpu=cortex-a8" } */
/* { dg-final { scan-assembler "cmp\tr\[0-9\]*, r\[0-9\]*, asr #31" } } */

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/* { dg-do run } */
/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv7-a" } } */
/* { dg-require-effective-target arm_neon_hw } */
/* { dg-options "-O2 -mcpu=cortex-a8" } */
/* { dg-add-options arm_neon } */

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/* Verify that mov is preferred on XScale for loading a 1 byte constant. */
/* { dg-do compile } */
/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */
/* { dg-options "-mcpu=xscale -O" } */
unsigned load1(void) __attribute__ ((naked));

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/* Verify that ldr is preferred on XScale for loading a 3 or 4 byte constant. */
/* { dg-do compile } */
/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "" } } */
/* { dg-options "-mcpu=xscale -O" } */
unsigned load4(void) __attribute__ ((naked));

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/* { dg-do compile } */
/* { dg-skip-if "incompatible options" { arm*-*-* } { "-march=*" } { "-march=armv6" "-march=armv6j" "-march=armv6z" } } */
/* { dg-options "-mcpu=arm1136jf-s -mthumb -O2" } */
void f(unsigned a, unsigned b, unsigned c, unsigned d)