x86: Allow V1TI vector register pushes
Add V1TI vector register push and split it after reload to a sequence
of:
(set (reg:P SP_REG) (plus:P SP_REG) (const_int -8)))
(set (match_dup 0) (match_dup 1))
so that STV pass can convert TI mode integer push to V1TI vector register
push. Rename has_non_address_hard_reg to pseudo_reg_set, combine calls
of single_set and has_non_address_hard_reg to pseudo_reg_set, to ignore
pseudo register push.
Remove c-c++-common/dfp/func-vararg-mixed-2.c since it is compiled with
-mpreferred-stack-boundary=2 and leads to segfault:
Dump of assembler code for function __bid_nesd2:
0x08049210 <+0>: endbr32
0x08049214 <+4>: push %esi
0x08049215 <+5>: push %ebx
0x08049216 <+6>: call 0x8049130 <__x86.get_pc_thunk.bx>
0x0804921b <+11>: add $0x8de5,%ebx
0x08049221 <+17>: sub $0x20,%esp
0x08049224 <+20>: mov 0x30(%esp),%esi
0x08049228 <+24>: pushl 0x2c(%esp)
0x0804922c <+28>: call 0x804e600 <__bid32_to_bid64>
0x08049231 <+33>: mov %esi,(%esp)
0x08049234 <+36>: movd %edx,%xmm1
0x08049238 <+40>: movd %eax,%xmm0
0x0804923c <+44>: punpckldq %xmm1,%xmm0
=> 0x08049240 <+48>: movaps %xmm0,0x10(%esp)
0x08049245 <+53>: call 0x804e600 <__bid32_to_bid64>
0x0804924a <+58>: push %edx
0x0804924b <+59>: push %eax
0x0804924c <+60>: pushl 0x1c(%esp)
0x08049250 <+64>: pushl 0x1c(%esp)
0x08049254 <+68>: call 0x804b260 <__bid64_quiet_not_equal>
0x08049259 <+73>: add $0x34,%esp
0x0804925c <+76>: pop %ebx
0x0804925d <+77>: pop %esi
0x0804925e <+78>: ret
when libgcc is compiled with -msse2. According to GCC manual:
'-mpreferred-stack-boundary=NUM'
Attempt to keep the stack boundary aligned to a 2 raised to NUM
byte boundary. If '-mpreferred-stack-boundary' is not specified,
the default is 4 (16 bytes or 128-bits).
*Warning:* If you use this switch, then you must build all modules
with the same value, including any libraries. This includes the
system libraries and startup modules.
c-c++-common/dfp/func-vararg-mixed-2.c, which was added by
commit 3b2488ca6e
Author: H.J. Lu <hongjiu.lu@intel.com>
Date: Wed Jul 30 19:24:02 2008 +0000
func-vararg-alternate-d128-2.c: New.
2008-07-30 H.J. Lu <hongjiu.lu@intel.com>
Joey Ye <joey.ye@intel.com>
* gcc.dg/dfp/func-vararg-alternate-d128-2.c: New.
* gcc.dg/dfp/func-vararg-mixed-2.c: Likewise.
isn't expected to work with libgcc.
gcc/
PR target/95021
* config/i386/i386-features.c (has_non_address_hard_reg):
Renamed to ...
(pseudo_reg_set): This. Return the SET expression. Ignore
pseudo register push.
(general_scalar_to_vector_candidate_p): Combine single_set and
has_non_address_hard_reg calls to pseudo_reg_set.
(timode_scalar_to_vector_candidate_p): Likewise.
* config/i386/i386.md (*pushv1ti2): New pattern.
gcc/testsuite/
PR target/95021
* c-c++-common/dfp/func-vararg-mixed-2.c: Removed.
* gcc.target/i386/pr95021-1.c: New test.
* gcc.target/i386/pr95021-2.c: Likewise.
* gcc.target/i386/pr95021-3.c: Likewise.
* gcc.target/i386/pr95021-4.c: Likewise.
* gcc.target/i386/pr95021-5.c: Likewise.
This commit is contained in:
H.J. Lu
parent
e977a5df5b
commit
266f44a91c
@ -1,3 +1,15 @@
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2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
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PR target/95021
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* config/i386/i386-features.c (has_non_address_hard_reg):
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Renamed to ...
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(pseudo_reg_set): This. Return the SET expression. Ignore
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pseudo register push.
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(general_scalar_to_vector_candidate_p): Combine single_set and
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has_non_address_hard_reg calls to pseudo_reg_set.
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(timode_scalar_to_vector_candidate_p): Likewise.
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* config/i386/i386.md (*pushv1ti2): New pattern.
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2020-05-17 Aldy Hernandez <aldyh@redhat.com>
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Revert:
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@ -1253,25 +1253,36 @@ scalar_chain::convert ()
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return converted_insns;
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}
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/* Return 1 if INSN uses or defines a hard register.
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Hard register uses in a memory address are ignored.
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Clobbers and flags definitions are ignored. */
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/* Return the SET expression if INSN doesn't reference hard register.
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Return NULL if INSN uses or defines a hard register, excluding
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pseudo register pushes, hard register uses in a memory address,
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clobbers and flags definitions. */
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static bool
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has_non_address_hard_reg (rtx_insn *insn)
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static rtx
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pseudo_reg_set (rtx_insn *insn)
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{
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rtx set = single_set (insn);
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if (!set)
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return NULL;
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/* Check pseudo register push first. */
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if (REG_P (SET_SRC (set))
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&& !HARD_REGISTER_P (SET_SRC (set))
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&& push_operand (SET_DEST (set), GET_MODE (SET_DEST (set))))
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return set;
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df_ref ref;
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FOR_EACH_INSN_DEF (ref, insn)
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if (HARD_REGISTER_P (DF_REF_REAL_REG (ref))
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&& !DF_REF_FLAGS_IS_SET (ref, DF_REF_MUST_CLOBBER)
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&& DF_REF_REGNO (ref) != FLAGS_REG)
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return true;
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return NULL;
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FOR_EACH_INSN_USE (ref, insn)
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if (!DF_REF_REG_MEM_P (ref) && HARD_REGISTER_P (DF_REF_REAL_REG (ref)))
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return true;
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return NULL;
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return false;
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return set;
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}
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/* Check if comparison INSN may be transformed
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@ -1345,14 +1356,11 @@ convertible_comparison_p (rtx_insn *insn, enum machine_mode mode)
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static bool
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general_scalar_to_vector_candidate_p (rtx_insn *insn, enum machine_mode mode)
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{
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rtx def_set = single_set (insn);
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rtx def_set = pseudo_reg_set (insn);
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if (!def_set)
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return false;
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if (has_non_address_hard_reg (insn))
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return false;
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rtx src = SET_SRC (def_set);
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rtx dst = SET_DEST (def_set);
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@ -1442,14 +1450,11 @@ general_scalar_to_vector_candidate_p (rtx_insn *insn, enum machine_mode mode)
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static bool
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timode_scalar_to_vector_candidate_p (rtx_insn *insn)
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{
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rtx def_set = single_set (insn);
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rtx def_set = pseudo_reg_set (insn);
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if (!def_set)
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return false;
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if (has_non_address_hard_reg (insn))
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return false;
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rtx src = SET_SRC (def_set);
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rtx dst = SET_DEST (def_set);
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@ -1674,6 +1674,22 @@
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;; Push/pop instructions.
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(define_insn_and_split "*pushv1ti2"
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[(set (match_operand:V1TI 0 "push_operand" "=<")
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(match_operand:V1TI 1 "register_operand" "v"))]
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"TARGET_64BIT && TARGET_STV"
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"#"
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"&& reload_completed"
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[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
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(set (match_dup 0) (match_dup 1))]
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{
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operands[2] = GEN_INT (-PUSH_ROUNDING (GET_MODE_SIZE (V1TImode)));
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/* Preserve memory attributes. */
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operands[0] = replace_equiv_address (operands[0], stack_pointer_rtx);
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}
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[(set_attr "type" "multi")
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(set_attr "mode" "TI")])
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(define_insn "*push<mode>2"
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[(set (match_operand:DWI 0 "push_operand" "=<,<")
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(match_operand:DWI 1 "general_no_elim_operand" "riF*o,*v"))]
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@ -1,3 +1,13 @@
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2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
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PR target/95021
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* c-c++-common/dfp/func-vararg-mixed-2.c: Removed.
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* gcc.target/i386/pr95021-1.c: New test.
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* gcc.target/i386/pr95021-2.c: Likewise.
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* gcc.target/i386/pr95021-3.c: Likewise.
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* gcc.target/i386/pr95021-4.c: Likewise.
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* gcc.target/i386/pr95021-5.c: Likewise.
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2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
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* gcc.target/i386/strncmp-1.c: New test.
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@ -1,105 +0,0 @@
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/* { dg-do run { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
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/* { dg-options "-mpreferred-stack-boundary=2" } */
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/* C99 6.5.2.2 Function calls.
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Test passing varargs of the combination of decimal float types and
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other types. */
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#include <stdarg.h>
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#include "dfp-dbg.h"
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/* Supposing the list of varying number of arguments is:
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unsigned int, _Decimal128, double, _Decimal32, _Decimal64. */
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static _Decimal32
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vararg_d32 (unsigned arg, ...)
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{
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va_list ap;
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_Decimal32 result;
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va_start (ap, arg);
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va_arg (ap, unsigned int);
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va_arg (ap, _Decimal128);
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va_arg (ap, double);
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result = va_arg (ap, _Decimal32);
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va_end (ap);
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return result;
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}
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static _Decimal32
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vararg_d64 (unsigned arg, ...)
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{
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va_list ap;
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_Decimal64 result;
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va_start (ap, arg);
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va_arg (ap, unsigned int);
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va_arg (ap, _Decimal128);
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va_arg (ap, double);
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va_arg (ap, _Decimal32);
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result = va_arg (ap, _Decimal64);
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va_end (ap);
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return result;
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}
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static _Decimal128
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vararg_d128 (unsigned arg, ...)
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{
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va_list ap;
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_Decimal128 result;
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va_start (ap, arg);
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va_arg (ap, unsigned int);
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result = va_arg (ap, _Decimal128);
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va_end (ap);
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return result;
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}
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static unsigned int
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vararg_int (unsigned arg, ...)
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{
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va_list ap;
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unsigned int result;
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va_start (ap, arg);
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result = va_arg (ap, unsigned int);
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va_end (ap);
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return result;
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}
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static double
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vararg_double (unsigned arg, ...)
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{
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va_list ap;
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float result;
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va_start (ap, arg);
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va_arg (ap, unsigned int);
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va_arg (ap, _Decimal128);
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result = va_arg (ap, double);
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va_end (ap);
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return result;
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}
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int
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main ()
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{
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if (vararg_d32 (3, 0, 1.0dl, 2.0, 3.0df, 4.0dd) != 3.0df) FAILURE
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if (vararg_d64 (4, 0, 1.0dl, 2.0, 3.0df, 4.0dd) != 4.0dd) FAILURE
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if (vararg_d128 (1, 0, 1.0dl, 2.0, 3.0df, 4.0dd) != 1.0dl) FAILURE
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if (vararg_int (0, 0, 1.0dl, 2.0, 3.0df, 4.0dd) != 0) FAILURE
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if (vararg_double (2, 0, 1.0dl, 2.0, 3.0df, 4.0dd) != 2.0) FAILURE
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FINISH
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}
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27
gcc/testsuite/gcc.target/i386/pr95021-1.c
Normal file
27
gcc/testsuite/gcc.target/i386/pr95021-1.c
Normal file
@ -0,0 +1,27 @@
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/* { dg-do compile { target ia32 } } */
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/* { dg-options "-O2 -msse2 -mstv -W" } */
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/* { dg-final { scan-assembler "movq\[ \t\]%xmm\[0-9\]+, \\(%esp\\)" } } */
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/* { dg-final { scan-assembler-not "psrlq" } } */
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#include <setjmp.h>
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extern jmp_buf buf;
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extern long long *target_p;
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extern long long *c;
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extern void foo (long long);
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__attribute__ ((noclone, noinline))
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void
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bar (void)
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{
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if (setjmp (buf))
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{
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long long target = *target_p;
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*c = target;
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foo (target);
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}
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else
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foo (0);
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}
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39
gcc/testsuite/gcc.target/i386/pr95021-2.c
Normal file
39
gcc/testsuite/gcc.target/i386/pr95021-2.c
Normal file
@ -0,0 +1,39 @@
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/* { dg-do run { target ia32 } } */
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/* { dg-require-effective-target sse2_runtime } */
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/* { dg-options "-O2 -msse2 -mstv -W" } */
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#include <stdlib.h>
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#include "pr95021-1.c"
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jmp_buf buf;
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long long *target_p;
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long long *c;
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int count;
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__attribute__ ((noclone, noinline))
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void
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foo (long long x)
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{
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if (x != *c)
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abort ();
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if (!count)
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{
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count++;
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longjmp (buf, 1);
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}
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}
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int
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main ()
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{
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long long val = 30;
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long long local = 0;
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target_p = &val;
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c = &local;
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bar ();
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if (val != local)
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abort ();
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return 0;
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}
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5
gcc/testsuite/gcc.target/i386/pr95021-3.c
Normal file
5
gcc/testsuite/gcc.target/i386/pr95021-3.c
Normal file
@ -0,0 +1,5 @@
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/* { dg-do compile { target ia32 } } */
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/* { dg-options "-O2 -msse2 -mstv -mregparm=3 -W" } */
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/* { dg-final { scan-assembler "movq\[ \t\]+\[^\n\]*, %xmm" } } */
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#include "pr95021-1.c"
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28
gcc/testsuite/gcc.target/i386/pr95021-4.c
Normal file
28
gcc/testsuite/gcc.target/i386/pr95021-4.c
Normal file
@ -0,0 +1,28 @@
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/* { dg-do compile { target int128 } } */
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/* { dg-options "-O2 -msse2 -mstv -W" } */
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/* { dg-final { scan-assembler "(movaps|vmovdqa)\[ \t\]%xmm\[0-9\]+, \\(%rsp\\)" } } */
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#include <setjmp.h>
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extern jmp_buf buf;
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extern __int128 *target_p;
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__int128 *c;
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extern int count;
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extern void foo (__int128, __int128, __int128, __int128);
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__attribute__ ((noclone, noinline))
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void
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bar (void)
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{
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if (setjmp (buf))
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{
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__int128 target = *target_p;
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*c = target;
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foo (0xbadbeef1, 0x2badbeef, 0xbad3beef, target);
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}
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else
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foo (0xbadbeef1, 0x2badbeef, 0xbad3beef, 0);
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}
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45
gcc/testsuite/gcc.target/i386/pr95021-5.c
Normal file
45
gcc/testsuite/gcc.target/i386/pr95021-5.c
Normal file
@ -0,0 +1,45 @@
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/* { dg-do run { target int128 } } */
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/* { dg-require-effective-target sse2_runtime } */
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/* { dg-options "-O2 -msse2 -mstv -W" } */
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#include <stdlib.h>
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#include "pr95021-4.c"
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jmp_buf buf;
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__int128 *target_p;
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__int128 *c;
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int count;
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__attribute__ ((noclone, noinline))
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void
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foo (__int128 i1, __int128 i2, __int128 i3, __int128 x)
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{
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if (i1 != 0xbadbeef1)
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abort ();
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if (i2 != 0x2badbeef)
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abort ();
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if (i3 != 0xbad3beef)
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abort ();
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if (x != *c)
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abort ();
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if (!count)
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{
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count++;
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longjmp (buf, 1);
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}
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}
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int
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main ()
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{
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__int128 val = 30;
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__int128 local = 0;
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target_p = &val;
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c = &local;
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bar ();
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if (val != local)
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abort ();
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return 0;
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||||
}
|
||||
Loading…
Reference in New Issue
Block a user