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re PR target/65768 (sub-optimimal code for constant Uses in loop)

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gcc/ChangeLog:

2015-05-16  Kugan Vivekanandarajah  <kuganv@linaro.org>
	    Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	PR target/65768
	* config/arm/arm.h (DONT_EARLY_SPLIT_CONSTANT): New macro.
	* config/arm/arm.md (subsi3, andsi3, iorsi3, xorsi3, movsi): Keep some
	 large constants in register instead of splitting them.

gcc/testsuite/ChangeLog:

2015-05-16  Kugan Vivekanandarajah  <kuganv@linaro.org>
	    Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	PR target/65768
	* gcc.target/arm/maskdata.c: New test.


Co-Authored-By: Zhenqiang Chen <zhenqiang.chen@linaro.org>

From-SVN: r223235
This commit is contained in:
Kugan Vivekanandarajah 2015-05-16 09:35:52 +00:00 committed by Kugan Vivekanandarajah
parent e24ba4ab12
commit 26c666565d
5 changed files with 87 additions and 21 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2015-05-16 Kugan Vivekanandarajah <kuganv@linaro.org>
Zhenqiang Chen <zhenqiang.chen@linaro.org>
PR target/65768
* config/arm/arm.h (DONT_EARLY_SPLIT_CONSTANT): New macro.
* config/arm/arm.md (subsi3, andsi3, iorsi3, xorsi3, movsi): Keep some
large constants in register instead of splitting them.
2015-05-16 Uros Bizjak <ubizjak@gmail.com>
PR target/66140

6
gcc/config/arm/arm.h
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@ -396,6 +396,12 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
/* Should NEON be used for 64-bits bitops. */
#define TARGET_PREFER_NEON_64BITS (prefer_neon_for_64bits)
/* Should constant I be slplit for OP. */
#define DONT_EARLY_SPLIT_CONSTANT(i, op) \
((optimize >= 2) \
&& can_create_pseudo_p () \
&& !const_ok_for_op (i, op))
/* True iff the full BPABI is being used. If TARGET_BPABI is true,
then TARGET_AAPCS_BASED must be true -- but the converse does not
hold. TARGET_BPABI implies the use of the BPABI runtime library,

73
gcc/config/arm/arm.md
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@ -1168,10 +1168,16 @@
{
if (TARGET_32BIT)
{
arm_split_constant (MINUS, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0],
operands[2], optimize && can_create_pseudo_p ());
DONE;
if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[1]), MINUS))
operands[1] = force_reg (SImode, operands[1]);
else
{
arm_split_constant (MINUS, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0],
operands[2],
optimize && can_create_pseudo_p ());
DONE;
}
}
else /* TARGET_THUMB1 */
operands[1] = force_reg (SImode, operands[1]);
@ -2082,14 +2088,19 @@
operands[1] = convert_to_mode (QImode, operands[1], 1);
emit_insn (gen_thumb2_zero_extendqisi2_v6 (operands[0],
operands[1]));
DONE;
}
else if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), AND))
operands[2] = force_reg (SImode, operands[2]);
else
arm_split_constant (AND, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0],
operands[1],
optimize && can_create_pseudo_p ());
{
arm_split_constant (AND, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0],
operands[1],
optimize && can_create_pseudo_p ());
DONE;
DONE;
}
}
}
else /* TARGET_THUMB1 */
@ -2888,10 +2899,16 @@
{
if (TARGET_32BIT)
{
arm_split_constant (IOR, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0], operands[1],
optimize && can_create_pseudo_p ());
DONE;
if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), IOR))
operands[2] = force_reg (SImode, operands[2]);
else
{
arm_split_constant (IOR, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0],
operands[1],
optimize && can_create_pseudo_p ());
DONE;
}
}
else /* TARGET_THUMB1 */
{
@ -3058,10 +3075,16 @@
{
if (TARGET_32BIT)
{
arm_split_constant (XOR, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0], operands[1],
optimize && can_create_pseudo_p ());
DONE;
if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[2]), XOR))
operands[2] = force_reg (SImode, operands[2]);
else
{
arm_split_constant (XOR, SImode, NULL_RTX,
INTVAL (operands[2]), operands[0],
operands[1],
optimize && can_create_pseudo_p ());
DONE;
}
}
else /* TARGET_THUMB1 */
{
@ -5548,10 +5571,18 @@
&& !(const_ok_for_arm (INTVAL (operands[1]))
|| const_ok_for_arm (~INTVAL (operands[1]))))
{
arm_split_constant (SET, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0], NULL_RTX,
optimize && can_create_pseudo_p ());
DONE;
if (DONT_EARLY_SPLIT_CONSTANT (INTVAL (operands[1]), SET))
{
emit_insn (gen_rtx_SET (operands[0], operands[1]));
DONE;
}
else
{
arm_split_constant (SET, SImode, NULL_RTX,
INTVAL (operands[1]), operands[0], NULL_RTX,
optimize && can_create_pseudo_p ());
DONE;
}
}
}
else /* TARGET_THUMB1... */

6
gcc/testsuite/ChangeLog
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@ -1,3 +1,9 @@
2015-05-16 Kugan Vivekanandarajah <kuganv@linaro.org>
Zhenqiang Chen <zhenqiang.chen@linaro.org>
PR target/65768
* gcc.target/arm/maskdata.c: New test.
2015-05-16 Mikael Morin <mikael@gcc.gnu.org>
PR fortran/65792

15
gcc/testsuite/gcc.target/arm/maskdata.c Normal file
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@ -0,0 +1,15 @@
/* { dg-do compile } */
/* { dg-options " -O2 -fno-gcse " } */
/* { dg-require-effective-target arm_thumb2_ok } */
#define MASK 0xff00ff
void maskdata (int * data, int len)
{
int i = len;
for (; i > 0; i -= 2)
{
data[i] &= MASK;
data[i + 1] &= MASK;
}
}
/* { dg-final { scan-assembler-not "65280" } } */