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i386: Enable AVX512 memory broadcast for INT add

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Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for INT add operations.

gcc/

	PR target/72782
	* config/i386/sse.md (avx512bcst): Updated for V4SI, V2DI, V8SI,
	V4DI, V16SI and V8DI.
	(*sub<mode>3<mask_name>_bcst): New.
	(*add<mode>3<mask_name>_bcst): Likewise.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-add-di-zmm-1.c: New test.
	* gcc.target/i386/avx512f-add-si-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-6.c: Likewise.
	* gcc.target/i386/avx512f-sub-di-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-5.c: Likewise.
	* gcc.target/i386/avx512vl-add-si-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-add-si-ymm-1.c: Likewise.
	* gcc.target/i386/avx512vl-sub-si-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-sub-si-ymm-1.c: Likewise.

From-SVN: r265368
This commit is contained in:
H.J. Lu 2018-10-22 07:25:51 +00:00 committed by H.J. Lu
parent 0067ddcc0f
commit 26d50717b8
20 changed files with 261 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2018-10-22 H.J. Lu <hongjiu.lu@intel.com>
PR target/72782
* config/i386/sse.md (avx512bcst): Updated for V4SI, V2DI, V8SI,
V4DI, V16SI and V8DI.
(*sub<mode>3<mask_name>_bcst): New.
(*add<mode>3<mask_name>_bcst): Likewise.
2018-10-21 H.J. Lu <hongjiu.lu@intel.com>
PR target/72782

29
gcc/config/i386/sse.md
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@ -656,7 +656,10 @@
V16SF V8DF])
(define_mode_attr avx512bcst
[(V4SF "%{1to4%}") (V2DF "%{1to2%}")
[(V4SI "%{1to4%}") (V2DI "%{1to2%}")
(V8SI "%{1to8%}") (V4DI "%{1to4%}")
(V16SI "%{1to16%}") (V8DI "%{1to8%}")
(V4SF "%{1to4%}") (V2DF "%{1to2%}")
(V8SF "%{1to8%}") (V4DF "%{1to4%}")
(V16SF "%{1to16%}") (V8DF "%{1to8%}")])
@ -10440,6 +10443,30 @@
(set_attr "prefix" "orig,vex")
(set_attr "mode" "<sseinsnmode>")])
(define_insn "*sub<mode>3_bcst"
[(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
(minus:VI48_AVX512VL
(match_operand:VI48_AVX512VL 1 "register_operand" "v")
(vec_duplicate:VI48_AVX512VL
(match_operand:<ssescalarmode> 2 "memory_operand" "m"))))]
"TARGET_AVX512F && ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
"vpsub<ssemodesuffix>\t{%2<avx512bcst>, %1, %0|%0, %1, %2<avx512bcst>}"
[(set_attr "type" "sseiadd")
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
(define_insn "*add<mode>3_bcst"
[(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
(plus:VI48_AVX512VL
(vec_duplicate:VI48_AVX512VL
(match_operand:<ssescalarmode> 1 "memory_operand" "m"))
(match_operand:VI48_AVX512VL 2 "register_operand" "v")))]
"TARGET_AVX512F && ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
"vpadd<ssemodesuffix>\t{%1<avx512bcst>, %2, %0|%0, %2, %1<avx512bcst>}"
[(set_attr "type" "sseiadd")
(set_attr "prefix" "evex")
(set_attr "mode" "<sseinsnmode>")])
(define_insn "*<plusminus_insn><mode>3_mask"
[(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
(vec_merge:VI48_AVX512VL

21
gcc/testsuite/ChangeLog
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@ -1,3 +1,24 @@
2018-10-22 H.J. Lu <hongjiu.lu@intel.com>
PR target/72782
* gcc.target/i386/avx512f-add-di-zmm-1.c: New test.
* gcc.target/i386/avx512f-add-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512f-add-si-zmm-6.c: Likewise.
* gcc.target/i386/avx512f-sub-di-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-1.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-2.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-3.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-4.c: Likewise.
* gcc.target/i386/avx512f-sub-si-zmm-5.c: Likewise.
* gcc.target/i386/avx512vl-add-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-add-si-ymm-1.c: Likewise.
* gcc.target/i386/avx512vl-sub-si-xmm-1.c: Likewise.
* gcc.target/i386/avx512vl-sub-si-ymm-1.c: Likewise.
2018-10-21 H.J. Lu <hongjiu.lu@intel.com>
PR target/72782

12
gcc/testsuite/gcc.target/i386/avx512f-add-di-zmm-1.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpaddq\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastq\[^\n\]*%zmm\[0-9\]+" } } */
#define type __m512i
#define vec 512
#define op add
#define suffix epi64
#define SCALAR long long
#include "avx512-binop-1.h"

12
gcc/testsuite/gcc.target/i386/avx512f-add-si-zmm-1.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */
#define type __m512i
#define vec 512
#define op add
#define suffix epi32
#define SCALAR int
#include "avx512-binop-1.h"

12
gcc/testsuite/gcc.target/i386/avx512f-add-si-zmm-2.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */
#define type __m512i
#define vec 512
#define op add
#define suffix epi32
#define SCALAR int
#include "avx512-binop-2.h"

12
gcc/testsuite/gcc.target/i386/avx512f-add-si-zmm-3.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vpaddd\[^\n\]*%zmm\[0-9\]+" 1 } } */
#define type __m512i
#define vec 512
#define op add
#define suffix epi32
#define SCALAR int
#include "avx512-binop-3.h"

12
gcc/testsuite/gcc.target/i386/avx512f-add-si-zmm-4.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+%zmm\[0-9\]+, %zmm\[0-9\]+, %zmm0" 1 } } */
#define type __m512i
#define vec 512
#define op add
#define suffix epi32
#define SCALAR int
#include "avx512-binop-4.h"

12
gcc/testsuite/gcc.target/i386/avx512f-add-si-zmm-5.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */
#define type __m512i
#define vec 512
#define op add
#define suffix epi32
#define SCALAR int
#include "avx512-binop-5.h"

12
gcc/testsuite/gcc.target/i386/avx512f-add-si-zmm-6.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */
#define type __m512i
#define vec 512
#define op add
#define suffix epi32
#define SCALAR int
#include "avx512-binop-6.h"

12
gcc/testsuite/gcc.target/i386/avx512f-sub-di-zmm-1.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpsubq\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastq\[^\n\]*%zmm\[0-9\]+" } } */
#define type __m512i
#define vec 512
#define op sub
#define suffix epi64
#define SCALAR long long
#include "avx512-binop-1.h"

12
gcc/testsuite/gcc.target/i386/avx512f-sub-si-zmm-1.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */
#define type __m512i
#define vec 512
#define op sub
#define suffix epi32
#define SCALAR int
#include "avx512-binop-1.h"

12
gcc/testsuite/gcc.target/i386/avx512f-sub-si-zmm-2.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vpsubd\[^\n\]*%zmm\[0-9\]+" 1 } } */
#define type __m512i
#define vec 512
#define op sub
#define suffix epi32
#define SCALAR int
#include "avx512-binop-2.h"

12
gcc/testsuite/gcc.target/i386/avx512f-sub-si-zmm-3.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vpsubd\[^\n\]*%zmm\[0-9\]+" 1 } } */
#define type __m512i
#define vec 512
#define op sub
#define suffix epi32
#define SCALAR int
#include "avx512-binop-3.h"

12
gcc/testsuite/gcc.target/i386/avx512f-sub-si-zmm-4.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile { target { ! ia32 } } } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" 1 } } */
/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+%zmm\[0-9\]+, %zmm\[0-9\]+, %zmm0" 1 } } */
#define type __m512i
#define vec 512
#define op sub
#define suffix epi32
#define SCALAR int
#include "avx512-binop-4.h"

12
gcc/testsuite/gcc.target/i386/avx512f-sub-si-zmm-5.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512f -O2" } */
/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\[^\n\]*\\\{1to\[1-8\]+\\\}, %zmm\[0-9\]+, %zmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%zmm\[0-9\]+" } } */
#define type __m512i
#define vec 512
#define op sub
#define suffix epi32
#define SCALAR int
#include "avx512-binop-5.h"

12
gcc/testsuite/gcc.target/i386/avx512vl-add-si-xmm-1.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512vl -O2" } */
/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %xmm\[0-9\]+, %xmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%xmm\[0-9\]+" } } */
#define type __m128i
#define vec
#define op add
#define suffix epi32
#define SCALAR int
#include "avx512-binop-1.h"

12
gcc/testsuite/gcc.target/i386/avx512vl-add-si-ymm-1.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512vl -O2" } */
/* { dg-final { scan-assembler-times "vpaddd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %ymm\[0-9\]+, %ymm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%ymm\[0-9\]+" } } */
#define type __m256i
#define vec 256
#define op add
#define suffix epi32
#define SCALAR int
#include "avx512-binop-1.h"

12
gcc/testsuite/gcc.target/i386/avx512vl-sub-si-xmm-1.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512vl -O2" } */
/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %xmm\[0-9\]+, %xmm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%xmm\[0-9\]+" } } */
#define type __m128i
#define vec
#define op sub
#define suffix epi32
#define SCALAR int
#include "avx512-binop-1.h"

12
gcc/testsuite/gcc.target/i386/avx512vl-sub-si-ymm-1.c Normal file
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@ -0,0 +1,12 @@
/* { dg-do compile } */
/* { dg-options "-mavx512vl -O2" } */
/* { dg-final { scan-assembler-times "vpsubd\[ \\t\]+\\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}, %ymm\[0-9\]+, %ymm0" 1 } } */
/* { dg-final { scan-assembler-not "vpbroadcastd\[^\n\]*%ymm\[0-9\]+" } } */
#define type __m256i
#define vec 256
#define op sub
#define suffix epi32
#define SCALAR int
#include "avx512-binop-1.h"