i386: Enable VxHF vector modes lower ABI levels [PR103571]
Enable VxHF vector modes for SSE2, AVX and AVX512F ABIs. 2021-12-16 Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog: PR target/103571 * config/i386/i386.h (VALID_AVX256_REG_MODE): Add V16HFmode. (VALID_AVX256_REG_OR_OI_VHF_MODE): Replace with ... (VALID_AVX256_REG_OR_OI_MODE): ... this. Remove V16HFmode. (VALID_AVX512F_SCALAR_MODE): Remove HImode and HFmode. (VALID_AVX512FP16_SCALAR_MODE): New. (VALID_AVX512F_REG_MODE): Add V32HFmode. (VALID_SSE2_REG_MODE): Add V8HFmode, V4HFmode and V2HFmode. (VALID_SSE2_REG_VHF_MODE): Remove. (VALID_INT_MODE_P): Add V2HFmode. * config/i386/i386.c (function_arg_advance_64): Remove explicit mention of V16HFmode and V32HFmode. (ix86_hard_regno_mode_ok): Remove explicit mention of XImode and V32HFmode, use VALID_AVX512F_REG_OR_XI_MODE instead. Use VALID_AVX512FP_SCALAR_MODE for TARGET_aVX512FP16. Use VALID_AVX256_REG_OR_OI_MODE instead of VALID_AVX256_REG_OR_OI_VHF_MODE and VALID_SSE2_REG_MODE instead of VALID_SSE2_REG_VHF_MODE. (ix86_set_reg_reg_cost): Remove usge of VALID_AVX512FP16_REG_MODE. (ix86_vector_mode_supported): Ditto. gcc/testsuite/ChangeLog: PR target/103571 * gcc.target/i386/pr102812.c (dg-final): Do not scan for movdqa.
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@ -2942,9 +2942,7 @@ function_arg_advance_64 (CUMULATIVE_ARGS *cum, machine_mode mode,
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/* Unnamed 512 and 256bit vector mode parameters are passed on stack. */
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if (!named && (VALID_AVX512F_REG_MODE (mode)
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|| VALID_AVX256_REG_MODE (mode)
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|| mode == V16HFmode
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|| mode == V32HFmode))
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|| VALID_AVX256_REG_MODE (mode)))
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return 0;
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if (!examine_argument (mode, type, 0, &int_nregs, &sse_nregs)
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@ -19915,15 +19913,17 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
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- XI mode
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- any of 512-bit wide vector mode
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- any scalar mode. */
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/* For AVX512FP16, vmovw supports movement of HImode
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between gpr and sse registser. */
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if (TARGET_AVX512F
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&& (mode == XImode
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|| mode == V32HFmode
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|| VALID_AVX512F_REG_MODE (mode)
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&& (VALID_AVX512F_REG_OR_XI_MODE (mode)
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|| VALID_AVX512F_SCALAR_MODE (mode)))
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return true;
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/* For AVX512FP16, vmovw supports movement of HImode
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and HFmode between GPR and SSE registers. */
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if (TARGET_AVX512FP16
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&& VALID_AVX512FP16_SCALAR_MODE (mode))
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return true;
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/* For AVX-5124FMAPS or AVX-5124VNNIW
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allow V64SF and V64SI modes for special regnos. */
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if ((TARGET_AVX5124FMAPS || TARGET_AVX5124VNNIW)
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@ -19934,7 +19934,7 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
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/* TODO check for QI/HI scalars. */
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/* AVX512VL allows sse regs16+ for 128/256 bit modes. */
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if (TARGET_AVX512VL
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&& (VALID_AVX256_REG_OR_OI_VHF_MODE (mode)
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&& (VALID_AVX256_REG_OR_OI_MODE (mode)
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|| VALID_AVX512VL_128_REG_MODE (mode)))
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return true;
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@ -19944,9 +19944,9 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
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/* OImode and AVX modes are available only when AVX is enabled. */
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return ((TARGET_AVX
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&& VALID_AVX256_REG_OR_OI_VHF_MODE (mode))
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&& VALID_AVX256_REG_OR_OI_MODE (mode))
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|| VALID_SSE_REG_MODE (mode)
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|| VALID_SSE2_REG_VHF_MODE (mode)
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|| VALID_SSE2_REG_MODE (mode)
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|| VALID_MMX_REG_MODE (mode)
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|| VALID_MMX_REG_MODE_3DNOW (mode));
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}
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@ -20156,8 +20156,7 @@ ix86_set_reg_reg_cost (machine_mode mode)
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case MODE_VECTOR_INT:
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case MODE_VECTOR_FLOAT:
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if ((TARGET_AVX512FP16 && VALID_AVX512FP16_REG_MODE (mode))
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|| (TARGET_AVX512F && VALID_AVX512F_REG_MODE (mode))
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if ((TARGET_AVX512F && VALID_AVX512F_REG_MODE (mode))
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|| (TARGET_AVX && VALID_AVX256_REG_MODE (mode))
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|| (TARGET_SSE2 && VALID_SSE2_REG_MODE (mode))
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|| (TARGET_SSE && VALID_SSE_REG_MODE (mode))
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@ -22080,8 +22079,6 @@ ix86_vector_mode_supported_p (machine_mode mode)
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if ((TARGET_MMX || TARGET_MMX_WITH_SSE)
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&& VALID_MMX_REG_MODE (mode))
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return true;
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if (TARGET_AVX512FP16 && VALID_AVX512FP16_REG_MODE (mode))
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return true;
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if ((TARGET_3DNOW || TARGET_MMX_WITH_SSE)
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&& VALID_MMX_REG_MODE_3DNOW (mode))
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return true;
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@ -1005,20 +1005,22 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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#define VALID_AVX256_REG_MODE(MODE) \
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((MODE) == V32QImode || (MODE) == V16HImode || (MODE) == V8SImode \
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|| (MODE) == V4DImode || (MODE) == V2TImode || (MODE) == V8SFmode \
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|| (MODE) == V4DFmode)
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|| (MODE) == V4DFmode || (MODE) == V16HFmode)
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#define VALID_AVX256_REG_OR_OI_VHF_MODE(MODE) \
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(VALID_AVX256_REG_MODE (MODE) || (MODE) == OImode || (MODE) == V16HFmode)
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#define VALID_AVX256_REG_OR_OI_MODE(MODE) \
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(VALID_AVX256_REG_MODE (MODE) || (MODE) == OImode)
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#define VALID_AVX512F_SCALAR_MODE(MODE) \
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((MODE) == DImode || (MODE) == DFmode || (MODE) == SImode \
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|| (MODE) == SFmode \
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|| (TARGET_AVX512FP16 && ((MODE) == HImode || (MODE) == HFmode)))
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|| (MODE) == SFmode)
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#define VALID_AVX512FP16_SCALAR_MODE(MODE) \
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((MODE) == HImode || (MODE) == HFmode)
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#define VALID_AVX512F_REG_MODE(MODE) \
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((MODE) == V8DImode || (MODE) == V8DFmode || (MODE) == V64QImode \
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|| (MODE) == V16SImode || (MODE) == V16SFmode || (MODE) == V32HImode \
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|| (MODE) == V4TImode)
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|| (MODE) == V4TImode || (MODE) == V32HFmode)
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#define VALID_AVX512F_REG_OR_XI_MODE(MODE) \
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(VALID_AVX512F_REG_MODE (MODE) || (MODE) == XImode)
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@ -1035,13 +1037,10 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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#define VALID_SSE2_REG_MODE(MODE) \
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((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \
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|| (MODE) == V8HFmode || (MODE) == V4HFmode || (MODE) == V2HFmode \
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|| (MODE) == V4QImode || (MODE) == V2HImode || (MODE) == V1SImode \
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|| (MODE) == V2DImode || (MODE) == DFmode || (MODE) == HFmode)
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#define VALID_SSE2_REG_VHF_MODE(MODE) \
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(VALID_SSE2_REG_MODE (MODE) || (MODE) == V8HFmode \
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|| (MODE) == V4HFmode || (MODE) == V2HFmode)
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#define VALID_SSE_REG_MODE(MODE) \
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((MODE) == V1TImode || (MODE) == TImode \
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|| (MODE) == V4SFmode || (MODE) == V4SImode \
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@ -1072,7 +1071,8 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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|| (MODE) == CSImode || (MODE) == CDImode \
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|| (MODE) == SDmode || (MODE) == DDmode \
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|| (MODE) == HFmode || (MODE) == HCmode \
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|| (MODE) == V4QImode || (MODE) == V2HImode || (MODE) == V1SImode \
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|| (MODE) == V2HImode || (MODE) == V2HFmode \
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|| (MODE) == V1SImode || (MODE) == V4QImode \
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|| (TARGET_64BIT \
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&& ((MODE) == TImode || (MODE) == CTImode \
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|| (MODE) == TFmode || (MODE) == TCmode \
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@ -2,7 +2,6 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -msse4 -mno-avx" } */
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/* { dg-final { scan-assembler-not "vmovdqa64\t" } } */
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/* { dg-final { scan-assembler "movdqa\t" } } */
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typedef _Float16 v8hf __attribute__((__vector_size__ (16)));
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