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rs6000: Put CR0 first in REG_ALLOC_ORDER

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IRA and LRA prefer to use CR7 (which is first in REG_ALLOC_ORDER) over
CR0, although the latter often is cheaper ("x" vs. "y" constraints).
We should figure out why this is and fix it; but until that is done,
this patch makes CR0 the first allocated register: it improves the
current code, and it is required for later patches to be effective.

(It changes two testcases to no longer look at what CR field is
allocated).


	* config/rs6000/rs6000.h (REG_ALLOC_ORDER): Move 68 (that is, CR0) to
	be the first CR field allocated.

gcc/testsuite/
	* gcc.target/powerpc/safe-indirect-jump-2.c: Do not check assigned CR
	field number.
	* gcc.target/powerpc/safe-indirect-jump-3.c: Ditto.

From-SVN: r265318
This commit is contained in:
Segher Boessenkool 2018-10-19 17:40:57 +02:00 committed by Segher Boessenkool
parent cba40f681a
commit 273f3d4bb4
5 changed files with 16 additions and 9 deletions
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5
gcc/ChangeLog
View File

@ -1,3 +1,8 @@
2018-10-19 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.h (REG_ALLOC_ORDER): Move 68 (that is, CR0) to
be the first CR field allocated.
2018-10-19 Richard Biener <rguenther@suse.de>
PR target/87657

2
gcc/config/rs6000/rs6000.h
View File

@ -952,7 +952,7 @@ enum data_align { align_abi, align_opt, align_both };
33, \
63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
50, 49, 48, 47, 46, \
75, 73, 74, 69, 68, 72, 71, 70, \
68, 75, 73, 74, 69, 72, 71, 70, \
MAYBE_R2_AVAILABLE \
9, 10, 8, 7, 6, 5, 4, \
3, EARLY_R12 11, 0, \

6
gcc/testsuite/ChangeLog
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@ -1,3 +1,9 @@
2018-10-19 Segher Boessenkool <segher@kernel.crashing.org>
* gcc.target/powerpc/safe-indirect-jump-2.c: Do not check assigned CR
field number.
* gcc.target/powerpc/safe-indirect-jump-3.c: Ditto.
2018-10-19 Richard Biener <rguenther@suse.de>
PR middle-end/87645

6
gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-2.c
View File

@ -27,8 +27,6 @@ int foo (int x)
return spaz (x) / 2;
}
/* The following assumes CR7 as the first chosen volatile. */
/* { dg-final { scan-assembler "crset 30" } } */
/* { dg-final { scan-assembler "beqctr- 7" } } */
/* { dg-final { scan-assembler "crset" } } */
/* { dg-final { scan-assembler "beqctr-" } } */
/* { dg-final { scan-assembler {b \$} } } */

6
gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c
View File

@ -46,8 +46,6 @@ int foo (int x)
return a;
}
/* The following assumes CR7 as the first chosen volatile. */
/* { dg-final { scan-assembler "crset 30" } } */
/* { dg-final { scan-assembler "beqctr- 7" } } */
/* { dg-final { scan-assembler "crset" } } */
/* { dg-final { scan-assembler "beqctr-" } } */
/* { dg-final { scan-assembler {b \$} } } */