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ira.c (check_allocation): Use REG_WORDS_BIG_ENDIAN, not WORDS_BIG_ENDIAN. 

* ira.c (check_allocation): Use REG_WORDS_BIG_ENDIAN, not
	WORDS_BIG_ENDIAN.
	* ira-color.c (setup_profitable_hard_regs, check_hard_reg_p,
	assign_hard_reg): Likewise.

From-SVN: r184451
This commit is contained in:
Bernd Schmidt 2012-02-21 23:27:59 +00:00
parent 1889b25304
commit 2805e6c016
3 changed files with 18 additions and 11 deletions
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15
gcc/ChangeLog
View File

@ -1,14 +1,21 @@
2012-01-21 Georg-Johann Lay <avr@gjlay.de>
2012-02-21 Bernd Schmidt <bernds@codesourcery.com>
* ira.c (check_allocation): Use REG_WORDS_BIG_ENDIAN, not
WORDS_BIG_ENDIAN.
* ira-color.c (setup_profitable_hard_regs, check_hard_reg_p,
assign_hard_reg): Likewise.
2012-02-21 Georg-Johann Lay <avr@gjlay.de>
* config/avr/avr.md (neghi2): Remove "!d,0" alternative. Tweak "r,0".
2012-01-21 Georg-Johann Lay <avr@gjlay.de>
2012-02-21 Georg-Johann Lay <avr@gjlay.de>
* config/avr/avr.md
(*dec-and-branchhi!=-1.d.clobber): New text peephole.
(*dec-and-branchhi!=-1.l.clobber): New text peephole.
2012-01-21 Georg-Johann Lay <avr@gjlay.de>
2012-02-21 Georg-Johann Lay <avr@gjlay.de>
* config/avr/avr-protos.h (avr_accumulate_outgoing_args): Move
prototype from here to...
@ -17,7 +24,7 @@
2012-02-21 Richard Earnshaw <rearnsha@arm.com>
PR target/52294
* thumb2.md (thumb2_shiftsi3_short): Split register and
* thumb2.md (thumb2_shiftsi3_short): Split register and
immediate shifts. For register shifts tie operands 0 and 1.
(peephole2 for above): Check that register-controlled shifts
have suitably tied operands.

8
gcc/ira-color.c
View File

@ -1,5 +1,5 @@
/* IRA allocation based on graph coloring.
Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011, 2012
Free Software Foundation, Inc.
Contributed by Vladimir Makarov <vmakarov@redhat.com>.
@ -1067,7 +1067,7 @@ setup_profitable_hard_regs (void)
{
int num = OBJECT_SUBWORD (conflict_obj);
if (WORDS_BIG_ENDIAN)
if (REG_WORDS_BIG_ENDIAN)
CLEAR_HARD_REG_BIT
(ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
hard_regno + nobj - num - 1);
@ -1451,7 +1451,7 @@ check_hard_reg_p (ira_allocno_t a, int hard_regno,
if (nregs == nwords)
{
if (WORDS_BIG_ENDIAN)
if (REG_WORDS_BIG_ENDIAN)
set_to_test_start = nwords - j - 1;
else
set_to_test_start = j;
@ -1610,7 +1610,7 @@ assign_hard_reg (ira_allocno_t a, bool retry_p)
{
int num = OBJECT_SUBWORD (conflict_obj);
if (WORDS_BIG_ENDIAN)
if (REG_WORDS_BIG_ENDIAN)
SET_HARD_REG_BIT (conflicting_regs[word],
hard_regno + n_objects - num - 1);
else

6
gcc/ira.c
View File

@ -1,5 +1,5 @@
/* Integrated Register Allocator (IRA) entry point.
Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011, 2012
Free Software Foundation, Inc.
Contributed by Vladimir Makarov <vmakarov@redhat.com>.
@ -2089,7 +2089,7 @@ check_allocation (void)
int this_regno = hard_regno;
if (n > 1)
{
if (WORDS_BIG_ENDIAN)
if (REG_WORDS_BIG_ENDIAN)
this_regno += n - i - 1;
else
this_regno += i;
@ -2108,7 +2108,7 @@ check_allocation (void)
if (ALLOCNO_NUM_OBJECTS (conflict_a) > 1
&& conflict_nregs == ALLOCNO_NUM_OBJECTS (conflict_a))
{
if (WORDS_BIG_ENDIAN)
if (REG_WORDS_BIG_ENDIAN)
conflict_hard_regno += (ALLOCNO_NUM_OBJECTS (conflict_a)
- OBJECT_SUBWORD (conflict_obj) - 1);
else