testsuite/s390: Adapt test expections.

Some tests expect a convert instruction but nowadays
(r12-4475-g247c407c83f001) the conversion is already done at compile
time.  This results in a literal-pool load.  Change the tests accordingly.

gcc/testsuite/ChangeLog:

	* gcc.target/s390/zvector/vec-double-compile.c: Expect vl
	  instead of vc*.
	* gcc.target/s390/zvector/vec-float-compile.c: Dito.
	* gcc.target/s390/zvector/vec-signed-compile.c: Dito.
	* gcc.target/s390/zvector/vec-unsigned-compile.c: Dito.
This commit is contained in:
Robin Dapp 2022-04-01 20:28:05 +02:00
parent 042f853466
commit 2874772c4b
4 changed files with 24 additions and 8 deletions

View File

@ -31,6 +31,10 @@ vcdlgb_mem (vector unsigned long long *a)
return vec_double (*a); return vec_double (*a);
} }
/* The following immediates are being converted and directly stored
in the literal pool so no explicit conversion is necessary. */
/* { dg-final { scan-assembler-times "vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
vector double vector double
vcdgb_imm () vcdgb_imm ()
{ {
@ -43,5 +47,5 @@ vcdlgb_imm ()
return vec_double ((vector unsigned long long){ 1, 2 }); return vec_double ((vector unsigned long long){ 1, 2 });
} }
/* { dg-final { scan-assembler-times "vcdgb\t" 3 } } */ /* { dg-final { scan-assembler-times "vcdgb\t" 2 } } */
/* { dg-final { scan-assembler-times "vcdlgb\t" 3 } } */ /* { dg-final { scan-assembler-times "vcdlgb\t" 2 } } */

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@ -31,6 +31,10 @@ vcelfb_mem (vector unsigned int *a)
return vec_float (*a); return vec_float (*a);
} }
/* The following immediates are being converted and directly stored
in the literal pool so no explicit conversion is necessary. */
/* { dg-final { scan-assembler-times "vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
vector float vector float
vcefb_imm () vcefb_imm ()
{ {
@ -43,5 +47,5 @@ vcelfb_imm ()
return vec_float ((vector unsigned int){ 1, 2 }); return vec_float ((vector unsigned int){ 1, 2 });
} }
/* { dg-final { scan-assembler-times "vcefb\t" 3 } } */ /* { dg-final { scan-assembler-times "vcefb\t" 2 } } */
/* { dg-final { scan-assembler-times "vcelfb\t" 3 } } */ /* { dg-final { scan-assembler-times "vcelfb\t" 2 } } */

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@ -31,6 +31,10 @@ vcgdb_mem (vector double *a)
return vec_signed (*a); return vec_signed (*a);
} }
/* The following immediates are being converted and directly stored
in the literal pool so no explicit conversion is necessary. */
/* { dg-final { scan-assembler-times "vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
vector signed int vector signed int
vcfeb_imm () vcfeb_imm ()
{ {
@ -43,5 +47,5 @@ vcgdb_imm ()
return vec_signed ((vector double){ 1.0, 2.0 }); return vec_signed ((vector double){ 1.0, 2.0 });
} }
/* { dg-final { scan-assembler-times "vcfeb\t" 3 } } */ /* { dg-final { scan-assembler-times "vcfeb\t" 2 } } */
/* { dg-final { scan-assembler-times "vcgdb\t" 3 } } */ /* { dg-final { scan-assembler-times "vcgdb\t" 2 } } */

View File

@ -31,6 +31,10 @@ vclgdb_mem (vector double *a)
return vec_unsigned (*a); return vec_unsigned (*a);
} }
/* The following immediates are being converted and directly stored
in the literal pool so no explicit conversion is necessary. */
/* { dg-final { scan-assembler-times "vl\t%v\[0-9\]+,\.L\[0-9\]+\-\.L\[0-9\]+\\(%r\[0-9\]+\\)" 2 } } */
vector unsigned int vector unsigned int
vclfeb_imm () vclfeb_imm ()
{ {
@ -43,5 +47,5 @@ vclgdb_imm ()
return vec_unsigned ((vector double){ 1.0, 2.0 }); return vec_unsigned ((vector double){ 1.0, 2.0 });
} }
/* { dg-final { scan-assembler-times "vclfeb\t" 3 } } */ /* { dg-final { scan-assembler-times "vclfeb\t" 2 } } */
/* { dg-final { scan-assembler-times "vclgdb\t" 3 } } */ /* { dg-final { scan-assembler-times "vclgdb\t" 2 } } */