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s390.md ("*llgt_sisi", [...]): New insns. 

* config/s390/s390.md ("*llgt_sisi", "*llgt_sisi_split", "*llgt_didi",
	"*llgt_didi_split", "*llgt_sidi", "*llgt_sidi_split"): New insns.

From-SVN: r70812
This commit is contained in:
Andreas Krebbel 2003-08-26 14:53:53 +00:00 committed by Ulrich Weigand
parent a1b892b5d5
commit 288e517f66
2 changed files with 76 additions and 0 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2003-08-26 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.md ("*llgt_sisi", "*llgt_sisi_split", "*llgt_didi",
"*llgt_didi_split", "*llgt_sidi", "*llgt_sidi_split"): New insns.
2003-08-26 Andreas Krebbel <krebbel1@de.ibm.com>
* config/s390/s390.md ("*fmadddf", "*fmsubdf",

71
gcc/config/s390/s390.md
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@ -2439,6 +2439,77 @@
"llgh\t%0,%1"
[(set_attr "op_type" "RXY")])
;
; LLGT-type instructions (zero-extend from 31 bit to 64 bit).
;
(define_insn "*llgt_sisi"
[(set (match_operand:SI 0 "register_operand" "=d,d")
(and:SI (match_operand:SI 1 "nonimmediate_operand" "d,m")
(const_int 2147483647)))]
"TARGET_64BIT"
"@
llgtr\t%0,%1
llgt\t%0,%1"
[(set_attr "op_type" "RRE,RXE")])
(define_insn_and_split "*llgt_sisi_split"
[(set (match_operand:SI 0 "register_operand" "=d,d")
(and:SI (match_operand:SI 1 "nonimmediate_operand" "d,m")
(const_int 2147483647)))
(clobber (reg:CC 33))]
"TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0)
(and:SI (match_dup 1)
(const_int 2147483647)))]
"")
(define_insn "*llgt_didi"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(and:DI (match_operand:DI 1 "nonimmediate_operand" "d,o")
(const_int 2147483647)))]
"TARGET_64BIT"
"@
llgtr\t%0,%1
llgt\t%0,%N1"
[(set_attr "op_type" "RRE,RXE")])
(define_insn_and_split "*llgt_didi_split"
[(set (match_operand:DI 0 "register_operand" "=d,d")
(and:DI (match_operand:DI 1 "nonimmediate_operand" "d,o")
(const_int 2147483647)))
(clobber (reg:CC 33))]
"TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0)
(and:DI (match_dup 1)
(const_int 2147483647)))]
"")
(define_insn "*llgt_sidi"
[(set (match_operand:DI 0 "register_operand" "=d")
(and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "m") 0)
(const_int 2147483647)))]
"TARGET_64BIT"
"llgt\t%0,%1"
[(set_attr "op_type" "RXE")])
(define_insn_and_split "*llgt_sidi_split"
[(set (match_operand:DI 0 "register_operand" "=d")
(and:DI (subreg:DI (match_operand:SI 1 "memory_operand" "m") 0)
(const_int 2147483647)))
(clobber (reg:CC 33))]
"TARGET_64BIT"
"#"
"&& reload_completed"
[(set (match_dup 0)
(and:DI (subreg:DI (match_dup 1) 0)
(const_int 2147483647)))]
"")
;
; zero_extendqidi2 instruction pattern(s)
;