From 288f605f2cb6bc29c1892ea1e15d0e196e7e059e Mon Sep 17 00:00:00 2001 From: Julian Brown Date: Thu, 2 Jun 2011 20:16:09 +0000 Subject: [PATCH] arm-cores.def (cortex-a5): Use cortex_a5 tuning. gcc/ * config/arm/arm-cores.def (cortex-a5): Use cortex_a5 tuning. * config/arm/arm.c (arm_cortex_a5_branch_cost): New. (arm_cortex_a5_tune): New. From-SVN: r174579 --- gcc/ChangeLog | 6 ++++++ gcc/config/arm/arm-cores.def | 2 +- gcc/config/arm/arm.c | 17 +++++++++++++++++ 3 files changed, 24 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 37ca621949a..109f8295acc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-06-02 Julian Brown + + * config/arm/arm-cores.def (cortex-a5): Use cortex_a5 tuning. + * config/arm/arm.c (arm_cortex_a5_branch_cost): New. + (arm_cortex_a5_tune): New. + 2011-06-02 Julian Brown * config/arm/arm-protos.h (tune_params): Add branch_cost hook. diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index 76acc69037f..afac688eb15 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -124,7 +124,7 @@ ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e) ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e) ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2) ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2) -ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex) +ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5) ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex) ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9) ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 9519e0196e2..57c523840f2 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -256,6 +256,7 @@ static void arm_conditional_register_usage (void); static reg_class_t arm_preferred_rename_class (reg_class_t rclass); static unsigned int arm_autovectorize_vector_sizes (void); static int arm_default_branch_cost (bool, bool); +static int arm_cortex_a5_branch_cost (bool, bool); /* Table of machine attributes. */ @@ -914,6 +915,16 @@ const struct tune_params arm_cortex_tune = arm_default_branch_cost }; +const struct tune_params arm_cortex_a5_tune = +{ + arm_9e_rtx_costs, + NULL, + 1, /* Constant limit. */ + ARM_PREFETCH_NOT_BENEFICIAL, + false, /* Prefer constant pool. */ + arm_cortex_a5_branch_cost +}; + const struct tune_params arm_cortex_a9_tune = { arm_9e_rtx_costs, @@ -8054,6 +8065,12 @@ arm_default_branch_cost (bool speed_p, bool predictable_p ATTRIBUTE_UNUSED) return (optimize > 0) ? 2 : 0; } +static int +arm_cortex_a5_branch_cost (bool speed_p, bool predictable_p) +{ + return speed_p ? 0 : arm_default_branch_cost (speed_p, predictable_p); +} + static int fp_consts_inited = 0; /* Only zero is valid for VFP. Other values are also valid for FPA. */