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frv.c (frv_issue_rate): New function. 

* config/frv/frv.c (frv_issue_rate): New function.
	(frv_pack_insns): Use it.
	(TARGET_SCHED_ISSUE_RATE): Define.

From-SVN: r72026
This commit is contained in:
Richard Sandiford 2003-10-02 12:26:39 +00:00 committed by Richard Sandiford
parent be4cee6820
commit 28a6085042
2 changed files with 39 additions and 15 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2003-10-02 Richard Sandiford <rsandifo@redhat.com>
* config/frv/frv.c (frv_issue_rate): New function.
(frv_pack_insns): Use it.
(TARGET_SCHED_ISSUE_RATE): Define.
2003-10-02 Steven Bosscher <s.bosscher@student.tudelft.nl>
* config/mcore/mcore.c: Convert to ISO C90 function declarations

48
gcc/config/frv/frv.c
View File

@ -272,6 +272,7 @@ static int frv_registers_used_p PARAMS ((rtx, unsigned char [],
int));
static int frv_registers_set_p PARAMS ((rtx, unsigned char [],
int));
static int frv_issue_rate PARAMS ((void));
static int frv_use_dfa_pipeline_interface PARAMS ((void));
static void frv_pack_insns PARAMS ((void));
static void frv_function_prologue PARAMS ((FILE *, HOST_WIDE_INT));
@ -314,6 +315,8 @@ static void frv_asm_out_destructor PARAMS ((rtx, int));
#undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
#define TARGET_ASM_CAN_OUTPUT_MI_THUNK default_can_output_mi_thunk_no_vcall
#undef TARGET_SCHED_ISSUE_RATE
#define TARGET_SCHED_ISSUE_RATE frv_issue_rate
#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE frv_use_dfa_pipeline_interface
@ -8195,6 +8198,32 @@ frv_init_machine_status ()
return ggc_alloc_cleared (sizeof (struct machine_function));
}
/* Implement TARGET_SCHED_ISSUE_RATE. */
static int
frv_issue_rate (void)
{
if (!TARGET_PACK)
return 1;
switch (frv_cpu_type)
{
default:
case FRV_CPU_FR300:
case FRV_CPU_SIMPLE:
return 1;
case FRV_CPU_FR400:
return 2;
case FRV_CPU_GENERIC:
case FRV_CPU_FR500:
case FRV_CPU_TOMCAT:
return 4;
}
}
/* Implement TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE. */
static int
@ -8645,23 +8674,12 @@ frv_pack_insns ()
unsigned char reg_state[FIRST_PSEUDO_REGISTER];
/* If we weren't going to pack the insns, don't bother with this pass. */
if (!optimize || !flag_schedule_insns_after_reload || TARGET_NO_VLIW_BRANCH)
if (!optimize
|| !flag_schedule_insns_after_reload
|| TARGET_NO_VLIW_BRANCH
|| frv_issue_rate () == 1)
return;
switch (frv_cpu_type)
{
default:
case FRV_CPU_FR300: /* FR300/simple are single issue */
case FRV_CPU_SIMPLE:
return;
case FRV_CPU_GENERIC: /* FR-V and FR500 are multi-issue */
case FRV_CPU_FR400:
case FRV_CPU_FR500:
case FRV_CPU_TOMCAT:
break;
}
/* Set up the instruction and register states. */
dfa_start ();
frv_state = (state_t) xmalloc (state_size ());