Enable non-const v64qi permutations.
gcc/ * config/i386/i386.c (ix86_expand_vec_perm_vpermi2): Handle v64qi. * config/i386/sse.md (VEC_PERM_AVX2): Add v64qi. From-SVN: r218483
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@ -1,3 +1,8 @@
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2014-12-08 Ilya Tocar <ilya.tocar@intel.com>
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* config/i386/i386.c (ix86_expand_vec_perm_vpermi2): Handle v64qi.
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* config/i386/sse.md (VEC_PERM_AVX2): Add v64qi.
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2014-12-08 Ilya Tocar <ilya.tocar@intel.com>
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* config/i386/i386.c (expand_vec_perm_broadcast_1): Handle v64qi.
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@ -21835,6 +21835,10 @@ ix86_expand_vec_perm_vpermi2 (rtx target, rtx op0, rtx mask, rtx op1,
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if (TARGET_AVX512VL && TARGET_AVX512BW)
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gen = gen_avx512vl_vpermi2varv16hi3;
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break;
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case V64QImode:
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if (TARGET_AVX512VBMI)
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gen = gen_avx512bw_vpermi2varv64qi3;
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break;
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case V32HImode:
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if (TARGET_AVX512BW)
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gen = gen_avx512bw_vpermi2varv32hi3;
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@ -10691,7 +10691,7 @@
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(V8SF "TARGET_AVX2") (V4DF "TARGET_AVX2")
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(V16SF "TARGET_AVX512F") (V8DF "TARGET_AVX512F")
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(V16SI "TARGET_AVX512F") (V8DI "TARGET_AVX512F")
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(V32HI "TARGET_AVX512BW")])
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(V32HI "TARGET_AVX512BW") (V64QI "TARGET_AVX512VBMI")])
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(define_expand "vec_perm<mode>"
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[(match_operand:VEC_PERM_AVX2 0 "register_operand")
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