arm.md (type): Add ffmas and ffmad to "type" attribute.
2013-01-29 Greta Yorsh <Greta.Yorsh@arm.com> * config/arm/arm.md (type): Add ffmas and ffmad to "type" attribute. * config/arm/vfp.md (fma,fmsub,fnmsub,fnmadd): Change type from fmac to ffma. * config/arm/vfp11.md (vfp_farith): Use ffmas. (vfp_fmul): Use ffmad. * config/arm/cortex-r4f.md (cortex_r4_fmacs): Use ffmas. (cortex_r4_fmacd): Use ffmad. * config/arm/cortex-m4-fpu.md (cortex_m4_fmacs): Use ffmas. * config/arm/cortex-a9.md (cortex_a9_fmacs): Use ffmas. (cortex_a9_fmacd): Use ffmad. * config/arm/cortex-a8-neon.md (cortex_a8_vfp_macs): Use ffmas. (cortex_a8_vfp_macd): Use ffmad. * config/arm/cortex-a5.md (cortex_a5_fpmacs): Use ffmas. (cortex_a5_fpmacd): Use ffmad. * config/arm/cortex-a15-neon.md (cortex_a15_vfp_macs) Use ffmas. (cortex_a15_vfp_macd): Use ffmad. * config/arm/arm1020e.md (v10_fmul): Use ffmas and ffmad. From-SVN: r195551
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@ -1,3 +1,23 @@
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2013-01-29 Greta Yorsh <Greta.Yorsh@arm.com>
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* config/arm/arm.md (type): Add ffmas and ffmad to "type" attribute.
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* config/arm/vfp.md (fma,fmsub,fnmsub,fnmadd): Change type
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from fmac to ffma.
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* config/arm/vfp11.md (vfp_farith): Use ffmas.
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(vfp_fmul): Use ffmad.
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* config/arm/cortex-r4f.md (cortex_r4_fmacs): Use ffmas.
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(cortex_r4_fmacd): Use ffmad.
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* config/arm/cortex-m4-fpu.md (cortex_m4_fmacs): Use ffmas.
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* config/arm/cortex-a9.md (cortex_a9_fmacs): Use ffmas.
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(cortex_a9_fmacd): Use ffmad.
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* config/arm/cortex-a8-neon.md (cortex_a8_vfp_macs): Use ffmas.
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(cortex_a8_vfp_macd): Use ffmad.
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* config/arm/cortex-a5.md (cortex_a5_fpmacs): Use ffmas.
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(cortex_a5_fpmacd): Use ffmad.
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* config/arm/cortex-a15-neon.md (cortex_a15_vfp_macs) Use ffmas.
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(cortex_a15_vfp_macd): Use ffmad.
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* config/arm/arm1020e.md (v10_fmul): Use ffmas and ffmad.
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2013-01-29 Jason Merrill <jason@redhat.com>
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PR libstdc++/54314
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@ -282,6 +282,8 @@
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fmuld,\
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fmacs,\
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fmacd,\
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ffmas,\
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ffmad,\
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f_rints,\
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f_rintd,\
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f_minmaxs,\
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@ -284,7 +284,7 @@
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(define_insn_reservation "v10_fmul" 6
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(and (eq_attr "vfp10" "yes")
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(eq_attr "type" "fmuls,fmacs,fmuld,fmacd"))
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(eq_attr "type" "fmuls,fmacs,ffmas,fmuld,fmacd,ffmad"))
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"1020a_e+v10_fmac*2")
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(define_insn_reservation "v10_fdivs" 18
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@ -505,12 +505,12 @@
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(define_insn_reservation "cortex_a15_vfp_macs" 6
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(and (eq_attr "tune" "cortexa15")
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(eq_attr "type" "fmacs"))
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(eq_attr "type" "fmacs,ffmas"))
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"ca15_issue1,ca15_cx_vfp")
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(define_insn_reservation "cortex_a15_vfp_macd" 11
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(and (eq_attr "tune" "cortexa15")
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(eq_attr "type" "fmacd"))
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(eq_attr "type" "fmacd,ffmad"))
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"ca15_issue2,ca15_cx_vfp*2")
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(define_insn_reservation "cortex_a15_vfp_cvt" 6
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@ -185,7 +185,7 @@
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(define_insn_reservation "cortex_a5_fpmacs" 8
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(and (eq_attr "tune" "cortexa5")
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(eq_attr "type" "fmacs"))
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(eq_attr "type" "fmacs,ffmas"))
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"cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
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;; Non-multiply instructions can issue in the middle two instructions of a
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@ -201,7 +201,7 @@
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(define_insn_reservation "cortex_a5_fpmacd" 11
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(and (eq_attr "tune" "cortexa5")
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(eq_attr "type" "fmacd"))
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(eq_attr "type" "fmacd,ffmad"))
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"cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\
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cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
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@ -149,12 +149,12 @@
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(define_insn_reservation "cortex_a8_vfp_macs" 21
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(and (eq_attr "tune" "cortexa8")
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(eq_attr "type" "fmacs"))
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(eq_attr "type" "fmacs,ffmas"))
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"cortex_a8_vfp,cortex_a8_vfplite*20")
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(define_insn_reservation "cortex_a8_vfp_macd" 26
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(and (eq_attr "tune" "cortexa8")
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(eq_attr "type" "fmacd"))
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(eq_attr "type" "fmacd,ffmad"))
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"cortex_a8_vfp,cortex_a8_vfplite*25")
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(define_insn_reservation "cortex_a8_vfp_divs" 37
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@ -203,7 +203,7 @@ cortex_a9_store3_4, cortex_a9_store1_2, cortex_a9_load3_4")
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;; Pipeline Instruction Classification.
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;; FPS - fcpys, ffariths, ffarithd,r_2_f,f_2_r
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;; FP_ADD - fadds, faddd, fcmps (1)
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;; FPMUL - fmul{s,d}, fmac{s,d}
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;; FPMUL - fmul{s,d}, fmac{s,d}, ffma{s,d}
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;; FPDIV - fdiv{s,d}
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(define_cpu_unit "ca9fps" "cortex_a9")
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(define_cpu_unit "ca9fp_add1, ca9fp_add2, ca9fp_add3, ca9fp_add4" "cortex_a9")
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@ -253,12 +253,12 @@ cortex_a9_store3_4, cortex_a9_store1_2, cortex_a9_load3_4")
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(define_insn_reservation "cortex_a9_fmacs" 8
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(and (eq_attr "tune" "cortexa9")
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(eq_attr "type" "fmacs"))
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(eq_attr "type" "fmacs,ffmas"))
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"ca9fmuls, ca9fp_add")
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(define_insn_reservation "cortex_a9_fmacd" 9
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(and (eq_attr "tune" "cortexa9")
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(eq_attr "type" "fmacd"))
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(eq_attr "type" "fmacd,ffmad"))
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"ca9fmuld, ca9fp_add")
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;; Division pipeline description.
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@ -46,7 +46,7 @@
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(define_insn_reservation "cortex_m4_fmacs" 4
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(and (eq_attr "tune" "cortexm4")
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(eq_attr "type" "fmacs"))
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(eq_attr "type" "fmacs,ffmas"))
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"cortex_m4_ex_v*3")
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(define_insn_reservation "cortex_m4_ffariths" 1
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@ -63,7 +63,7 @@
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(define_insn_reservation "cortex_r4_fmacs" 6
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(and (eq_attr "tune_cortexr4" "yes")
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(eq_attr "type" "fmacs"))
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(eq_attr "type" "fmacs,ffmas"))
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"(cortex_r4_issue_a+cortex_r4_v1)|(cortex_r4_issue_b+cortex_r4_vmla)")
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(define_insn_reservation "cortex_r4_fdivs" 17
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@ -119,7 +119,7 @@
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(define_insn_reservation "cortex_r4_fmacd" 20
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(and (eq_attr "tune_cortexr4" "yes")
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(eq_attr "type" "fmacd"))
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(eq_attr "type" "fmacd,ffmad"))
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"cortex_r4_single_issue*13")
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(define_insn_reservation "cortex_r4_farith" 10
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@ -32,6 +32,8 @@
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;; fmuld Double precision multiply.
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;; fmacs Single precision multiply-accumulate.
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;; fmacd Double precision multiply-accumulate.
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;; ffmas Single precision fused multiply-accumulate.
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;; ffmad Double precision fused multiply-accumulate.
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;; fdivs Single precision sqrt or division.
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;; fdivd Double precision sqrt or division.
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;; f_flag fmstat operation
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@ -909,7 +911,7 @@
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"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
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"vfma%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
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[(set_attr "predicable" "yes")
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(set_attr "type" "fmac<vfp_type>")]
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(set_attr "type" "ffma<vfp_type>")]
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)
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(define_insn "*fmsub<SDF:mode>4"
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@ -921,7 +923,7 @@
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"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
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"vfms%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
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[(set_attr "predicable" "yes")
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(set_attr "type" "fmac<vfp_type>")]
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(set_attr "type" "ffma<vfp_type>")]
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)
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(define_insn "*fnmsub<SDF:mode>4"
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@ -932,7 +934,7 @@
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"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
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"vfnms%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
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[(set_attr "predicable" "yes")
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(set_attr "type" "fmac<vfp_type>")]
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(set_attr "type" "ffma<vfp_type>")]
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)
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(define_insn "*fnmadd<SDF:mode>4"
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@ -944,7 +946,7 @@
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"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_FMA"
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"vfnma%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
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[(set_attr "predicable" "yes")
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(set_attr "type" "fmac<vfp_type>")]
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(set_attr "type" "ffma<vfp_type>")]
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)
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@ -56,12 +56,12 @@
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(define_insn_reservation "vfp_farith" 8
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(and (eq_attr "generic_vfp" "yes")
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(eq_attr "type" "fadds,faddd,fconsts,fconstd,f_cvt,fmuls,fmacs"))
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(eq_attr "type" "fadds,faddd,fconsts,fconstd,f_cvt,fmuls,fmacs,ffmas"))
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"fmac")
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(define_insn_reservation "vfp_fmul" 9
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(and (eq_attr "generic_vfp" "yes")
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(eq_attr "type" "fmuld,fmacd"))
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(eq_attr "type" "fmuld,fmacd,ffmad"))
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"fmac*2")
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(define_insn_reservation "vfp_fdivs" 19
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