Fix clearing ZERO_REG
Fix clearing ZERO_REG * config/avr/avr.md (cc): Add alternative "ldi". (movqi_insn): Use it in cc attribute. * config/avr/avr.c (notice_update_cc): Handle CC_LDI. (output_reload_in_const): Use CLR to move 0 to ZERO_REG. (output_reload_insisf): Use ZERO_REG to pre-clear register. From-SVN: r182871
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@ -1,3 +1,12 @@
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2012-01-04 Georg-Johann Lay <avr@gjlay.de>
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Fix clearing ZERO_REG
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* config/avr/avr.md (cc): Add alternative "ldi".
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(movqi_insn): Use it in cc attribute.
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* config/avr/avr.c (notice_update_cc): Handle CC_LDI.
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(output_reload_in_const): Use CLR to move 0 to ZERO_REG.
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(output_reload_insisf): Use ZERO_REG to pre-clear register.
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2012-01-04 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
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* configure: Regenerate.
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@ -1994,6 +1994,7 @@ notice_update_cc (rtx body ATTRIBUTE_UNUSED, rtx insn)
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case CC_OUT_PLUS:
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case CC_OUT_PLUS_NOCLOBBER:
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case CC_LDI:
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{
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rtx *op = recog_data.operand;
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int len_dummy, icc;
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@ -2001,16 +2002,36 @@ notice_update_cc (rtx body ATTRIBUTE_UNUSED, rtx insn)
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/* Extract insn's operands. */
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extract_constrain_insn_cached (insn);
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if (CC_OUT_PLUS == cc)
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avr_out_plus (op, &len_dummy, &icc);
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else
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avr_out_plus_noclobber (op, &len_dummy, &icc);
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cc = (enum attr_cc) icc;
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switch (cc)
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{
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default:
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gcc_unreachable();
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case CC_OUT_PLUS:
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avr_out_plus (op, &len_dummy, &icc);
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cc = (enum attr_cc) icc;
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break;
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case CC_OUT_PLUS_NOCLOBBER:
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avr_out_plus_noclobber (op, &len_dummy, &icc);
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cc = (enum attr_cc) icc;
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break;
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case CC_LDI:
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cc = (op[1] == CONST0_RTX (GET_MODE (op[0]))
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&& reg_overlap_mentioned_p (op[0], zero_reg_rtx))
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/* Loading zero-reg with 0 uses CLI and thus clobbers cc0. */
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? CC_CLOBBER
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/* Any other "r,rL" combination does not alter cc0. */
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: CC_NONE;
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break;
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} /* inner switch */
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break;
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}
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}
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} /* outer swicth */
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switch (cc)
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{
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@ -8945,9 +8966,9 @@ avr_regno_mode_code_ok_for_base_p (int regno,
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The effect on cc0 is as follows:
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Load 0 to any register : NONE
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Load ld register with any value : NONE
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Anything else: : CLOBBER */
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Load 0 to any register except ZERO_REG : NONE
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Load ld register with any value : NONE
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Anything else: : CLOBBER */
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static void
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output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
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@ -9062,7 +9083,9 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p)
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if (ival[n] == 0)
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{
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if (!clear_p)
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avr_asm_len (ldreg_p ? "ldi %0,0" : "mov %0,__zero_reg__",
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avr_asm_len (ldreg_p ? "ldi %0,0"
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: ZERO_REGNO == REGNO (xdest[n]) ? "clr %0"
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: "mov %0,__zero_reg__",
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&xdest[n], len, 1);
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continue;
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}
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@ -9224,8 +9247,8 @@ output_reload_insisf (rtx *op, rtx clobber_reg, int *len)
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{
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/* Default needs 4 CLR instructions: clear register beforehand. */
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avr_asm_len ("clr %A0" CR_TAB
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"clr %B0" CR_TAB
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avr_asm_len ("mov %A0,__zero_reg__" CR_TAB
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"mov %B0,__zero_reg__" CR_TAB
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"movw %C0,%A0", &op[0], len, 3);
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output_reload_in_const (op, clobber_reg, len, true);
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@ -95,7 +95,7 @@
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;; Condition code settings.
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(define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber,
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out_plus, out_plus_noclobber"
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out_plus, out_plus_noclobber,ldi"
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(const_string "none"))
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(define_attr "type" "branch,branch1,arith,xcall"
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@ -584,7 +584,7 @@
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}
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[(set_attr "length" "1,1,5,5,1,1,4")
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(set_attr "adjust_len" "mov8")
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(set_attr "cc" "none,none,clobber,clobber,none,none,clobber")])
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(set_attr "cc" "ldi,none,clobber,clobber,none,none,clobber")])
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;; This is used in peephole2 to optimize loading immediate constants
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;; if a scratch register from LD_REGS happens to be available.
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