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[ARC] Fix arcset* pattern's predicate. 

gcc/
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/arc/arc.md (cstoresi4): Force operand into register.
        (arcset<code>): Fix predicate.
        (arcsetltu): Likewise.
        (arcsetgeu): Likewise.
        (arcsethi): Likewise.
        (arcsetls): Likewise.

From-SVN: r232834
This commit is contained in:
Claudiu Zissulescu 2016-01-26 17:06:16 +01:00 committed by Claudiu Zissulescu
parent 13f92e8df5
commit 2a42e3390f
2 changed files with 20 additions and 7 deletions
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9
gcc/ChangeLog
View File

@ -1,3 +1,12 @@
2016-01-26 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (cstoresi4): Force operand into register.
(arcset<code>): Fix predicate.
(arcsetltu): Likewise.
(arcsetgeu): Likewise.
(arcsethi): Likewise.
(arcsetls): Likewise.
2016-01-26 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/69483

18
gcc/config/arc/arc.md
View File

@ -3346,8 +3346,9 @@
(define_expand "cstoresi4"
[(set (match_operand:SI 0 "dest_reg_operand" "")
(match_operator:SI 1 "ordered_comparison_operator" [(match_operand:SI 2 "nonmemory_operand" "")
(match_operand:SI 3 "nonmemory_operand" "")]))]
(match_operator:SI 1 "ordered_comparison_operator"
[(match_operand:SI 2 "nonmemory_operand" "")
(match_operand:SI 3 "nonmemory_operand" "")]))]
""
{
if (!TARGET_CODE_DENSITY)
@ -3358,6 +3359,9 @@
emit_insn (gen_scc_insn (operands[0], operands[1]));
DONE;
}
if (!register_operand (operands[2], SImode))
operands[2] = force_reg (SImode, operands[2]);
})
(define_mode_iterator SDF [SF DF])
@ -5414,7 +5418,7 @@
(define_insn "arcset<code>"
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r,r,r")
(arcCC_cond:SI (match_operand:SI 1 "nonmemory_operand" "0,r,0,r,0,0,r")
(arcCC_cond:SI (match_operand:SI 1 "register_operand" "0,r,0,r,0,0,r")
(match_operand:SI 2 "nonmemory_operand" "r,r,L,L,I,n,n")))]
"TARGET_V2 && TARGET_CODE_DENSITY"
"set<code>%? %0, %1, %2"
@ -5427,7 +5431,7 @@
(define_insn "arcsetltu"
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r, r, r")
(ltu:SI (match_operand:SI 1 "nonmemory_operand" "0,r,0,r,0, 0, r")
(ltu:SI (match_operand:SI 1 "register_operand" "0,r,0,r,0, 0, r")
(match_operand:SI 2 "nonmemory_operand" "r,r,L,L,I, n, n")))]
"TARGET_V2 && TARGET_CODE_DENSITY"
"setlo%? %0, %1, %2"
@ -5440,7 +5444,7 @@
(define_insn "arcsetgeu"
[(set (match_operand:SI 0 "register_operand" "=r,r,r,r,r, r, r")
(geu:SI (match_operand:SI 1 "nonmemory_operand" "0,r,0,r,0, 0, r")
(geu:SI (match_operand:SI 1 "register_operand" "0,r,0,r,0, 0, r")
(match_operand:SI 2 "nonmemory_operand" "r,r,L,L,I, n, n")))]
"TARGET_V2 && TARGET_CODE_DENSITY"
"seths%? %0, %1, %2"
@ -5454,7 +5458,7 @@
;; Special cases of SETCC
(define_insn_and_split "arcsethi"
[(set (match_operand:SI 0 "register_operand" "=r,r, r,r")
(gtu:SI (match_operand:SI 1 "nonmemory_operand" "r,r, r,r")
(gtu:SI (match_operand:SI 1 "register_operand" "r,r, r,r")
(match_operand:SI 2 "nonmemory_operand" "0,r,C62,n")))]
"TARGET_V2 && TARGET_CODE_DENSITY"
"setlo%? %0, %2, %1"
@ -5477,7 +5481,7 @@
(define_insn_and_split "arcsetls"
[(set (match_operand:SI 0 "register_operand" "=r,r, r,r")
(leu:SI (match_operand:SI 1 "nonmemory_operand" "r,r, r,r")
(leu:SI (match_operand:SI 1 "register_operand" "r,r, r,r")
(match_operand:SI 2 "nonmemory_operand" "0,r,C62,n")))]
"TARGET_V2 && TARGET_CODE_DENSITY"
"seths%? %0, %2, %1"