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config/sh/sh.h (TARGET_SWITCHES): Add no-renesas to select the GCC ABI.

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doc/invoke.texi: Document this new switch and also the -mrenesas switch.

From-SVN: r85557
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Nick Clifton 2004-08-04 13:54:51 +00:00 committed by Nick Clifton
parent d09212551a
commit 2acc29bdd3
3 changed files with 19 additions and 1 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2004-08-04 Nick Clifton <nickc@redhat.com>
* config/sh/sh.h (TARGET_SWITCHES): Add no-renesas to select the
GCC ABI.
* doc/invoke.texi: Document this new switch and also the -mrenesas
switch.
2004-08-04 Nathan Sidwell <nathan@codesourcery.com> 2004-08-04 Nathan Sidwell <nathan@codesourcery.com>
* cfglayout.c (insn_locators_initialize): Update the current * cfglayout.c (insn_locators_initialize): Update the current

1
gcc/config/sh/sh.h
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@ -561,6 +561,7 @@ extern int target_flags;
{"fmovd", FMOVD_BIT, "" }, \ {"fmovd", FMOVD_BIT, "" }, \
{"hitachi", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \ {"hitachi", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \
{"renesas", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \ {"renesas", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \
{"no-renesas",-HITACHI_BIT,"Follow the GCC calling conventions" }, \
{"nomacsave", NOMACSAVE_BIT, "Mark MAC register as call-clobbered" }, \ {"nomacsave", NOMACSAVE_BIT, "Mark MAC register as call-clobbered" }, \
{"ieee", IEEE_BIT, "Increase the IEEE compliance for floating-point code" }, \ {"ieee", IEEE_BIT, "Increase the IEEE compliance for floating-point code" }, \
{"isize", ISIZE_BIT, "" }, \ {"isize", ISIZE_BIT, "" }, \

12
gcc/doc/invoke.texi
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@ -626,7 +626,7 @@ See RS/6000 and PowerPC Options.
-m5-32media -m5-32media-nofpu @gol -m5-32media -m5-32media-nofpu @gol
-m5-compact -m5-compact-nofpu @gol -m5-compact -m5-compact-nofpu @gol
-mb -ml -mdalign -mrelax @gol -mb -ml -mdalign -mrelax @gol
-mbigtable -mfmovd -mhitachi -mnomacsave @gol -mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
-mieee -misize -mpadstruct -mspace @gol -mieee -misize -mpadstruct -mspace @gol
-mprefergot -musermode} -mprefergot -musermode}
@ -10585,6 +10585,16 @@ Enable the use of the instruction @code{fmovd}.
@opindex mhitachi @opindex mhitachi
Comply with the calling conventions defined by Renesas. Comply with the calling conventions defined by Renesas.
@item -mrenesas
@opindex mhitachi
Comply with the calling conventions defined by Renesas.
@item -mno-renesas
@opindex mhitachi
Comply with the calling conventions defined for GCC before the Renesas
conventions were available. This option is the default for all
targets of the SH toolchain except for @samp{sh-symbianelf}.
@item -mnomacsave @item -mnomacsave
@opindex mnomacsave @opindex mnomacsave
Mark the @code{MAC} register as call-clobbered, even if Mark the @code{MAC} register as call-clobbered, even if