(remap_split_bivs): New function.
(unroll_loop): When remapping split bivs in the last instruction, handle JUMP_INSNs in addition to INSNs. From-SVN: r7186
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92
gcc/unroll.c
92
gcc/unroll.c
@ -201,6 +201,7 @@ static rtx approx_final_value ();
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static int find_splittable_regs ();
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static int find_splittable_givs ();
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static rtx fold_rtx_mult_add ();
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static rtx remap_split_bivs ();
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/* Try to unroll one loop and split induction variables in the loop.
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@ -1032,47 +1033,15 @@ unroll_loop (loop_end, insn_count, loop_start, end_insert_before,
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/* If the loop is being partially unrolled, and the iteration variables
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are being split, and are being renamed for the split, then must fix up
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the compare instruction at the end of the loop to refer to the new
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the compare/jump instruction at the end of the loop to refer to the new
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registers. This compare isn't copied, so the registers used in it
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will never be replaced if it isn't done here. */
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if (unroll_type == UNROLL_MODULO)
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{
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insn = NEXT_INSN (copy_end);
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if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SET)
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{
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#if 0
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/* If non-reduced/final-value givs were split, then this would also
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have to remap those givs. */
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#endif
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tem = SET_SRC (PATTERN (insn));
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/* The set source is a register. */
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if (GET_CODE (tem) == REG)
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{
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if (REGNO (tem) < max_reg_before_loop
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&& reg_iv_type[REGNO (tem)] == BASIC_INDUCT)
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SET_SRC (PATTERN (insn))
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= reg_biv_class[REGNO (tem)]->biv->src_reg;
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}
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else
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{
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/* The set source is a compare of some sort. */
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tem = XEXP (SET_SRC (PATTERN (insn)), 0);
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if (GET_CODE (tem) == REG
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&& REGNO (tem) < max_reg_before_loop
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&& reg_iv_type[REGNO (tem)] == BASIC_INDUCT)
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XEXP (SET_SRC (PATTERN (insn)), 0)
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= reg_biv_class[REGNO (tem)]->biv->src_reg;
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tem = XEXP (SET_SRC (PATTERN (insn)), 1);
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if (GET_CODE (tem) == REG
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&& REGNO (tem) < max_reg_before_loop
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&& reg_iv_type[REGNO (tem)] == BASIC_INDUCT)
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XEXP (SET_SRC (PATTERN (insn)), 1)
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= reg_biv_class[REGNO (tem)]->biv->src_reg;
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}
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}
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if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
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PATTERN (insn) = remap_split_bivs (PATTERN (insn));
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}
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/* For unroll_number - 1 times, make a copy of each instruction
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@ -3311,3 +3280,56 @@ loop_iterations (loop_start, loop_end)
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return tempu / i + ((tempu % i) != 0);
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}
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/* Replace uses of split bivs with their split psuedo register. This is
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for original instructions which remain after loop unrolling without
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copying. */
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static rtx
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remap_split_bivs (x)
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rtx x;
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{
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register enum rtx_code code;
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register int i;
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register char *fmt;
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if (x == 0)
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return x;
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code = GET_CODE (x);
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switch (code)
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{
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case SCRATCH:
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case PC:
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case CC0:
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case CONST_INT:
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case CONST_DOUBLE:
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case CONST:
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case SYMBOL_REF:
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case LABEL_REF:
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return x;
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case REG:
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#if 0
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/* If non-reduced/final-value givs were split, then this would also
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have to remap those givs also. */
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#endif
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if (REGNO (x) < max_reg_before_loop
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&& reg_iv_type[REGNO (x)] == BASIC_INDUCT)
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return reg_biv_class[REGNO (x)]->biv->src_reg;
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}
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fmt = GET_RTX_FORMAT (code);
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for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
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{
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if (fmt[i] == 'e')
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XEXP (x, i) = remap_split_bivs (XEXP (x, i));
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if (fmt[i] == 'E')
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{
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register int j;
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for (j = 0; j < XVECLEN (x, i); j++)
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XVECEXP (x, i, j) = remap_split_bivs (XVECEXP (x, i, j));
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}
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}
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return x;
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}
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