2009-08-13 Ghassan Shobaki <ghassan.shobaki@amd.com>
* tree-ssa-loop-prefetch.c (prune_ref_by_group_reuse): Enhance probabilistic analysis for long-stride pruning. (compute_miss_rate): New function to compute the probability that two memory references access different cache lines. From-SVN: r150726
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@ -1,3 +1,11 @@
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2009-08-13 Ghassan Shobaki <ghassan.shobaki@amd.com>
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* tree-ssa-loop-prefetch.c
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(prune_ref_by_group_reuse): Enhance probabilistic analysis
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for long-stride pruning.
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(compute_miss_rate): New function to compute the probability
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that two memory references access different cache lines.
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2009-08-13 Dave Korn <dave.korn.cygwin@gmail.com>
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* gcc/config/i386/cygwin.h (LINK_SPEC): Add --enable-auto-image-base.
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@ -593,6 +593,45 @@ ddown (HOST_WIDE_INT x, unsigned HOST_WIDE_INT by)
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return (x + by - 1) / by;
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}
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/* Given a CACHE_LINE_SIZE and two inductive memory references
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with a common STEP greater than CACHE_LINE_SIZE and an address
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difference DELTA, compute the probability that they will fall
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in different cache lines. DISTINCT_ITERS is the number of
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distinct iterations after which the pattern repeats itself.
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ALIGN_UNIT is the unit of alignment in bytes. */
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static int
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compute_miss_rate (unsigned HOST_WIDE_INT cache_line_size,
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HOST_WIDE_INT step, HOST_WIDE_INT delta,
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unsigned HOST_WIDE_INT distinct_iters,
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int align_unit)
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{
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unsigned align, iter;
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int total_positions, miss_positions, miss_rate;
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int address1, address2, cache_line1, cache_line2;
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total_positions = 0;
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miss_positions = 0;
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/* Iterate through all possible alignments of the first
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memory reference within its cache line. */
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for (align = 0; align < cache_line_size; align += align_unit)
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/* Iterate through all distinct iterations. */
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for (iter = 0; iter < distinct_iters; iter++)
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{
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address1 = align + step * iter;
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address2 = address1 + delta;
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cache_line1 = address1 / cache_line_size;
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cache_line2 = address2 / cache_line_size;
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total_positions += 1;
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if (cache_line1 != cache_line2)
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miss_positions += 1;
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}
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miss_rate = 1000 * miss_positions / total_positions;
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return miss_rate;
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}
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/* Prune the prefetch candidate REF using the reuse with BY.
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If BY_IS_BEFORE is true, BY is before REF in the loop. */
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@ -606,6 +645,11 @@ prune_ref_by_group_reuse (struct mem_ref *ref, struct mem_ref *by,
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HOST_WIDE_INT delta = delta_b - delta_r;
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HOST_WIDE_INT hit_from;
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unsigned HOST_WIDE_INT prefetch_before, prefetch_block;
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int miss_rate;
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HOST_WIDE_INT reduced_step;
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unsigned HOST_WIDE_INT reduced_prefetch_block;
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tree ref_type;
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int align_unit;
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if (delta == 0)
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{
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@ -667,25 +711,29 @@ prune_ref_by_group_reuse (struct mem_ref *ref, struct mem_ref *by,
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return;
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}
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/* A more complicated case. First let us ensure that size of cache line
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and step are coprime (here we assume that PREFETCH_BLOCK is a power
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of two. */
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/* A more complicated case with step > prefetch_block. First reduce
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the ratio between the step and the cache line size to its simplest
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terms. The resulting denominator will then represent the number of
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distinct iterations after which each address will go back to its
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initial location within the cache line. This computation assumes
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that PREFETCH_BLOCK is a power of two. */
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prefetch_block = PREFETCH_BLOCK;
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while ((step & 1) == 0
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&& prefetch_block > 1)
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reduced_prefetch_block = prefetch_block;
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reduced_step = step;
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while ((reduced_step & 1) == 0
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&& reduced_prefetch_block > 1)
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{
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step >>= 1;
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prefetch_block >>= 1;
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delta >>= 1;
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reduced_step >>= 1;
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reduced_prefetch_block >>= 1;
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}
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/* Now step > prefetch_block, and step and prefetch_block are coprime.
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Determine the probability that the accesses hit the same cache line. */
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prefetch_before = delta / step;
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delta %= step;
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if ((unsigned HOST_WIDE_INT) delta
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<= (prefetch_block * ACCEPTABLE_MISS_RATE / 1000))
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ref_type = TREE_TYPE (ref->mem);
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align_unit = TYPE_ALIGN (ref_type) / 8;
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miss_rate = compute_miss_rate(prefetch_block, step, delta,
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reduced_prefetch_block, align_unit);
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if (miss_rate <= ACCEPTABLE_MISS_RATE)
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{
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if (prefetch_before < ref->prefetch_before)
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ref->prefetch_before = prefetch_before;
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@ -696,8 +744,9 @@ prune_ref_by_group_reuse (struct mem_ref *ref, struct mem_ref *by,
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/* Try also the following iteration. */
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prefetch_before++;
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delta = step - delta;
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if ((unsigned HOST_WIDE_INT) delta
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<= (prefetch_block * ACCEPTABLE_MISS_RATE / 1000))
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miss_rate = compute_miss_rate(prefetch_block, step, delta,
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reduced_prefetch_block, align_unit);
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if (miss_rate <= ACCEPTABLE_MISS_RATE)
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{
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if (prefetch_before < ref->prefetch_before)
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ref->prefetch_before = prefetch_before;
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