rs6000.md (*boolcsi3_internal1, [...]): Delete.
2014-08-17 Segher Boessenkool <segher@kernel.crashing.org> * config/rs6000/rs6000.md (*boolcsi3_internal1, *boolcsi3_internal2 and split, *boolcsi3_internal3 and split): Delete. (*boolcdi3_internal1, *boolcdi3_internal2 and split, *boolcdi3_internal3 and split): Delete. (*boolc<mode>3, *boolc<mode>3_dot, *boolc<mode>3_dot2): New. From-SVN: r214078
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@ -1,3 +1,11 @@
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2014-08-17 Segher Boessenkool <segher@kernel.crashing.org>
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* config/rs6000/rs6000.md (*boolcsi3_internal1, *boolcsi3_internal2
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and split, *boolcsi3_internal3 and split): Delete.
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(*boolcdi3_internal1, *boolcdi3_internal2 and split,
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*boolcdi3_internal3 and split): Delete.
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(*boolc<mode>3, *boolc<mode>3_dot, *boolc<mode>3_dot2): New.
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2014-08-17 Segher Boessenkool <segher@kernel.crashing.org>
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* config/rs6000/rs6000.c (print_operand) <'e'>: New.
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@ -3298,71 +3298,59 @@
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})
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(define_insn "*boolcsi3_internal1"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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(match_operator:SI 3 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
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(match_operand:SI 2 "gpc_reg_operand" "r")]))]
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(define_insn "*boolc<mode>3"
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[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
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(match_operator:GPR 3 "boolean_operator"
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[(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r"))
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(match_operand:GPR 1 "gpc_reg_operand" "r")]))]
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""
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"%q3 %0,%2,%1")
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"%q3 %0,%1,%2"
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[(set_attr "type" "logical")])
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(define_insn "*boolcsi3_internal2"
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[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r,r"))
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(match_operand:SI 2 "gpc_reg_operand" "r,r")])
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(define_insn_and_split "*boolc<mode>3_dot"
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[(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
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(compare:CC (match_operator:GPR 3 "boolean_operator"
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[(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r"))
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(match_operand:GPR 1 "gpc_reg_operand" "r,r")])
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(const_int 0)))
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(clobber (match_scratch:SI 3 "=r,r"))]
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"TARGET_32BIT"
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(clobber (match_scratch:GPR 0 "=r,r"))]
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"<MODE>mode == Pmode && rs6000_gen_cell_microcode"
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"@
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%q4. %3,%2,%1
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%q3. %0,%1,%2
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#"
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[(set_attr "type" "compare")
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
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(match_operand:SI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(clobber (match_scratch:SI 3 ""))]
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"TARGET_32BIT && reload_completed"
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[(set (match_dup 3) (match_dup 4))
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(set (match_dup 0)
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(compare:CC (match_dup 3)
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(const_int 0)))]
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"")
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(define_insn "*boolcsi3_internal3"
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[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r"))
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(match_operand:SI 2 "gpc_reg_operand" "r,r")])
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(const_int 0)))
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(set (match_operand:SI 0 "gpc_reg_operand" "=r,r")
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(match_dup 4))]
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"TARGET_32BIT"
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"@
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%q4. %0,%2,%1
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#"
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[(set_attr "type" "compare")
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")
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(compare:CC (match_operator:SI 4 "boolean_operator"
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[(not:SI (match_operand:SI 1 "gpc_reg_operand" ""))
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(match_operand:SI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(set (match_operand:SI 0 "gpc_reg_operand" "")
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(match_dup 4))]
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"TARGET_32BIT && reload_completed"
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[(set (match_dup 0) (match_dup 4))
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(set (match_dup 3)
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"&& reload_completed && cc_reg_not_cr0_operand (operands[4], CCmode)"
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[(set (match_dup 0)
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(match_dup 3))
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(set (match_dup 4)
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(compare:CC (match_dup 0)
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(const_int 0)))]
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"")
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""
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[(set_attr "type" "logical")
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(set_attr "dot" "yes")
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(set_attr "length" "4,8")])
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(define_insn_and_split "*boolc<mode>3_dot2"
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[(set (match_operand:CC 4 "cc_reg_operand" "=x,?y")
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(compare:CC (match_operator:GPR 3 "boolean_operator"
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[(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r"))
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(match_operand:GPR 1 "gpc_reg_operand" "r,r")])
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(const_int 0)))
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(set (match_operand:GPR 0 "gpc_reg_operand" "=r,r")
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(match_dup 3))]
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"<MODE>mode == Pmode && rs6000_gen_cell_microcode"
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"@
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%q3. %0,%1,%2
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#"
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"&& reload_completed && cc_reg_not_cr0_operand (operands[4], CCmode)"
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[(set (match_dup 0)
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(match_dup 3))
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(set (match_dup 4)
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(compare:CC (match_dup 0)
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(const_int 0)))]
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""
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[(set_attr "type" "logical")
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(set_attr "dot" "yes")
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(set_attr "length" "4,8")])
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(define_insn "*boolccsi3_internal1"
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[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
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@ -7840,74 +7828,6 @@
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build_mask64_2_operands (operands[2], &operands[5]);
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}")
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(define_insn "*boolcdi3_internal1"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(match_operator:DI 3 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
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(match_operand:DI 2 "gpc_reg_operand" "r")]))]
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"TARGET_POWERPC64"
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"%q3 %0,%2,%1")
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(define_insn "*boolcdi3_internal2"
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[(set (match_operand:CC 0 "cc_reg_operand" "=x,?y")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r,r"))
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(match_operand:DI 2 "gpc_reg_operand" "r,r")])
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(const_int 0)))
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(clobber (match_scratch:DI 3 "=r,r"))]
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"TARGET_64BIT"
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"@
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%q4. %3,%2,%1
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#"
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[(set_attr "type" "logical,compare")
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(set_attr "dot" "yes")
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 0 "cc_reg_not_micro_cr0_operand" "")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
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(match_operand:DI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(clobber (match_scratch:DI 3 ""))]
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"TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 3) (match_dup 4))
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(set (match_dup 0)
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(compare:CC (match_dup 3)
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(const_int 0)))]
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"")
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(define_insn "*boolcdi3_internal3"
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[(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" "%r,r"))
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(match_operand:DI 2 "gpc_reg_operand" "r,r")])
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(const_int 0)))
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(set (match_operand:DI 0 "gpc_reg_operand" "=r,r")
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(match_dup 4))]
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"TARGET_64BIT"
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"@
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%q4. %0,%2,%1
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#"
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[(set_attr "type" "logical,compare")
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(set_attr "dot" "yes")
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(set_attr "length" "4,8")])
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(define_split
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[(set (match_operand:CC 3 "cc_reg_not_micro_cr0_operand" "")
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(compare:CC (match_operator:DI 4 "boolean_operator"
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[(not:DI (match_operand:DI 1 "gpc_reg_operand" ""))
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(match_operand:DI 2 "gpc_reg_operand" "")])
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(const_int 0)))
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(set (match_operand:DI 0 "gpc_reg_operand" "")
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(match_dup 4))]
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"TARGET_POWERPC64 && reload_completed"
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[(set (match_dup 0) (match_dup 4))
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(set (match_dup 3)
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(compare:CC (match_dup 0)
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(const_int 0)))]
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"")
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(define_insn "*boolccdi3_internal1"
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[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
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(match_operator:DI 3 "boolean_operator"
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