S/390: Hotpatch: Remove special handling of nested functions.
gcc/ 2015-03-31 Dominik Vogt <vogt@linux.vnet.ibm.com> * config/s390/s390.c (s390_function_num_hotpatch_hw): Allow hotpatching nested functions. (s390_reorg): Adapt to new signature of s390_function_num_hotpatch_hw. (s390_asm_output_function_label): Adapt to new signature of s390_function_num_hotpatch_hw Optimise the code generating assembler output. Add comments to assembler file. gcc/testsuite/ 2015-03-31 Dominik Vogt <vogt@linux.vnet.ibm.com> * gcc.target/s390/hotpatch-25.c: New test. * gcc.target/s390/hotpatch-1.c: Update test. * gcc.target/s390/hotpatch-10.c: Update test. * gcc.target/s390/hotpatch-11.c: Update test. * gcc.target/s390/hotpatch-12.c: Update test. * gcc.target/s390/hotpatch-13.c: Update test. * gcc.target/s390/hotpatch-14.c: Update test. * gcc.target/s390/hotpatch-15.c: Update test. * gcc.target/s390/hotpatch-16.c: Update test. * gcc.target/s390/hotpatch-17.c: Update test. * gcc.target/s390/hotpatch-18.c: Update test. * gcc.target/s390/hotpatch-19.c: Update test. * gcc.target/s390/hotpatch-2.c: Update test. * gcc.target/s390/hotpatch-21.c: Update test. * gcc.target/s390/hotpatch-22.c: Update test. * gcc.target/s390/hotpatch-23.c: Update test. * gcc.target/s390/hotpatch-24.c: Update test. * gcc.target/s390/hotpatch-3.c: Update test. * gcc.target/s390/hotpatch-4.c: Update test. * gcc.target/s390/hotpatch-5.c: Update test. * gcc.target/s390/hotpatch-6.c: Update test. * gcc.target/s390/hotpatch-7.c: Update test. * gcc.target/s390/hotpatch-8.c: Update test. * gcc.target/s390/hotpatch-9.c: Update test. * gcc.target/s390/hotpatch-compile-16.c: Update test. From-SVN: r221794
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@ -1,3 +1,13 @@
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2015-03-31 Dominik Vogt <vogt@linux.vnet.ibm.com>
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* config/s390/s390.c (s390_function_num_hotpatch_hw): Allow hotpatching
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nested functions.
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(s390_reorg): Adapt to new signature of s390_function_num_hotpatch_hw.
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(s390_asm_output_function_label): Adapt to new signature of
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s390_function_num_hotpatch_hw
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Optimise the code generating assembler output.
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Add comments to assembler file.
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2015-03-31 Richard Biener <rguenther@suse.de>
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PR middle-end/65626
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@ -5234,21 +5234,18 @@ print_shift_count_operand (FILE *file, rtx op)
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fprintf (file, "(%s)", reg_names[REGNO (base)]);
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}
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/* Returns false if the function should not be made hotpatchable.
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Otherwise it assigns the number of NOP halfwords to be emitted
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before and after the function label to hw_before and hw_after.
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Both must not be NULL. */
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/* Assigns the number of NOP halfwords to be emitted before and after the
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function label to *HW_BEFORE and *HW_AFTER. Both pointers must not be NULL.
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If hotpatching is disabled for the function, the values are set to zero.
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*/
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static bool
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static void
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s390_function_num_hotpatch_hw (tree decl,
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int *hw_before,
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int *hw_after)
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{
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tree attr;
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*hw_before = 0;
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*hw_after = 0;
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attr = lookup_attribute ("hotpatch", DECL_ATTRIBUTES (decl));
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/* Handle the arguments of the hotpatch attribute. The values
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@ -5267,18 +5264,6 @@ s390_function_num_hotpatch_hw (tree decl,
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*hw_before = s390_hotpatch_hw_before_label;
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*hw_after = s390_hotpatch_hw_after_label;
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}
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if (*hw_before == 0 && *hw_after == 0)
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return false;
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if (decl_function_context (decl) != NULL_TREE)
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{
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warning_at (DECL_SOURCE_LOCATION (decl), OPT_mhotpatch_,
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"hotpatching is not compatible with nested functions");
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return false;
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}
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return true;
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}
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/* Write the extra assembler code needed to declare a function properly. */
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@ -5288,12 +5273,9 @@ s390_asm_output_function_label (FILE *asm_out_file, const char *fname,
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tree decl)
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{
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int hw_before, hw_after;
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bool hotpatch_p = (decl
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? s390_function_num_hotpatch_hw (decl,
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&hw_before, &hw_after)
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: false);
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if (hotpatch_p)
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s390_function_num_hotpatch_hw (decl, &hw_before, &hw_after);
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if (hw_before > 0)
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{
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unsigned int function_alignment;
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int i;
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@ -5301,22 +5283,35 @@ s390_asm_output_function_label (FILE *asm_out_file, const char *fname,
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/* Add a trampoline code area before the function label and initialize it
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with two-byte nop instructions. This area can be overwritten with code
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that jumps to a patched version of the function. */
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for (i = 0; i < hw_before; i++)
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asm_fprintf (asm_out_file, "\tnopr\t%%r7\n");
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asm_fprintf (asm_out_file, "\tnopr\t%%r7"
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"\t# pre-label NOPs for hotpatch (%d halfwords)\n",
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hw_before);
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for (i = 1; i < hw_before; i++)
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fputs ("\tnopr\t%r7\n", asm_out_file);
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/* Note: The function label must be aligned so that (a) the bytes of the
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following nop do not cross a cacheline boundary, and (b) a jump address
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(eight bytes for 64 bit targets, 4 bytes for 32 bit targets) can be
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stored directly before the label without crossing a cacheline
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boundary. All this is necessary to make sure the trampoline code can
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be changed atomically. */
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be changed atomically.
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This alignment is done automatically using the FOUNCTION_BOUNDARY, but
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if there are NOPs before the function label, the alignment is placed
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before them. So it is necessary to duplicate the alignment after the
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NOPs. */
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function_alignment = MAX (8, DECL_ALIGN (decl) / BITS_PER_UNIT);
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if (! DECL_USER_ALIGN (decl))
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function_alignment = MAX (function_alignment,
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(unsigned int) align_functions);
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fputs ("\t# alignment for hotpatch\n", asm_out_file);
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ASM_OUTPUT_ALIGN (asm_out_file, floor_log2 (function_alignment));
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}
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ASM_OUTPUT_LABEL (asm_out_file, fname);
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if (hw_after > 0)
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asm_fprintf (asm_out_file,
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"\t# post-label NOPs for hotpatch (%d halfwords)\n",
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hw_after);
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}
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/* Output machine-dependent UNSPECs occurring in address constant X
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@ -11491,7 +11486,7 @@ s390_reorg (void)
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{
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rtx_insn *insn;
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/* Inject nops for hotpatching. */
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/* Insert NOPs for hotpatching. */
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for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
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{
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if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG)
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@ -1,3 +1,31 @@
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2015-03-31 Dominik Vogt <vogt@linux.vnet.ibm.com>
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* gcc.target/s390/hotpatch-25.c: New test.
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* gcc.target/s390/hotpatch-1.c: Update test.
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* gcc.target/s390/hotpatch-10.c: Update test.
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* gcc.target/s390/hotpatch-11.c: Update test.
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* gcc.target/s390/hotpatch-12.c: Update test.
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* gcc.target/s390/hotpatch-13.c: Update test.
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* gcc.target/s390/hotpatch-14.c: Update test.
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* gcc.target/s390/hotpatch-15.c: Update test.
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* gcc.target/s390/hotpatch-16.c: Update test.
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* gcc.target/s390/hotpatch-17.c: Update test.
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* gcc.target/s390/hotpatch-18.c: Update test.
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* gcc.target/s390/hotpatch-19.c: Update test.
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* gcc.target/s390/hotpatch-2.c: Update test.
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* gcc.target/s390/hotpatch-21.c: Update test.
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* gcc.target/s390/hotpatch-22.c: Update test.
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* gcc.target/s390/hotpatch-23.c: Update test.
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* gcc.target/s390/hotpatch-24.c: Update test.
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* gcc.target/s390/hotpatch-3.c: Update test.
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* gcc.target/s390/hotpatch-4.c: Update test.
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* gcc.target/s390/hotpatch-5.c: Update test.
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* gcc.target/s390/hotpatch-6.c: Update test.
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* gcc.target/s390/hotpatch-7.c: Update test.
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* gcc.target/s390/hotpatch-8.c: Update test.
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* gcc.target/s390/hotpatch-9.c: Update test.
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* gcc.target/s390/hotpatch-compile-16.c: Update test.
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2015-03-31 Richard Biener <rguenther@suse.de>
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PR middle-end/65626
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@ -11,6 +11,9 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -11,6 +11,9 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -11,6 +11,8 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -11,6 +11,8 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(999 halfwords)" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 999 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -12,6 +12,10 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler "alignment for hotpatch" } } */
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/* { dg-final { scan-assembler-times "\.align\t8" 2 } } */
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@ -12,6 +12,9 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -12,6 +12,8 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -12,6 +12,8 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -12,6 +12,9 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -11,6 +11,9 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler-not "post-label NOPs" } } */
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/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -18,6 +18,8 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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@ -11,7 +11,9 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
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/* { dg-final { scan-assembler "post-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
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/* { dg-final { scan-assembler-not "nop\t0" } } */
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/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
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/* { dg-final { scan-assembler-times "\.align\t8" 2 } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -11,4 +11,4 @@ void __attribute__ ((aligned(512))) hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-times "\.align\t512" 2 } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -11,4 +11,4 @@ void hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-times "\.align\t1024" 2 } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -11,4 +11,4 @@ void __attribute__ ((aligned(2048))) hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-times "\.align\t2048" 2 } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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@ -11,4 +11,4 @@ void __attribute__ ((aligned(4096))) hp1(void)
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}
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/* Check number of occurences of certain instructions. */
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/* { dg-final { scan-assembler-times "\.align\t4096" 2 } } */
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/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
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33
gcc/testsuite/gcc.target/s390/hotpatch-25.c
Normal file
33
gcc/testsuite/gcc.target/s390/hotpatch-25.c
Normal file
@ -0,0 +1,33 @@
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/* Functional tests for the function hotpatching feature. */
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/* { dg-do compile } */
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/* { dg-options "-O3 -mzarch" } */
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typedef long (*fn_t)(void);
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__attribute__ ((hotpatch(1,2)))
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fn_t outer(void)
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{
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__attribute__ ((hotpatch(4,8)))
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long nested1(void)
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{
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__attribute__ ((hotpatch(16,32)))
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long nested2(void)
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{
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return 2;
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}
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return (long)(void *)nested2;
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}
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return nested1;
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}
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/* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
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/* { dg-final { scan-assembler "pre-label.*(4 halfwords)" } } */
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/* { dg-final { scan-assembler "pre-label.*(16 halfwords)" } } */
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/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
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/* { dg-final { scan-assembler "post-label.*(8 halfwords)" } } */
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/* { dg-final { scan-assembler "post-label.*(32 halfwords)" } } */
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/* { dg-final { scan-assembler-times "alignment for hotpatch" 3 } } */
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/* { dg-final { scan-assembler-times "\.align\t8" 6 } } */
|
||||
/* { dg-final { scan-assembler "nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr.*\n.*nopr" } } */
|
@ -11,6 +11,8 @@ void hp1(void)
|
||||
}
|
||||
|
||||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "post-label.*(2 halfwords)" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
|
||||
/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
|
||||
/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
|
||||
|
@ -11,6 +11,8 @@ void hp1(void)
|
||||
}
|
||||
|
||||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "post-label.*(3 halfwords)" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
|
||||
/* { dg-final { scan-assembler-not "nop\t0" } } */
|
||||
/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
|
||||
|
@ -11,6 +11,8 @@ void hp1(void)
|
||||
}
|
||||
|
||||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "post-label.*(4 halfwords)" } } */
|
||||
/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
|
||||
/* { dg-final { scan-assembler-not "nop\t0" } } */
|
||||
/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
|
||||
|
@ -11,6 +11,8 @@ void hp1(void)
|
||||
}
|
||||
|
||||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "post-label.*(5 halfwords)" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
|
||||
/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
|
||||
|
@ -11,6 +11,8 @@ void hp1(void)
|
||||
}
|
||||
|
||||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "post-label.*(6 halfwords)" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
|
||||
/* { dg-final { scan-assembler-not "nop\t0" } } */
|
||||
/* { dg-final { scan-assembler-times "brcl\t0, 0" 2 } } */
|
||||
|
@ -11,6 +11,9 @@ void hp1(void)
|
||||
}
|
||||
|
||||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "post-label.*(3 halfwords)" } } */
|
||||
/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
|
||||
/* { dg-final { scan-assembler-times "nop\t0" 1 } } */
|
||||
/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
|
||||
/* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
|
||||
|
@ -11,6 +11,8 @@ void hp1(void)
|
||||
}
|
||||
|
||||
/* Check number of occurences of certain instructions. */
|
||||
/* { dg-final { scan-assembler-not "pre-label NOPs" } } */
|
||||
/* { dg-final { scan-assembler "post-label.*(4 halfwords)" } } */
|
||||
/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
|
||||
/* { dg-final { scan-assembler-times "nop\t0" 2 } } */
|
||||
/* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* A warning will be issued when requesting hotpatching on a nested function. */
|
||||
/* Functional tests for the function hotpatching feature. */
|
||||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O3 -mzarch" } */
|
||||
@ -17,7 +17,7 @@ fn_t hp1(void)
|
||||
fn_t hp2(void)
|
||||
{
|
||||
__attribute__ ((hotpatch(1,2)))
|
||||
int nested2(void) /* { dg-warning "hotpatching is not compatible with nested functions" } */
|
||||
int nested2(void)
|
||||
{ return 2; }
|
||||
|
||||
return nested2;
|
||||
|
Loading…
Reference in New Issue
Block a user