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rs6000.c (rs6000_emit_move): #if 0 splitting slow, unaligned loads and stores while debugging.

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* config/rs6000/rs6000.c (rs6000_emit_move): #if 0 splitting
        slow, unaligned loads and stores while debugging.  Fix formatting.

From-SVN: r76752
This commit is contained in:
David Edelsohn 2004-01-27 22:00:55 +00:00 committed by David Edelsohn
parent f2919ef38a
commit 2d9db8eb8d
2 changed files with 20 additions and 14 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2004-01-27 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.c (rs6000_emit_move): #if 0 splitting
slow, unaligned loads and stores while debugging. Fix formatting.
2004-01-27 David Edelsohn <edelsohn@gnu.org> 2004-01-27 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.md (save_stack_nonlocal): Use Pmode instead * config/rs6000/rs6000.md (save_stack_nonlocal): Use Pmode instead

23
gcc/config/rs6000/rs6000.c
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@ -3426,6 +3426,7 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
adjust_address (operands[1], SImode, 4)); adjust_address (operands[1], SImode, 4));
return; return;
} }
#if 0
else if (mode == DImode && TARGET_POWERPC64 else if (mode == DImode && TARGET_POWERPC64
&& GET_CODE (operands[0]) == REG && GET_CODE (operands[0]) == REG
&& GET_CODE (operands[1]) == MEM && optimize > 0 && GET_CODE (operands[1]) == MEM && optimize > 0
@ -3435,15 +3436,14 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
: MEM_ALIGN (operands[1])) : MEM_ALIGN (operands[1]))
&& !no_new_pseudos) && !no_new_pseudos)
{ {
rtx mem;
rtx reg = gen_reg_rtx (SImode); rtx reg = gen_reg_rtx (SImode);
mem = adjust_address (operands[1], SImode, 0); emit_insn (gen_rtx_SET (SImode, reg,
emit_insn (gen_rtx_SET (SImode, reg, mem)); adjust_address (operands[1], SImode, 0)));
reg = simplify_gen_subreg (DImode, reg, SImode, 0); reg = simplify_gen_subreg (DImode, reg, SImode, 0);
emit_insn (gen_insvdi (operands[0], GEN_INT (32), const0_rtx, reg)); emit_insn (gen_insvdi (operands[0], GEN_INT (32), const0_rtx, reg));
reg = gen_reg_rtx (SImode); reg = gen_reg_rtx (SImode);
mem = adjust_address (operands[1], SImode, 4); emit_insn (gen_rtx_SET (SImode, reg,
emit_insn (gen_rtx_SET (SImode, reg, mem)); adjust_address (operands[1], SImode, 4)));
reg = simplify_gen_subreg (DImode, reg, SImode, 0); reg = simplify_gen_subreg (DImode, reg, SImode, 0);
emit_insn (gen_insvdi (operands[0], GEN_INT (32), GEN_INT (32), reg)); emit_insn (gen_insvdi (operands[0], GEN_INT (32), GEN_INT (32), reg));
return; return;
@ -3457,15 +3457,16 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode)
: MEM_ALIGN (operands[0])) : MEM_ALIGN (operands[0]))
&& !no_new_pseudos) && !no_new_pseudos)
{ {
rtx mem;
rtx reg = gen_reg_rtx (DImode); rtx reg = gen_reg_rtx (DImode);
emit_move_insn (reg, gen_rtx_LSHIFTRT (DImode, operands[1], GEN_INT (32))); emit_move_insn (reg,
mem = adjust_address (operands[0], SImode, 0); gen_rtx_LSHIFTRT (DImode, operands[1], GEN_INT (32)));
emit_move_insn (mem, simplify_gen_subreg (SImode, reg, DImode, 0)); emit_move_insn (adjust_address (operands[0], SImode, 0),
mem = adjust_address (operands[0], SImode, 4); simplify_gen_subreg (SImode, reg, DImode, 0));
emit_move_insn (mem, simplify_gen_subreg (SImode, operands[1], DImode, 0)); emit_move_insn (adjust_address (operands[0], SImode, 4),
simplify_gen_subreg (SImode, operands[1], DImode, 0));
return; return;
} }
#endif
if (!no_new_pseudos) if (!no_new_pseudos)
{ {