re PR rtl-optimization/87600 (Fix for PRs 86939 and 87479 causes build issues for several targets)
gcc/ PR rtl-optimization/87600 * cfgexpand.c (expand_asm_stmt): Catch illegal asm constraint usage. * lra-constraints.c (process_alt_operands): Skip illegal hard register usage. Prefer reloading non hard register operands. gcc/testsuite/ PR rtl-optimization/87600 * gcc.dg/pr87600.h: New file. * gcc.dg/pr87600-1.c: New test. * gcc.dg/pr87600-2.c: Likewise. From-SVN: r265942
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Peter Bergner
Peter Bergner
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2f0b80c7a4
@ -1,3 +1,16 @@
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2018-11-08 Peter Bergner <bergner@linux.ibm.com>
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PR rtl-optimization/87600
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* cfgexpand.c (expand_asm_stmt): Catch illegal asm constraint usage.
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* lra-constraints.c (process_alt_operands): Skip illegal hard
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register usage. Prefer reloading non hard register operands.
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gcc/testsuite/
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PR rtl-optimization/87600
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* gcc.dg/pr87600.h: New file.
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* gcc.dg/pr87600-1.c: New test.
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* gcc.dg/pr87600-2.c: Likewise.
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2018-11-08 Sandra Loosemore <sandra@codesourcery.com>
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PR other/36572
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@ -12,7 +25,7 @@
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* common.opt (-fuse-ld=lld): New option.
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* doc/invoke.texi (-fuse-ld=lld): Document.
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* opts.c (common_handle_option): Handle OPT_fuse_ld_lld.
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2018-11-08 Paul Koning <ni1d@arrl.net>
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* config/pdp11/constraints.md: Add "Z" series constraints for use
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@ -3010,6 +3010,55 @@ expand_asm_stmt (gasm *stmt)
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&allows_mem, &allows_reg, &is_inout))
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return;
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/* If the output is a hard register, verify it doesn't conflict with
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any other operand's possible hard register use. */
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if (DECL_P (val)
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&& REG_P (DECL_RTL (val))
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&& HARD_REGISTER_P (DECL_RTL (val)))
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{
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unsigned j, output_hregno = REGNO (DECL_RTL (val));
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bool early_clobber_p = strchr (constraints[i], '&') != NULL;
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unsigned long match;
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/* Verify the other outputs do not use the same hard register. */
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for (j = i + 1; j < noutputs; ++j)
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if (DECL_P (output_tvec[j])
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&& REG_P (DECL_RTL (output_tvec[j]))
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&& HARD_REGISTER_P (DECL_RTL (output_tvec[j]))
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&& output_hregno == REGNO (DECL_RTL (output_tvec[j])))
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error ("invalid hard register usage between output operands");
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/* Verify matching constraint operands use the same hard register
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and that the non-matching constraint operands do not use the same
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hard register if the output is an early clobber operand. */
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for (j = 0; j < ninputs; ++j)
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if (DECL_P (input_tvec[j])
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&& REG_P (DECL_RTL (input_tvec[j]))
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&& HARD_REGISTER_P (DECL_RTL (input_tvec[j])))
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{
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unsigned input_hregno = REGNO (DECL_RTL (input_tvec[j]));
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switch (*constraints[j + noutputs])
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{
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case '0': case '1': case '2': case '3': case '4':
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case '5': case '6': case '7': case '8': case '9':
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match = strtoul (constraints[j + noutputs], NULL, 10);
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break;
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default:
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match = ULONG_MAX;
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break;
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}
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if (i == match
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&& output_hregno != input_hregno)
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error ("invalid hard register usage between output operand "
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"and matching constraint operand");
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else if (early_clobber_p
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&& i != match
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&& output_hregno == input_hregno)
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error ("invalid hard register usage between earlyclobber "
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"operand and input operand");
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}
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}
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if (! allows_reg
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&& (allows_mem
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|| is_inout
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@ -2146,9 +2146,32 @@ process_alt_operands (int only_alternative)
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}
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else
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{
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/* Operands don't match. Both operands must
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allow a reload register, otherwise we
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cannot make them match. */
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/* Operands don't match. If the operands are
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different user defined explicit hard registers,
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then we cannot make them match. */
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if ((REG_P (*curr_id->operand_loc[nop])
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|| SUBREG_P (*curr_id->operand_loc[nop]))
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&& (REG_P (*curr_id->operand_loc[m])
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|| SUBREG_P (*curr_id->operand_loc[m])))
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{
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rtx nop_reg = *curr_id->operand_loc[nop];
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if (SUBREG_P (nop_reg))
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nop_reg = SUBREG_REG (nop_reg);
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rtx m_reg = *curr_id->operand_loc[m];
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if (SUBREG_P (m_reg))
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m_reg = SUBREG_REG (m_reg);
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if (REG_P (nop_reg)
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&& HARD_REGISTER_P (nop_reg)
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&& REG_USERVAR_P (nop_reg)
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&& REG_P (m_reg)
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&& HARD_REGISTER_P (m_reg)
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&& REG_USERVAR_P (m_reg))
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break;
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}
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/* Both operands must allow a reload register,
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otherwise we cannot make them match. */
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if (curr_alt[m] == NO_REGS)
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break;
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/* Retroactively mark the operand we had to
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@ -2910,18 +2933,31 @@ process_alt_operands (int only_alternative)
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if (first_conflict_j < 0)
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first_conflict_j = j;
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last_conflict_j = j;
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/* Both the earlyclobber operand and conflicting operand
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cannot both be user defined hard registers. */
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if (HARD_REGISTER_P (operand_reg[i])
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&& REG_USERVAR_P (operand_reg[i])
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&& operand_reg[j] != NULL_RTX
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&& HARD_REGISTER_P (operand_reg[j])
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&& REG_USERVAR_P (operand_reg[j]))
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fatal_insn ("unable to generate reloads for "
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"impossible constraints:", curr_insn);
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}
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if (last_conflict_j < 0)
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continue;
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/* If earlyclobber operand conflicts with another
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non-matching operand which is actually the same register
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as the earlyclobber operand, it is better to reload the
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another operand as an operand matching the earlyclobber
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operand can be also the same. */
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if (first_conflict_j == last_conflict_j
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&& operand_reg[last_conflict_j] != NULL_RTX
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&& ! curr_alt_match_win[last_conflict_j]
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&& REGNO (operand_reg[i]) == REGNO (operand_reg[last_conflict_j]))
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/* If an earlyclobber operand conflicts with another non-matching
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operand (ie, they have been assigned the same hard register),
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then it is better to reload the other operand, as there may
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exist yet another operand with a matching constraint associated
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with the earlyclobber operand. However, if one of the operands
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is an explicit use of a hard register, then we must reload the
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other non-hard register operand. */
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if (HARD_REGISTER_P (operand_reg[i])
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|| (first_conflict_j == last_conflict_j
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&& operand_reg[last_conflict_j] != NULL_RTX
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&& !curr_alt_match_win[last_conflict_j]
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&& !HARD_REGISTER_P (operand_reg[last_conflict_j])))
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{
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curr_alt_win[last_conflict_j] = false;
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curr_alt_dont_inherit_ops[curr_alt_dont_inherit_ops_num++]
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@ -1,3 +1,10 @@
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2018-11-08 Peter Bergner <bergner@linux.ibm.com>
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PR rtl-optimization/87600
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* gcc.dg/pr87600.h: New file.
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* gcc.dg/pr87600-1.c: New test.
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* gcc.dg/pr87600-2.c: Likewise.
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2018-11-08 Jakub Jelinek <jakub@redhat.com>
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* c-c++-common/gomp/atomic-17.c: New test.
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52
gcc/testsuite/gcc.dg/pr87600-1.c
Normal file
52
gcc/testsuite/gcc.dg/pr87600-1.c
Normal file
@ -0,0 +1,52 @@
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/* PR rtl-optimization/87600 */
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/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* s390*-*-* x86_64-*-* } } */
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/* { dg-options "-O2" } */
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#include "pr87600.h"
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/* The following are all valid uses of local register variables. */
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long
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test0 (long arg)
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{
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register long var asm (REG1);
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asm ("blah %0 %1" : "+&r" (var) : "r" (arg));
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return var;
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}
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long
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test1 (long arg0, long arg1)
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{
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register long var asm (REG1);
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asm ("blah %0, %1, %2" : "=&r" (var) : "r" (arg0), "0" (arg1));
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return var + arg1;
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}
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long
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test2 (void)
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{
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register long var1 asm (REG1);
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register long var2 asm (REG1);
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asm ("blah %0 %1" : "=&r" (var1) : "0" (var2));
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return var1;
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}
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long
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test3 (void)
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{
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register long var1 asm (REG1);
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register long var2 asm (REG2);
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long var3;
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asm ("blah %0 %1" : "=&r" (var1), "=r" (var3) : "1" (var2));
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return var1 + var3;
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}
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long
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test4 (void)
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{
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register long var1 asm (REG1);
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register long var2 asm (REG2);
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register long var3 asm (REG2);
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asm ("blah %0 %1" : "=&r" (var1), "=r" (var2) : "1" (var3));
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return var1;
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}
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44
gcc/testsuite/gcc.dg/pr87600-2.c
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44
gcc/testsuite/gcc.dg/pr87600-2.c
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@ -0,0 +1,44 @@
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/* PR rtl-optimization/87600 */
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/* { dg-do compile { target aarch64*-*-* arm*-*-* i?86-*-* powerpc*-*-* s390*-*-* x86_64-*-* } } */
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/* { dg-options "-O2" } */
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#include "pr87600.h"
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/* The following are all invalid uses of local register variables. */
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long
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test0 (void)
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{
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register long var1 asm (REG1);
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register long var2 asm (REG1);
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asm ("blah %0 %1" : "=r" (var1), "=r" (var2)); /* { dg-error "invalid hard register usage between output operands" } */
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return var1;
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}
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long
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test1 (void)
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{
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register long var1 asm (REG1);
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register long var2 asm (REG2);
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asm ("blah %0 %1" : "=r" (var1) : "0" (var2)); /* { dg-error "invalid hard register usage between output operand and matching constraint operand" } */
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return var1;
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}
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long
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test2 (void)
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{
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register long var1 asm (REG1);
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register long var2 asm (REG1);
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asm ("blah %0 %1" : "=&r" (var1) : "r" (var2)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */
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return var1;
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}
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long
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test3 (void)
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{
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register long var1 asm (REG1);
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register long var2 asm (REG1);
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long var3;
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asm ("blah %0 %1" : "=&r" (var1), "=r" (var3) : "1" (var2)); /* { dg-error "invalid hard register usage between earlyclobber operand and input operand" } */
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return var1 + var3;
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}
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19
gcc/testsuite/gcc.dg/pr87600.h
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19
gcc/testsuite/gcc.dg/pr87600.h
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@ -0,0 +1,19 @@
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#if defined (__aarch64__)
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# define REG1 "x0"
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# define REG2 "x1"
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#elif defined (__arm__)
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# define REG1 "r0"
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# define REG2 "r1"
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#elif defined (__i386__)
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# define REG1 "%eax"
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# define REG2 "%edx"
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#elif defined (__powerpc__)
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# define REG1 "r3"
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# define REG2 "r4"
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#elif defined (__s390__)
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# define REG1 "0"
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# define REG2 "1"
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#elif defined (__x86_64__)
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# define REG1 "rax"
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# define REG2 "rdx"
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#endif
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