s390.md: ("gf") New mode attribute.
2005-05-09 Adrian Straetling <straetling@de.ibm.com> * config/s390/s390.md: ("gf") New mode attribute. ("fixuns_truncdfdi2", "fixuns_truncdfsi2", "fixuns_truncsfdi2", "fixuns_truncsfsi2"): Merge. ("fix_truncdfdi2", "fix_truncsfdi2"): Merge. ("fix_truncdfdi2_ieee", "fix_truncdfsi2_ieee", "fix_truncsfdi2_ieee", "fix_truncsfsi2_ieee"): Merge. From-SVN: r99458
This commit is contained in:
parent
f5905b37b0
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2f8f843440
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@ -1,3 +1,12 @@
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2005-05-09 Adrian Straetling <straetling@de.ibm.com>
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* config/s390/s390.md: ("gf") New mode attribute.
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("fixuns_truncdfdi2", "fixuns_truncdfsi2", "fixuns_truncsfdi2",
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"fixuns_truncsfsi2"): Merge.
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("fix_truncdfdi2", "fix_truncsfdi2"): Merge.
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("fix_truncdfdi2_ieee", "fix_truncdfsi2_ieee", "fix_truncsfdi2_ieee",
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"fix_truncsfsi2_ieee"): Merge.
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2005-05-09 Adrian Straetling <straetling@de.ibm.com>
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2005-05-09 Adrian Straetling <straetling@de.ibm.com>
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* config/s390/s390.md: ("FPR") New mode macro.
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* config/s390/s390.md: ("FPR") New mode macro.
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@ -292,6 +292,10 @@
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;; and "lcr" in SImode.
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;; and "lcr" in SImode.
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(define_mode_attr g [(DI "g") (SI "")])
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(define_mode_attr g [(DI "g") (SI "")])
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;; In GPR templates, a string like "c<gf>dbr" will expand to "cgdbr" in DImode
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;; and "cfdbr" in SImode.
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(define_mode_attr gf [(DI "g") (SI "f")])
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;; ICM mask required to load MODE value into the highest subreg
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;; ICM mask required to load MODE value into the highest subreg
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;; of a SImode register.
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;; of a SImode register.
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(define_mode_attr icm_hi [(HI "12") (QI "8")])
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(define_mode_attr icm_hi [(HI "12") (QI "8")])
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@ -2667,85 +2671,64 @@
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;
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;
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; fixuns_truncdfdi2 and fix_truncdfsi2 instruction pattern(s).
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; fixuns_trunc(sf|df)(si|di)2 and fix_trunc(sf|df)(si|di)2 instruction pattern(s).
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;
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;
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(define_expand "fixuns_truncdfdi2"
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(define_expand "fixuns_trunc<FPR:mode><GPR:mode>2"
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[(set (match_operand:DI 0 "register_operand" "")
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[(set (match_operand:GPR 0 "register_operand" "")
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(unsigned_fix:DI (match_operand:DF 1 "register_operand" "")))]
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(unsigned_fix:GPR (match_operand:FPR 1 "register_operand" "")))]
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"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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{
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rtx label1 = gen_label_rtx ();
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rtx label2 = gen_label_rtx ();
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rtx temp = gen_reg_rtx (DFmode);
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operands[1] = force_reg (DFmode, operands[1]);
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emit_insn (gen_cmpdf (operands[1],
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CONST_DOUBLE_FROM_REAL_VALUE (
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REAL_VALUE_ATOF ("9223372036854775808.0", DFmode), DFmode)));
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emit_jump_insn (gen_blt (label1));
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emit_insn (gen_subdf3 (temp, operands[1],
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CONST_DOUBLE_FROM_REAL_VALUE (
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REAL_VALUE_ATOF ("18446744073709551616.0", DFmode), DFmode)));
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emit_insn (gen_fix_truncdfdi2_ieee (operands[0], temp, GEN_INT(7)));
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emit_jump (label2);
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emit_label (label1);
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emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
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emit_label (label2);
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DONE;
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})
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(define_expand "fix_truncdfdi2"
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[(set (match_operand:DI 0 "register_operand" "")
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(fix:DI (match_operand:DF 1 "nonimmediate_operand" "")))]
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"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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{
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operands[1] = force_reg (DFmode, operands[1]);
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emit_insn (gen_fix_truncdfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
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DONE;
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})
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(define_insn "fix_truncdfdi2_ieee"
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[(set (match_operand:DI 0 "register_operand" "=d")
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(fix:DI (match_operand:DF 1 "register_operand" "f")))
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(unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND)
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(clobber (reg:CC 33))]
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"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"cgdbr\t%0,%h2,%1"
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[(set_attr "op_type" "RRE")
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(set_attr "type" "ftoi")])
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;
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; fixuns_truncdfsi2 and fix_truncdfsi2 instruction pattern(s).
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;
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(define_expand "fixuns_truncdfsi2"
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[(set (match_operand:SI 0 "register_operand" "")
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(unsigned_fix:SI (match_operand:DF 1 "register_operand" "")))]
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"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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{
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{
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rtx label1 = gen_label_rtx ();
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rtx label1 = gen_label_rtx ();
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rtx label2 = gen_label_rtx ();
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rtx label2 = gen_label_rtx ();
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rtx temp = gen_reg_rtx (DFmode);
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rtx temp = gen_reg_rtx (<FPR:MODE>mode);
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REAL_VALUE_TYPE cmp, sub;
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operands[1] = force_reg (DFmode,operands[1]);
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operands[1] = force_reg (<FPR:MODE>mode, operands[1]);
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emit_insn (gen_cmpdf (operands[1],
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real_2expN (&cmp, GET_MODE_BITSIZE(<GPR:MODE>mode) - 1);
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CONST_DOUBLE_FROM_REAL_VALUE (
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real_2expN (&sub, GET_MODE_BITSIZE(<GPR:MODE>mode));
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REAL_VALUE_ATOF ("2147483648.0", DFmode), DFmode)));
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emit_insn (gen_cmp<FPR:mode> (operands[1],
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CONST_DOUBLE_FROM_REAL_VALUE (cmp, <FPR:MODE>mode)));
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emit_jump_insn (gen_blt (label1));
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emit_jump_insn (gen_blt (label1));
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emit_insn (gen_subdf3 (temp, operands[1],
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emit_insn (gen_sub<FPR:mode>3 (temp, operands[1],
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CONST_DOUBLE_FROM_REAL_VALUE (
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CONST_DOUBLE_FROM_REAL_VALUE (sub, <FPR:MODE>mode)));
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REAL_VALUE_ATOF ("4294967296.0", DFmode), DFmode)));
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emit_insn (gen_fix_trunc<FPR:mode><GPR:mode>2_ieee (operands[0], temp,
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emit_insn (gen_fix_truncdfsi2_ieee (operands[0], temp, GEN_INT (7)));
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GEN_INT(7)));
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emit_jump (label2);
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emit_jump (label2);
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emit_label (label1);
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emit_label (label1);
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emit_insn (gen_fix_truncdfsi2_ieee (operands[0], operands[1], GEN_INT (5)));
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emit_insn (gen_fix_trunc<FPR:mode><GPR:mode>2_ieee (operands[0],
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operands[1], GEN_INT(5)));
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emit_label (label2);
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emit_label (label2);
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DONE;
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DONE;
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})
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})
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(define_expand "fix_trunc<FPR:mode>di2"
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[(set (match_operand:DI 0 "register_operand" "")
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(fix:DI (match_operand:FPR 1 "nonimmediate_operand" "")))]
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"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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{
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operands[1] = force_reg (<FPR:MODE>mode, operands[1]);
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emit_insn (gen_fix_trunc<FPR:mode>di2_ieee (operands[0], operands[1],
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GEN_INT(5)));
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DONE;
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})
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(define_insn "fix_trunc<FPR:mode><GPR:mode>2_ieee"
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[(set (match_operand:GPR 0 "register_operand" "=d")
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(fix:GPR (match_operand:FPR 1 "register_operand" "f")))
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(unspec:GPR [(match_operand:GPR 2 "immediate_operand" "K")] UNSPEC_ROUND)
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(clobber (reg:CC 33))]
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"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"c<GPR:gf><FPR:de>br\t%0,%h2,%1"
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[(set_attr "op_type" "RRE")
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(set_attr "type" "ftoi")])
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;
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; fix_truncdfsi2 instruction pattern(s).
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;
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(define_expand "fix_truncdfsi2"
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(define_expand "fix_truncdfsi2"
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[(set (match_operand:SI 0 "register_operand" "")
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[(set (match_operand:SI 0 "register_operand" "")
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(fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))]
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(fix:SI (match_operand:DF 1 "nonimmediate_operand" "")))]
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@ -2772,16 +2755,6 @@
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DONE;
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DONE;
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})
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})
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(define_insn "fix_truncdfsi2_ieee"
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[(set (match_operand:SI 0 "register_operand" "=d")
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(fix:SI (match_operand:DF 1 "register_operand" "f")))
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(unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND)
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(clobber (reg:CC 33))]
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"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"cfdbr\t%0,%h2,%1"
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[(set_attr "op_type" "RRE")
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(set_attr "type" "ftoi")])
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(define_insn "fix_truncdfsi2_ibm"
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(define_insn "fix_truncdfsi2_ibm"
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[(set (match_operand:SI 0 "register_operand" "=d")
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[(set (match_operand:SI 0 "register_operand" "=d")
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(fix:SI (match_operand:DF 1 "nonimmediate_operand" "+f")))
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(fix:SI (match_operand:DF 1 "nonimmediate_operand" "+f")))
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@ -2800,86 +2773,9 @@
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[(set_attr "length" "20")])
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[(set_attr "length" "20")])
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;
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;
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; fixuns_truncsfdi2 and fix_truncsfdi2 instruction pattern(s).
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; fix_truncsfsi2 instruction pattern(s).
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;
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;
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(define_expand "fixuns_truncsfdi2"
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[(set (match_operand:DI 0 "register_operand" "")
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(unsigned_fix:DI (match_operand:SF 1 "register_operand" "")))]
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"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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{
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rtx label1 = gen_label_rtx ();
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rtx label2 = gen_label_rtx ();
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rtx temp = gen_reg_rtx (SFmode);
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operands[1] = force_reg (SFmode, operands[1]);
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emit_insn (gen_cmpsf (operands[1],
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CONST_DOUBLE_FROM_REAL_VALUE (
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REAL_VALUE_ATOF ("9223372036854775808.0", SFmode), SFmode)));
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emit_jump_insn (gen_blt (label1));
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emit_insn (gen_subsf3 (temp, operands[1],
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CONST_DOUBLE_FROM_REAL_VALUE (
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REAL_VALUE_ATOF ("18446744073709551616.0", SFmode), SFmode)));
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emit_insn (gen_fix_truncsfdi2_ieee (operands[0], temp, GEN_INT(7)));
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emit_jump (label2);
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emit_label (label1);
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emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
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emit_label (label2);
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DONE;
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})
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(define_expand "fix_truncsfdi2"
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[(set (match_operand:DI 0 "register_operand" "")
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(fix:DI (match_operand:SF 1 "nonimmediate_operand" "")))]
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"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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{
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operands[1] = force_reg (SFmode, operands[1]);
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emit_insn (gen_fix_truncsfdi2_ieee (operands[0], operands[1], GEN_INT(5)));
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DONE;
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})
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(define_insn "fix_truncsfdi2_ieee"
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[(set (match_operand:DI 0 "register_operand" "=d")
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(fix:DI (match_operand:SF 1 "register_operand" "f")))
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(unspec:DI [(match_operand:DI 2 "immediate_operand" "K")] UNSPEC_ROUND)
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(clobber (reg:CC 33))]
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"TARGET_64BIT && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"cgebr\t%0,%h2,%1"
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[(set_attr "op_type" "RRE")
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(set_attr "type" "ftoi")])
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;
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; fixuns_truncsfsi2 and fix_truncsfsi2 instruction pattern(s).
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;
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(define_expand "fixuns_truncsfsi2"
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[(set (match_operand:SI 0 "register_operand" "")
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(unsigned_fix:SI (match_operand:SF 1 "register_operand" "")))]
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"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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{
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rtx label1 = gen_label_rtx ();
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rtx label2 = gen_label_rtx ();
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rtx temp = gen_reg_rtx (SFmode);
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operands[1] = force_reg (SFmode, operands[1]);
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emit_insn (gen_cmpsf (operands[1],
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CONST_DOUBLE_FROM_REAL_VALUE (
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REAL_VALUE_ATOF ("2147483648.0", SFmode), SFmode)));
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emit_jump_insn (gen_blt (label1));
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emit_insn (gen_subsf3 (temp, operands[1],
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CONST_DOUBLE_FROM_REAL_VALUE (
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REAL_VALUE_ATOF ("4294967296.0", SFmode), SFmode)));
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emit_insn (gen_fix_truncsfsi2_ieee (operands[0], temp, GEN_INT (7)));
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emit_jump (label2);
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emit_label (label1);
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emit_insn (gen_fix_truncsfsi2_ieee (operands[0], operands[1], GEN_INT (5)));
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emit_label (label2);
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DONE;
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})
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(define_expand "fix_truncsfsi2"
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(define_expand "fix_truncsfsi2"
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[(set (match_operand:SI 0 "register_operand" "")
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[(set (match_operand:SI 0 "register_operand" "")
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(fix:SI (match_operand:SF 1 "nonimmediate_operand" "")))]
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(fix:SI (match_operand:SF 1 "nonimmediate_operand" "")))]
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@ -2901,16 +2797,6 @@
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DONE;
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DONE;
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})
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})
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(define_insn "fix_truncsfsi2_ieee"
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[(set (match_operand:SI 0 "register_operand" "=d")
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(fix:SI (match_operand:SF 1 "register_operand" "f")))
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(unspec:SI [(match_operand:SI 2 "immediate_operand" "K")] UNSPEC_ROUND)
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(clobber (reg:CC 33))]
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"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"cfebr\t%0,%h2,%1"
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[(set_attr "op_type" "RRE")
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(set_attr "type" "ftoi")])
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;
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;
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; floatdi(df|sf)2 instruction pattern(s).
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; floatdi(df|sf)2 instruction pattern(s).
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;
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;
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