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Delete SEQUENCE rtl usage outside of reorg and ssa passes. 

2002-06-05  David S. Miller  <davem@redhat.com>

	Delete SEQUENCE rtl usage outside of reorg and ssa passes.
	* rtl.h (gen_sequence, emit_insns, emit_insns_before,
	emit_insns_before_scope, emit_insns_after,
	emit_insns_after_scope): Delete declaration.
	* ada/misc.c (insert_code_for): Use emit_insn* instead of
	emit_insns_foo.
	* config/alpha/alpha.c (alpha_set_memflags_1): Abort on SEQUENCE.
	(alpha_set_memflags): Fix comment.
	(set_frame_related_p): Use get_insns instead of gen_sequence.
	* config/alpha/alpha.md (setjmp receiver splitter): Avoid
	emitting no insns.
	* config/arm/arm.c (arm_finalize_pic): Use get_insns instead of
	gen_sequence.
	(arm_gen_load_multiple, arm_gen_store_multiple): Likewise.
	* config/fr30/fr30.c (fr30_move_double): Likewise.
	* config/i386/i386.c (ix86_expand_int_movcc, ix86_expand_movstr):
	Likewise.
	* config/ia64/ia64.c (spill_restore_mem): Likewise.
	* config/ia64/ia64.md (conditional move spliiter): Avoid emitting
	no insns.
	* config/m32r/m32r.c (gen_split_move_double): Use get_insns
	instead of gen_sequence.
	* config/mips/mips.c (embedded_pic_fnaddr_reg): Likewise.
	(mips_expand_prologue, mips16_gp_pseudo_reg): Likewise.
	* config/sh/sh.c (sh_need_epilogue): Likewise.
	* config/sparc/sparc.md (current_function_calls_alloca, flat): New
	attributes.
	(setjmp pattern and split): Use them to avoid splitter which emits
	no RTL.
	* genattrtab.c (main): Emit include of function.h
	* config/stormy16/stormy16.c (xstormy16_split_cbranch): Use
	get_insns instead of gen_sequence.
	* config/cris/cris.c (cris_split_movdx): Likewise.
	* emit-rtl.c (emit_insns*): Kill.
	(try_split): Expect insn list instead of SEQUENCE.
	(make_jump_insn_raw, make_call_insn_raw): Fix comments.
	(emit_*insn*): Reimplement to work with INSN lists and PATTERNs.
	Make them abort if a SEQUENCE is given and RTL checking is
	enabled.
	(emit_*_scope): Don't forget to set scope on final insn.
	(gen_sequence): Move from here...
	* ssa.c (gen_sequence): To here as private function.
	* builtins.c (expand_builtin_apply_args): Use emit_insn_foo, fix
	comments.
	(expand_builtin_return, expand_builtin_mathfn): Likewise.
	(expand_builtin_strlen): Use get_insns instead of gen_sequence.
	(expand_builtin_saveregs): Use emit_insn_foo, fix comments.
	(expand_builtin_expect_jump): Use get_insns and fix comments.
	* calls.c (try_to_integrate): Use emit_insn_foo.
	(expand_call, emit_library_call_value_1): Likewise.
	* expr.c (emit_queue): Handle insn lists instead of SEQUENCE.
	(emit_move_insn_1): Use get_insns instead of gen_sequence.
	(expand_expr): Use emit_insn_foo.
	* cfgrtl.c (commit_one_edge_insertion): Use emit_insn_foo.
	* except.c (build_post_landing_pads): Likewise.
	* flow.c (attempt_auto_inc): Likewise.
	* stmt.c (expand_fixup, fixup_gotos, expand_nl_handler_label,
	expand_nl_goto_receivers, expand_decl_cleanup): Likewise.
	* function.c (fixup_var_refs_insn): Use get_insns instead of
	gen_sequence.
	(fixup_var_refs_1): Likewise and expect insn list from gen_foo.
	(fixup_memory_subreg): Use get_insns instead of gen_sequence.
	(fixup_stack_1, purge_addressof_1, expand_main_function,
	get_arg_pointer_save_area): Likewise.
	(optimize_bit_field, instantiate_virtual_regs_1, assign_parms,
	expand_function_end): Use emit_insn_foo.
	(record_insns, keep_stack_depressed): Work with insn list instead
	of SEQUENCE, fix comments.
	* ifcvt.c (noce_emit_store_flag, noce_try_store_flag,
	noce_try_store_flag_constants, noce_try_store_flag_inc,
	noce_try_store_flag_mask, noce_emit_cmove, noce_try_cmove_arith,
	noce_try_minmax, noce_try_abs): Use emit_insn_foo.
	(noce_process_if_block): Use get_insns instead of gen_sequence.
	* optabs.c (add_equal_note): Work with insn list, fix comments.
	(expand_binop): Expect insn list from GEN_FCN(), use emit_insn_foo.
	(expand_unop, expand_complex_abs, expand_unop_insn,
	expand_no_conflict_block): Likewise.
	(gen_move_insn): Use get_insns instead of gen_sequence.
	(gen_cond_trap): Likewise.
	* integrate.c (copy_rtx_and_substitute): Likewise.
	(emit_initial_value_sets): Use emit_insn_foo.
	* reload1.c (emit_output_reload_insns, emit_reload_insns): Likewise.
	(fixup_abnormal_edges): Avoid losing REG_NOTES more intelligently
	now that RTL generators give insn lists.
	* sibcall.c (replace_call_placeholder): Use emit_insn_foo.
	* doloop.c (doloop_modify, doloop_modify_runtime): Use get_insns
	instead of gen_sequence.
	(doloop_optimize): Work with insn lists instead of SEQUENCE rtl.
	* explow.c (emit_stack_save, emit_stack_restore): Use get_insns
	instead of gen_sequence.
	* loop.c (move_movables, emit_prefetch_instructions,
	gen_add_mult, check_dbra_loop, gen_load_of_final_value):
	Likewise.
	(loop_regs_update): Work with insn list instead of SEQUENCE rtl.
	(product_cheap_p): Likewise, and add commentary about RTL wastage
	here.
	* lcm.c (optimize_mode_switching): Use get_insns instead of
	gen_sequence.
	* profile.c (gen_edge_profiler): Likewise.
	* regmove.c (copy_src_to_dest): Likewise.
	* reg-stack.c (compensate_edge): Likewise and fix comment.
	* gcse.c (process_insert_insn): Likewise.
	(insert_insn_end_bb): Work with insn list instead of SEQUENCE rtl.
	* jump.c (delete_prior_computation): Update comment.
	* genemit.c (gen_expand, gen_split, main): Use get_insns instead
	of gen_sequence, update comments to match.
	* recog.c (peephole2_optimize): Work with insn lists instead of
	SEQUENCE rtl.
	* sched-vis.c (print_pattern): Abort on SEQUENCE.
	* unroll.c (unroll_loop, find_splittable_givs, final_giv_value):
	Use get_insns instead of gen_sequence.
	(copy_loop_body): Likewise and don't emit dummy NOTE.
	* genrecog.c: Don't mention SEQUENCE rtl in comments.
	* combine.c (try_combine): Expect insn lists from split generator.
	* reorg.c (relax_delay_slots): Emit SEQUENCE into insn list by
	hand.

From-SVN: r54497
This commit is contained in:
David S. Miller 2002-06-11 05:22:48 -07:00 committed by David S. Miller
parent 43cf10b56c
commit 2f937369fa
48 changed files with 1120 additions and 765 deletions
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119
gcc/ChangeLog
View File

@ -1,3 +1,122 @@
2002-06-05 David S. Miller <davem@redhat.com>
Delete SEQUENCE rtl usage outside of reorg and ssa passes.
* rtl.h (gen_sequence, emit_insns, emit_insns_before,
emit_insns_before_scope, emit_insns_after,
emit_insns_after_scope): Delete declaration.
* ada/misc.c (insert_code_for): Use emit_insn* instead of
emit_insns_foo.
* config/alpha/alpha.c (alpha_set_memflags_1): Abort on SEQUENCE.
(alpha_set_memflags): Fix comment.
(set_frame_related_p): Use get_insns instead of gen_sequence.
* config/alpha/alpha.md (setjmp receiver splitter): Avoid
emitting no insns.
* config/arm/arm.c (arm_finalize_pic): Use get_insns instead of
gen_sequence.
(arm_gen_load_multiple, arm_gen_store_multiple): Likewise.
* config/fr30/fr30.c (fr30_move_double): Likewise.
* config/i386/i386.c (ix86_expand_int_movcc, ix86_expand_movstr):
Likewise.
* config/ia64/ia64.c (spill_restore_mem): Likewise.
* config/ia64/ia64.md (conditional move spliiter): Avoid emitting
no insns.
* config/m32r/m32r.c (gen_split_move_double): Use get_insns
instead of gen_sequence.
* config/mips/mips.c (embedded_pic_fnaddr_reg): Likewise.
(mips_expand_prologue, mips16_gp_pseudo_reg): Likewise.
* config/sh/sh.c (sh_need_epilogue): Likewise.
* config/sparc/sparc.md (current_function_calls_alloca, flat): New
attributes.
(setjmp pattern and split): Use them to avoid splitter which emits
no RTL.
* genattrtab.c (main): Emit include of function.h
* config/stormy16/stormy16.c (xstormy16_split_cbranch): Use
get_insns instead of gen_sequence.
* config/cris/cris.c (cris_split_movdx): Likewise.
* emit-rtl.c (emit_insns*): Kill.
(try_split): Expect insn list instead of SEQUENCE.
(make_jump_insn_raw, make_call_insn_raw): Fix comments.
(emit_*insn*): Reimplement to work with INSN lists and PATTERNs.
Make them abort if a SEQUENCE is given and RTL checking is
enabled.
(emit_*_scope): Don't forget to set scope on final insn.
(gen_sequence): Move from here...
* ssa.c (gen_sequence): To here as private function.
* builtins.c (expand_builtin_apply_args): Use emit_insn_foo, fix
comments.
(expand_builtin_return, expand_builtin_mathfn): Likewise.
(expand_builtin_strlen): Use get_insns instead of gen_sequence.
(expand_builtin_saveregs): Use emit_insn_foo, fix comments.
(expand_builtin_expect_jump): Use get_insns and fix comments.
* calls.c (try_to_integrate): Use emit_insn_foo.
(expand_call, emit_library_call_value_1): Likewise.
* expr.c (emit_queue): Handle insn lists instead of SEQUENCE.
(emit_move_insn_1): Use get_insns instead of gen_sequence.
(expand_expr): Use emit_insn_foo.
* cfgrtl.c (commit_one_edge_insertion): Use emit_insn_foo.
* except.c (build_post_landing_pads): Likewise.
* flow.c (attempt_auto_inc): Likewise.
* stmt.c (expand_fixup, fixup_gotos, expand_nl_handler_label,
expand_nl_goto_receivers, expand_decl_cleanup): Likewise.
* function.c (fixup_var_refs_insn): Use get_insns instead of
gen_sequence.
(fixup_var_refs_1): Likewise and expect insn list from gen_foo.
(fixup_memory_subreg): Use get_insns instead of gen_sequence.
(fixup_stack_1, purge_addressof_1, expand_main_function,
get_arg_pointer_save_area): Likewise.
(optimize_bit_field, instantiate_virtual_regs_1, assign_parms,
expand_function_end): Use emit_insn_foo.
(record_insns, keep_stack_depressed): Work with insn list instead
of SEQUENCE, fix comments.
* ifcvt.c (noce_emit_store_flag, noce_try_store_flag,
noce_try_store_flag_constants, noce_try_store_flag_inc,
noce_try_store_flag_mask, noce_emit_cmove, noce_try_cmove_arith,
noce_try_minmax, noce_try_abs): Use emit_insn_foo.
(noce_process_if_block): Use get_insns instead of gen_sequence.
* optabs.c (add_equal_note): Work with insn list, fix comments.
(expand_binop): Expect insn list from GEN_FCN(), use emit_insn_foo.
(expand_unop, expand_complex_abs, expand_unop_insn,
expand_no_conflict_block): Likewise.
(gen_move_insn): Use get_insns instead of gen_sequence.
(gen_cond_trap): Likewise.
* integrate.c (copy_rtx_and_substitute): Likewise.
(emit_initial_value_sets): Use emit_insn_foo.
* reload1.c (emit_output_reload_insns, emit_reload_insns): Likewise.
(fixup_abnormal_edges): Avoid losing REG_NOTES more intelligently
now that RTL generators give insn lists.
* sibcall.c (replace_call_placeholder): Use emit_insn_foo.
* doloop.c (doloop_modify, doloop_modify_runtime): Use get_insns
instead of gen_sequence.
(doloop_optimize): Work with insn lists instead of SEQUENCE rtl.
* explow.c (emit_stack_save, emit_stack_restore): Use get_insns
instead of gen_sequence.
* loop.c (move_movables, emit_prefetch_instructions,
gen_add_mult, check_dbra_loop, gen_load_of_final_value):
Likewise.
(loop_regs_update): Work with insn list instead of SEQUENCE rtl.
(product_cheap_p): Likewise, and add commentary about RTL wastage
here.
* lcm.c (optimize_mode_switching): Use get_insns instead of
gen_sequence.
* profile.c (gen_edge_profiler): Likewise.
* regmove.c (copy_src_to_dest): Likewise.
* reg-stack.c (compensate_edge): Likewise and fix comment.
* gcse.c (process_insert_insn): Likewise.
(insert_insn_end_bb): Work with insn list instead of SEQUENCE rtl.
* jump.c (delete_prior_computation): Update comment.
* genemit.c (gen_expand, gen_split, main): Use get_insns instead
of gen_sequence, update comments to match.
* recog.c (peephole2_optimize): Work with insn lists instead of
SEQUENCE rtl.
* sched-vis.c (print_pattern): Abort on SEQUENCE.
* unroll.c (unroll_loop, find_splittable_givs, final_giv_value):
Use get_insns instead of gen_sequence.
(copy_loop_body): Likewise and don't emit dummy NOTE.
* genrecog.c: Don't mention SEQUENCE rtl in comments.
* combine.c (try_combine): Expect insn lists from split generator.
* reorg.c (relax_delay_slots): Emit SEQUENCE into insn list by
hand.
2002-06-11 Roger Sayle <roger@eyesopen.com>
Andreas Jaeger <aj@suse.de>

2
gcc/ada/misc.c
View File

@ -740,7 +740,7 @@ insert_code_for (gnat_node)
do_pending_stack_adjust ();
insns = get_insns ();
end_sequence ();
emit_insns_after (insns, RTL_EXPR_RTL (get_gnu_tree (gnat_node)));
emit_insn_after (insns, RTL_EXPR_RTL (get_gnu_tree (gnat_node)));
}
}

38
gcc/builtins.c
View File

@ -1159,12 +1159,12 @@ expand_builtin_apply_args ()
apply_args_value = temp;
/* Put the sequence after the NOTE that starts the function.
If this is inside a SEQUENCE, make the outer-level insn
/* Put the insns after the NOTE that starts the function.
If this is inside a start_sequence, make the outer-level insn
chain current, so the code is placed at the start of the
function. */
push_topmost_sequence ();
emit_insns_before (seq, NEXT_INSN (get_insns ()));
emit_insn_before (seq, NEXT_INSN (get_insns ()));
pop_topmost_sequence ();
return temp;
}
@ -1393,7 +1393,7 @@ expand_builtin_return (result)
}
/* Put the USE insns before the return. */
emit_insns (call_fusage);
emit_insn (call_fusage);
/* Return whatever values was restored by jumping directly to the end
of the function. */
@ -1581,7 +1581,7 @@ expand_builtin_mathfn (exp, target, subtarget)
/* Output the entire sequence. */
insns = get_insns ();
end_sequence ();
emit_insns (insns);
emit_insn (insns);
return target;
}
@ -1663,7 +1663,7 @@ expand_builtin_strlen (exp, target)
expand_expr (src, src_reg, ptr_mode, EXPAND_SUM));
if (pat != src_reg)
emit_move_insn (src_reg, pat);
pat = gen_sequence ();
pat = get_insns ();
end_sequence ();
if (before_strlen)
@ -2828,11 +2828,11 @@ expand_builtin_saveregs ()
saveregs_value = val;
/* Put the sequence after the NOTE that starts the function. If this
is inside a SEQUENCE, make the outer-level insn chain current, so
/* Put the insns after the NOTE that starts the function. If this
is inside a start_sequence, make the outer-level insn chain current, so
the code is placed at the start of the function. */
push_topmost_sequence ();
emit_insns_after (seq, get_insns ());
emit_insn_after (seq, get_insns ());
pop_topmost_sequence ();
return val;
@ -3513,7 +3513,7 @@ expand_builtin_expect (arglist, target)
/* Like expand_builtin_expect, except do this in a jump context. This is
called from do_jump if the conditional is a __builtin_expect. Return either
a SEQUENCE of insns to emit the jump or NULL if we cannot optimize
a list of insns to emit the jump or NULL if we cannot optimize
__builtin_expect. We need to optimize this at jump time so that machines
like the PowerPC don't turn the test into a SCC operation, and then jump
based on the test being 0/1. */
@ -3534,8 +3534,8 @@ expand_builtin_expect_jump (exp, if_false_label, if_true_label)
if (TREE_CODE (TREE_TYPE (arg1)) == INTEGER_TYPE
&& (integer_zerop (arg1) || integer_onep (arg1)))
{
int j;
int num_jumps = 0;
rtx insn;
/* If we fail to locate an appropriate conditional jump, we'll
fall back to normal evaluation. Ensure that the expression
@ -3556,16 +3556,17 @@ expand_builtin_expect_jump (exp, if_false_label, if_true_label)
/* Expand the jump insns. */
start_sequence ();
do_jump (arg0, if_false_label, if_true_label);
ret = gen_sequence ();
ret = get_insns ();
end_sequence ();
/* Now that the __builtin_expect has been validated, go through and add
the expect's to each of the conditional jumps. If we run into an
error, just give up and generate the 'safe' code of doing a SCC
operation and then doing a branch on that. */
for (j = 0; j < XVECLEN (ret, 0); j++)
insn = ret;
while (insn != NULL_RTX)
{
rtx insn = XVECEXP (ret, 0, j);
rtx next = NEXT_INSN (insn);
rtx pattern;
if (GET_CODE (insn) == JUMP_INSN && any_condjump_p (insn)
@ -3576,7 +3577,7 @@ expand_builtin_expect_jump (exp, if_false_label, if_true_label)
int taken;
if (GET_CODE (ifelse) != IF_THEN_ELSE)
continue;
goto do_next_insn;
if (GET_CODE (XEXP (ifelse, 1)) == LABEL_REF)
{
@ -3603,7 +3604,7 @@ expand_builtin_expect_jump (exp, if_false_label, if_true_label)
label = NULL_RTX;
}
else
continue;
goto do_next_insn;
/* If the test is expected to fail, reverse the
probabilities. */
@ -3617,11 +3618,14 @@ expand_builtin_expect_jump (exp, if_false_label, if_true_label)
else if (label == if_false_label)
taken = 1 - taken;
else if (label != if_true_label)
continue;
goto do_next_insn;
num_jumps++;
predict_insn_def (insn, PRED_BUILTIN_EXPECT, taken);
}
do_next_insn:
insn = next;
}
/* If no jumps were modified, fail and do __builtin_expect the normal

10
gcc/calls.c
View File

@ -1880,7 +1880,7 @@ try_to_integrate (fndecl, actparms, target, ignore, type, structure_value_addr)
NULL_RTX, BITS_PER_UNIT);
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, first_insn);
emit_insn_before (seq, first_insn);
emit_stack_restore (SAVE_BLOCK, old_stack_level, NULL_RTX);
}
}
@ -3078,7 +3078,7 @@ expand_call (exp, target, ignore)
{
insns = get_insns ();
end_sequence ();
emit_insns (insns);
emit_insn (insns);
}
else
{
@ -3132,7 +3132,7 @@ expand_call (exp, target, ignore)
/* Write out the sequence. */
insns = get_insns ();
end_sequence ();
emit_insns (insns);
emit_insn (insns);
valreg = temp;
}
@ -3419,7 +3419,7 @@ expand_call (exp, target, ignore)
tail_recursion_label));
}
else
emit_insns (normal_call_insns);
emit_insn (normal_call_insns);
currently_expanding_call--;
@ -4099,7 +4099,7 @@ emit_library_call_value_1 (retval, orgfun, value, fn_type, outmode, nargs, p)
{
insns = get_insns ();
end_sequence ();
emit_insns (insns);
emit_insn (insns);
}
else
{

4
gcc/cfgrtl.c
View File

@ -1393,11 +1393,11 @@ commit_one_edge_insertion (e, watch_calls)
if (before)
{
emit_insns_before (insns, before);
emit_insn_before (insns, before);
last = prev_nonnote_insn (before);
}
else
last = emit_insns_after (insns, after);
last = emit_insn_after (insns, after);
if (returnjump_p (last))
{

47
gcc/combine.c
View File

@ -2167,30 +2167,23 @@ try_combine (i3, i2, i1, new_direct_jump_p)
}
}
/* If we've split a jump pattern, we'll wind up with a sequence even
with one instruction. We can handle that below, so extract it. */
if (m_split && GET_CODE (m_split) == SEQUENCE
&& XVECLEN (m_split, 0) == 1)
m_split = PATTERN (XVECEXP (m_split, 0, 0));
if (m_split && GET_CODE (m_split) != SEQUENCE)
if (m_split && NEXT_INSN (m_split) == NULL_RTX)
{
m_split = PATTERN (m_split);
insn_code_number = recog_for_combine (&m_split, i3, &new_i3_notes);
if (insn_code_number >= 0)
newpat = m_split;
}
else if (m_split && GET_CODE (m_split) == SEQUENCE
&& XVECLEN (m_split, 0) == 2
else if (m_split && NEXT_INSN (NEXT_INSN (m_split)) == NULL_RTX
&& (next_real_insn (i2) == i3
|| ! use_crosses_set_p (PATTERN (XVECEXP (m_split, 0, 0)),
INSN_CUID (i2))))
|| ! use_crosses_set_p (PATTERN (m_split), INSN_CUID (i2))))
{
rtx i2set, i3set;
rtx newi3pat = PATTERN (XVECEXP (m_split, 0, 1));
newi2pat = PATTERN (XVECEXP (m_split, 0, 0));
rtx newi3pat = PATTERN (NEXT_INSN (m_split));
newi2pat = PATTERN (m_split);
i3set = single_set (XVECEXP (m_split, 0, 1));
i2set = single_set (XVECEXP (m_split, 0, 0));
i3set = single_set (NEXT_INSN (m_split));
i2set = single_set (m_split);
/* In case we changed the mode of I2DEST, replace it in the
pseudo-register table here. We can't do it above in case this
@ -2960,20 +2953,22 @@ find_split_point (loc, insn)
we can make put both sources together and make a split point
in the middle. */
if (seq && XVECLEN (seq, 0) == 2
&& GET_CODE (XVECEXP (seq, 0, 0)) == INSN
&& GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) == SET
&& SET_DEST (PATTERN (XVECEXP (seq, 0, 0))) == reg
if (seq
&& NEXT_INSN (seq) != NULL_RTX
&& NEXT_INSN (NEXT_INSN (seq)) == NULL_RTX
&& GET_CODE (seq) == INSN
&& GET_CODE (PATTERN (seq)) == SET
&& SET_DEST (PATTERN (seq)) == reg
&& ! reg_mentioned_p (reg,
SET_SRC (PATTERN (XVECEXP (seq, 0, 0))))
&& GET_CODE (XVECEXP (seq, 0, 1)) == INSN
&& GET_CODE (PATTERN (XVECEXP (seq, 0, 1))) == SET
&& SET_DEST (PATTERN (XVECEXP (seq, 0, 1))) == reg
SET_SRC (PATTERN (seq)))
&& GET_CODE (NEXT_INSN (seq)) == INSN
&& GET_CODE (PATTERN (NEXT_INSN (seq))) == SET
&& SET_DEST (PATTERN (NEXT_INSN (seq))) == reg
&& memory_address_p (GET_MODE (x),
SET_SRC (PATTERN (XVECEXP (seq, 0, 1)))))
SET_SRC (PATTERN (NEXT_INSN (seq)))))
{
rtx src1 = SET_SRC (PATTERN (XVECEXP (seq, 0, 0)));
rtx src2 = SET_SRC (PATTERN (XVECEXP (seq, 0, 1)));
rtx src1 = SET_SRC (PATTERN (seq));
rtx src2 = SET_SRC (PATTERN (NEXT_INSN (seq)));
/* Replace the placeholder in SRC2 with SRC1. If we can
find where in SRC2 it was placed, that can become our

34
gcc/config/alpha/alpha.c
View File

@ -2519,6 +2519,8 @@ alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p)
switch (GET_CODE (x))
{
case SEQUENCE:
abort ();
case PARALLEL:
for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
alpha_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p,
@ -2553,11 +2555,11 @@ alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p)
}
}
/* Given INSN, which is either an INSN or a SEQUENCE generated to
perform a memory operation, look for any MEMs in either a SET_DEST or
a SET_SRC and copy the in-struct, unchanging, and volatile flags from
REF into each of the MEMs found. If REF is not a MEM, don't do
anything. */
/* Given INSN, which is an INSN list or the PATTERN of a single insn
generated to perform a memory operation, look for any MEMs in either
a SET_DEST or a SET_SRC and copy the in-struct, unchanging, and
volatile flags from REF into each of the MEMs found. If REF is not
a MEM, don't do anything. */
void
alpha_set_memflags (insn, ref)
@ -6873,22 +6875,30 @@ alpha_write_verstamp (file)
static rtx
set_frame_related_p ()
{
rtx seq = gen_sequence ();
rtx seq = get_insns ();
rtx insn;
end_sequence ();
if (GET_CODE (seq) == SEQUENCE)
if (!seq)
return NULL_RTX;
if (INSN_P (seq))
{
int i = XVECLEN (seq, 0);
while (--i >= 0)
RTX_FRAME_RELATED_P (XVECEXP (seq, 0, i)) = 1;
return emit_insn (seq);
insn = seq;
while (insn != NULL_RTX)
{
RTX_FRAME_RELATED_P (insn) = 1;
insn = NEXT_INSN (insn);
}
seq = emit_insn (seq);
}
else
{
seq = emit_insn (seq);
RTX_FRAME_RELATED_P (seq) = 1;
return seq;
}
return seq;
}
#define FRP(exp) (start_sequence (), exp, set_frame_related_p ())

6
gcc/config/alpha/alpha.md
View File

@ -6740,7 +6740,11 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none"
"TARGET_EXPLICIT_RELOCS && TARGET_ABI_OSF
&& prev_nonnote_insn (insn) == operands[0]"
[(const_int 0)]
"DONE;")
"
{
emit_note (NULL, NOTE_INSN_DELETED);
DONE;
}")
(define_insn "*builtin_setjmp_receiver_1"
[(unspec_volatile [(label_ref (match_operand 0 "" ""))] UNSPECV_SETJMPR)]

6
gcc/config/arm/arm.c
View File

@ -2440,7 +2440,7 @@ arm_finalize_pic (prologue)
emit_insn (gen_pic_add_dot_plus_four (pic_offset_table_rtx, l1));
}
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
if (prologue)
emit_insn_after (seq, get_insns ());
@ -4319,7 +4319,7 @@ arm_gen_load_multiple (base_regno, count, from, up, write_back, unchanging_p,
if (write_back)
emit_move_insn (from, plus_constant (from, count * 4 * sign));
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
return seq;
@ -4386,7 +4386,7 @@ arm_gen_store_multiple (base_regno, count, to, up, write_back, unchanging_p,
if (write_back)
emit_move_insn (to, plus_constant (to, count * 4 * sign));
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
return seq;

2
gcc/config/cris/cris.c
View File

@ -2855,7 +2855,7 @@ cris_split_movdx (operands)
else
abort ();
val = gen_sequence ();
val = get_insns ();
end_sequence ();
return val;
}

2
gcc/config/fr30/fr30.c
View File

@ -1095,7 +1095,7 @@ fr30_move_double (operands)
/* This should have been prevented by the constraints on movdi_insn. */
abort ();
val = gen_sequence ();
val = get_insns ();
end_sequence ();
return val;

4
gcc/config/i386/i386.c
View File

@ -8628,7 +8628,7 @@ ix86_expand_int_movcc (operands)
start_sequence ();
compare_op = ix86_expand_compare (code, &second_test, &bypass_test);
compare_seq = gen_sequence ();
compare_seq = get_insns ();
end_sequence ();
compare_code = GET_CODE (compare_op);
@ -9995,7 +9995,7 @@ ix86_expand_movstr (dst, src, count_exp, align_exp)
end_sequence ();
ix86_set_move_mem_attrs (insns, dst, src, destreg, srcreg);
emit_insns (insns);
emit_insn (insns);
return 1;
}

2
gcc/config/ia64/ia64.c
View File

@ -2050,7 +2050,7 @@ spill_restore_mem (reg, cfa_off)
spill_fill_data.init_reg[iter],
disp_rtx));
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
}

7
gcc/config/ia64/ia64.md
View File

@ -4429,11 +4429,15 @@
[(const_int 0)]
{
rtx tmp;
int emitted_something;
emitted_something = 0;
if (! rtx_equal_p (operands[0], operands[2]))
{
tmp = gen_rtx_SET (VOIDmode, operands[0], operands[2]);
tmp = gen_rtx_COND_EXEC (VOIDmode, operands[4], tmp);
emit_insn (tmp);
emitted_something = 1;
}
if (! rtx_equal_p (operands[0], operands[3]))
{
@ -4443,7 +4447,10 @@
gen_rtx_SET (VOIDmode, operands[0],
operands[3]));
emit_insn (tmp);
emitted_something = 1;
}
if (! emitted_something)
emit_note (NULL, NOTE_INSN_DELETED);
DONE;
})

2
gcc/config/m32r/m32r.c
View File

@ -1390,7 +1390,7 @@ gen_split_move_double (operands)
else
abort ();
val = gen_sequence ();
val = get_insns ();
end_sequence ();
return val;
}

6
gcc/config/mips/mips.c
View File

@ -1970,7 +1970,7 @@ embedded_pic_fnaddr_reg ()
start_sequence ();
emit_insn (gen_get_fnaddr (cfun->machine->embedded_pic_fnaddr_rtx,
XEXP (DECL_RTL (current_function_decl), 0)));
seq = gen_sequence ();
seq = get_insn ();
end_sequence ();
push_topmost_sequence ();
emit_insn_after (seq, get_insns ());
@ -7371,7 +7371,7 @@ mips_expand_prologue ()
GEN_INT (gp_offset
- base_offset))),
reg_rtx);
reg_18_save = gen_sequence ();
reg_18_save = get_insns ();
end_sequence ();
}
@ -8343,7 +8343,7 @@ mips16_gp_pseudo_reg ()
start_sequence ();
emit_move_insn (cfun->machine->mips16_gp_pseudo_rtx,
const_gp);
insn = gen_sequence ();
insn = get_insns ();
end_sequence ();
push_topmost_sequence ();

6
gcc/config/sh/sh.c
View File

@ -5034,11 +5034,9 @@ sh_need_epilogue ()
start_sequence ();
sh_expand_epilogue ();
epilogue = gen_sequence ();
epilogue = get_insns ();
end_sequence ();
sh_need_epilogue_known
= (GET_CODE (epilogue) == SEQUENCE && XVECLEN (epilogue, 0) == 0
? -1 : 1);
sh_need_epilogue_known = (epilogue == NULL ? -1 : 1);
}
return sh_need_epilogue_known > 0;
}

35
gcc/config/sparc/sparc.md
View File

@ -113,6 +113,12 @@
(define_attr "pic" "false,true"
(symbol_ref "flag_pic != 0"))
(define_attr "current_function_calls_alloca" "false,true"
(symbol_ref "current_function_calls_alloca != 0"))
(define_attr "flat" "false,true"
(symbol_ref "TARGET_FLAT != 0"))
;; Length (in # of insns).
(define_attr "length" ""
(cond [(eq_attr "type" "uncond_branch,call,sibcall")
@ -8174,8 +8180,10 @@
""
"*
{
if (! current_function_calls_alloca || ! TARGET_V9 || TARGET_FLAT)
return \"#\";
if (! current_function_calls_alloca)
return \"\";
if (! TARGET_V9 || TARGET_FLAT)
return \"\tta\t3\n\";
fputs (\"\tflushw\n\", asm_out_file);
if (flag_pic)
fprintf (asm_out_file, \"\tst%c\t%%l7, [%%sp+%d]\n\",
@ -8190,20 +8198,15 @@
return \"\";
}"
[(set_attr "type" "multi")
(set (attr "length") (if_then_else (eq_attr "pic" "true")
(const_int 4)
(const_int 3)))])
(define_split
[(unspec_volatile [(const_int 0)] UNSPECV_SETJMP)]
"! current_function_calls_alloca || ! TARGET_V9 || TARGET_FLAT"
[(const_int 0)]
"
{
if (current_function_calls_alloca)
emit_insn (gen_flush_register_windows ());
DONE;
}")
(set (attr "length")
(cond [(eq_attr "current_function_calls_alloca" "false")
(const_int 0)
(eq_attr "flat" "true")
(const_int 1)
(eq_attr "isa" "!v9")
(const_int 1)
(eq_attr "pic" "true")
(const_int 4)] (const_int 3)))])
;; Pattern for use after a setjmp to store FP and the return register
;; into the stack area.

15
gcc/config/stormy16/stormy16.c
View File

@ -227,15 +227,22 @@ xstormy16_split_cbranch (mode, label, comparison, dest, carry)
{
rtx op0 = XEXP (comparison, 0);
rtx op1 = XEXP (comparison, 1);
rtx seq;
rtx seq, last_insn;
rtx compare;
start_sequence ();
xstormy16_expand_arith (mode, COMPARE, dest, op0, op1, carry);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
compare = SET_SRC (XVECEXP (PATTERN (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1)),
0, 0));
if (! INSN_P (seq))
abort ();
last_insn = seq;
while (NEXT_INSN (last_insn) != NULL_RTX)
last_insn = NEXT_INSN (last_insn);
compare = SET_SRC (XVECEXP (PATTERN (last_insn), 0, 0));
PUT_CODE (XEXP (compare, 0), GET_CODE (comparison));
XEXP (compare, 1) = gen_rtx_LABEL_REF (VOIDmode, label);
emit_insn (seq);

23
gcc/doloop.c
View File

@ -490,7 +490,7 @@ doloop_modify (loop, iterations, iterations_max,
/* Insert initialization of the count register into the loop header. */
convert_move (counter_reg, count, 1);
sequence = gen_sequence ();
sequence = get_insns ();
end_sequence ();
emit_insn_before (sequence, loop->start);
@ -508,7 +508,7 @@ doloop_modify (loop, iterations, iterations_max,
{
start_sequence ();
emit_insn (init);
sequence = gen_sequence ();
sequence = get_insns ();
end_sequence ();
emit_insn_after (sequence, loop->start);
}
@ -747,7 +747,7 @@ doloop_modify_runtime (loop, iterations_max,
}
}
sequence = gen_sequence ();
sequence = get_insns ();
end_sequence ();
emit_insn_before (sequence, loop->start);
@ -871,18 +871,17 @@ doloop_optimize (loop)
return 0;
}
/* A raw define_insn may yield a plain pattern. If a sequence
was involved, the last must be the jump instruction. */
if (GET_CODE (doloop_seq) == SEQUENCE)
/* If multiple instructions were created, the last must be the
jump instruction. Also, a raw define_insn may yield a plain
pattern. */
doloop_pat = doloop_seq;
if (INSN_P (doloop_pat) && NEXT_INSN (doloop_pat) != NULL_RTX)
{
doloop_pat = XVECEXP (doloop_seq, 0, XVECLEN (doloop_seq, 0) - 1);
if (GET_CODE (doloop_pat) == JUMP_INSN)
doloop_pat = PATTERN (doloop_pat);
else
while (NEXT_INSN (doloop_pat) != NULL_RTX)
doloop_pat = NEXT_INSN (doloop_pat);
if (GET_CODE (doloop_pat) != JUMP_INSN)
doloop_pat = NULL_RTX;
}
else
doloop_pat = doloop_seq;
if (! doloop_pat
|| ! (condition = doloop_condition_get (doloop_pat)))

857
gcc/emit-rtl.c
View File

File diff suppressed because it is too large Load Diff

18
gcc/except.c
View File

@ -1724,7 +1724,7 @@ build_post_landing_pads ()
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, region->u.try.catch->label);
emit_insn_before (seq, region->u.try.catch->label);
break;
case ERT_ALLOWED_EXCEPTIONS:
@ -1748,7 +1748,7 @@ build_post_landing_pads ()
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, region->label);
emit_insn_before (seq, region->label);
break;
case ERT_CLEANUP:
@ -1805,7 +1805,7 @@ connect_post_landing_pads ()
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, region->resume);
emit_insn_before (seq, region->resume);
delete_insn (region->resume);
}
}
@ -1881,7 +1881,7 @@ dw2_build_landing_pads ()
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, region->post_landing_pad);
emit_insn_before (seq, region->post_landing_pad);
}
}
@ -2065,7 +2065,7 @@ sjlj_mark_call_sites (lp_info)
p = get_insns ();
end_sequence ();
emit_insns_before (p, before);
emit_insn_before (p, before);
last_call_site = this_call_site;
}
}
@ -2132,7 +2132,7 @@ sjlj_emit_function_enter (dispatch_label)
if (GET_CODE (fn_begin) == NOTE
&& NOTE_LINE_NUMBER (fn_begin) == NOTE_INSN_FUNCTION_BEG)
break;
emit_insns_after (seq, fn_begin);
emit_insn_after (seq, fn_begin);
}
/* Call back from expand_function_end to know where we should put
@ -2162,7 +2162,7 @@ sjlj_emit_function_exit ()
post-dominates all can_throw_internal instructions. This is
the last possible moment. */
emit_insns_after (seq, cfun->eh->sjlj_exit_after);
emit_insn_after (seq, cfun->eh->sjlj_exit_after);
}
static void
@ -2226,8 +2226,8 @@ sjlj_emit_dispatch_table (dispatch_label, lp_info)
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, (cfun->eh->region_array[first_reachable]
->post_landing_pad));
emit_insn_before (seq, (cfun->eh->region_array[first_reachable]
->post_landing_pad));
}
static void

4
gcc/explow.c
View File

@ -1009,7 +1009,7 @@ emit_stack_save (save_level, psave, after)
if (sa != 0)
sa = validize_mem (sa);
emit_insn (fcn (sa, stack_pointer_rtx));
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
emit_insn_after (seq, after);
}
@ -1070,7 +1070,7 @@ emit_stack_restore (save_level, sa, after)
start_sequence ();
emit_insn (fcn (stack_pointer_rtx, sa));
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
emit_insn_after (seq, after);
}

34
gcc/expr.c
View File

@ -474,13 +474,29 @@ emit_queue ()
{
rtx body = QUEUED_BODY (p);
if (GET_CODE (body) == SEQUENCE)
switch (GET_CODE (body))
{
QUEUED_INSN (p) = XVECEXP (QUEUED_BODY (p), 0, 0);
emit_insn (QUEUED_BODY (p));
case INSN:
case JUMP_INSN:
case CALL_INSN:
case CODE_LABEL:
case BARRIER:
case NOTE:
QUEUED_INSN (p) = body;
emit_insn (body);
break;
#ifdef ENABLE_CHECKING
case SEQUENCE:
abort ();
break;
#endif
default:
QUEUED_INSN (p) = emit_insn (body);
break;
}
else
QUEUED_INSN (p) = emit_insn (QUEUED_BODY (p));
pending_chain = QUEUED_NEXT (p);
}
}
@ -3114,7 +3130,7 @@ emit_move_insn_1 (x, y)
last_insn = emit_move_insn (xpart, ypart);
}
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
/* Show the output dies here. This is necessary for SUBREGs
@ -6719,7 +6735,7 @@ expand_expr (exp, target, tmode, modifier)
{
if (RTL_EXPR_SEQUENCE (exp) == const0_rtx)
abort ();
emit_insns (RTL_EXPR_SEQUENCE (exp));
emit_insn (RTL_EXPR_SEQUENCE (exp));
RTL_EXPR_SEQUENCE (exp) = const0_rtx;
}
preserve_rtl_expr_result (RTL_EXPR_RTL (exp));
@ -8859,7 +8875,7 @@ expand_expr (exp, target, tmode, modifier)
if (GET_CODE (target) != CONCAT)
emit_no_conflict_block (insns, target, op0, op1, NULL_RTX);
else
emit_insns (insns);
emit_insn (insns);
return target;
}
@ -8908,7 +8924,7 @@ expand_expr (exp, target, tmode, modifier)
if (GET_CODE (target) != CONCAT)
emit_no_conflict_block (insns, target, op0, NULL_RTX, NULL_RTX);
else
emit_insns (insns);
emit_insn (insns);
return target;
}

2
gcc/flow.c
View File

@ -3345,7 +3345,7 @@ attempt_auto_inc (pbi, inc, insn, mem, incr, incr_reg)
/* We now know we'll be doing this change, so emit the
new insn(s) and do the updates. */
emit_insns_before (insns, insn);
emit_insn_before (insns, insn);
if (pbi->bb->head == insn)
pbi->bb->head = insns;

138
gcc/function.c
View File

@ -1867,7 +1867,7 @@ fixup_var_refs_insn (insn, var, promoted_mode, unsignedp, toplevel, no_share)
start_sequence ();
convert_move (replacements->new,
replacements->old, unsignedp);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
}
else
@ -1949,7 +1949,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements, no_share)
start_sequence ();
new_insn = emit_insn (gen_rtx_SET (VOIDmode, y, sub));
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
if (recog_memoized (new_insn) < 0)
@ -1960,7 +1960,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements, no_share)
sub = force_operand (sub, y);
if (sub != y)
emit_insn (gen_move_insn (y, sub));
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
}
@ -2390,7 +2390,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements, no_share)
no other function that to do X. */
pat = gen_move_insn (SET_DEST (x), SET_SRC (x));
if (GET_CODE (pat) == SEQUENCE)
if (NEXT_INSN (pat) != NULL_RTX)
{
last = emit_insn_before (pat, insn);
@ -2408,7 +2408,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements, no_share)
delete_insn (last);
}
else
PATTERN (insn) = pat;
PATTERN (insn) = PATTERN (pat);
return;
}
@ -2434,7 +2434,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements, no_share)
return;
pat = gen_move_insn (SET_DEST (x), SET_SRC (x));
if (GET_CODE (pat) == SEQUENCE)
if (NEXT_INSN (pat) != NULL_RTX)
{
last = emit_insn_before (pat, insn);
@ -2452,7 +2452,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements, no_share)
delete_insn (last);
}
else
PATTERN (insn) = pat;
PATTERN (insn) = PATTERN (pat);
return;
}
@ -2543,7 +2543,7 @@ fixup_memory_subreg (x, insn, promoted_mode, uncritical)
rtx mem = SUBREG_REG (x);
rtx addr = XEXP (mem, 0);
enum machine_mode mode = GET_MODE (x);
rtx result;
rtx result, seq;
/* Paradoxical SUBREGs are usually invalid during RTL generation. */
if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (mem)) && ! uncritical)
@ -2563,8 +2563,10 @@ fixup_memory_subreg (x, insn, promoted_mode, uncritical)
start_sequence ();
result = adjust_address (mem, mode, offset);
emit_insn_before (gen_sequence (), insn);
seq = get_insns ();
end_sequence ();
emit_insn_before (seq, insn);
return result;
}
@ -2654,7 +2656,7 @@ fixup_stack_1 (x, insn)
start_sequence ();
temp = copy_to_reg (ad);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
emit_insn_before (seq, insn);
return replace_equiv_address (x, temp);
@ -2765,7 +2767,7 @@ optimize_bit_field (body, insn, equiv_mem)
memref = adjust_address (memref, mode, offset);
insns = get_insns ();
end_sequence ();
emit_insns_before (insns, insn);
emit_insn_before (insns, insn);
/* Store this memory reference where
we found the bit field reference. */
@ -2833,7 +2835,7 @@ optimize_bit_field (body, insn, equiv_mem)
special; just let the optimization be suppressed. */
if (apply_change_group () && seq)
emit_insns_before (seq, insn);
emit_insn_before (seq, insn);
}
}
}
@ -3066,7 +3068,7 @@ purge_addressof_1 (loc, insn, force, store, ht)
&& ! validate_replace_rtx (x, sub, insn))
abort ();
insns = gen_sequence ();
insns = get_insns ();
end_sequence ();
emit_insn_before (insns, insn);
return true;
@ -3177,7 +3179,7 @@ purge_addressof_1 (loc, insn, force, store, ht)
end_sequence ();
goto give_up;
}
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
emit_insn_before (seq, insn);
compute_insns_for_mem (p ? NEXT_INSN (p) : get_insns (),
@ -3191,7 +3193,7 @@ purge_addressof_1 (loc, insn, force, store, ht)
might have created. */
unshare_all_rtl_again (get_insns ());
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
p = emit_insn_after (seq, insn);
if (NEXT_INSN (insn))
@ -3216,7 +3218,7 @@ purge_addressof_1 (loc, insn, force, store, ht)
goto give_up;
}
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
emit_insn_before (seq, insn);
compute_insns_for_mem (p ? NEXT_INSN (p) : get_insns (),
@ -3821,7 +3823,7 @@ instantiate_virtual_regs_1 (loc, object, extra_insns)
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, object);
emit_insn_before (seq, object);
SET_DEST (x) = new;
if (! validate_change (object, &SET_SRC (x), temp, 0)
@ -3933,7 +3935,7 @@ instantiate_virtual_regs_1 (loc, object, extra_insns)
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, object);
emit_insn_before (seq, object);
if (! validate_change (object, loc, temp, 0)
&& ! validate_replace_rtx (x, temp, object))
abort ();
@ -4087,7 +4089,7 @@ instantiate_virtual_regs_1 (loc, object, extra_insns)
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, object);
emit_insn_before (seq, object);
if (! validate_change (object, loc, temp, 0)
&& ! validate_replace_rtx (x, temp, object))
abort ();
@ -5084,7 +5086,7 @@ assign_parms (fndecl)
/* Output all parameter conversion instructions (possibly including calls)
now that all parameters have been copied out of hard registers. */
emit_insns (conversion_insns);
emit_insn (conversion_insns);
last_parm_insn = get_last_insn ();
@ -6422,7 +6424,7 @@ expand_main_function ()
/* Enlist allocate_dynamic_stack_space to pick up the pieces. */
tmp = force_reg (Pmode, const0_rtx);
allocate_dynamic_stack_space (tmp, NULL_RTX, BIGGEST_ALIGNMENT);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
for (tmp = get_last_insn (); tmp; tmp = PREV_INSN (tmp))
@ -6843,7 +6845,7 @@ expand_function_end (filename, line, end_bindings)
end_sequence ();
/* Put those insns at entry to the containing function (this one). */
emit_insns_before (seq, tail_recursion_reentry);
emit_insn_before (seq, tail_recursion_reentry);
}
/* If we are doing stack checking and this function makes calls,
@ -6861,7 +6863,7 @@ expand_function_end (filename, line, end_bindings)
GEN_INT (STACK_CHECK_MAX_FRAME_SIZE));
seq = get_insns ();
end_sequence ();
emit_insns_before (seq, tail_recursion_reentry);
emit_insn_before (seq, tail_recursion_reentry);
break;
}
}
@ -7067,7 +7069,7 @@ expand_function_end (filename, line, end_bindings)
start_sequence ();
clobber_return_register ();
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
after = emit_insn_after (seq, clobber_after);
@ -7113,7 +7115,7 @@ get_arg_pointer_save_area (f)
have to check it and fix it if necessary. */
start_sequence ();
emit_move_insn (validize_mem (ret), virtual_incoming_args_rtx);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
push_topmost_sequence ();
@ -7124,35 +7126,38 @@ get_arg_pointer_save_area (f)
return ret;
}
/* Extend a vector that records the INSN_UIDs of INSNS (either a
sequence or a single insn). */
/* Extend a vector that records the INSN_UIDs of INSNS
(a list of one or more insns). */
static void
record_insns (insns, vecp)
rtx insns;
varray_type *vecp;
{
if (GET_CODE (insns) == SEQUENCE)
{
int len = XVECLEN (insns, 0);
int i = VARRAY_SIZE (*vecp);
int i, len;
rtx tmp;
VARRAY_GROW (*vecp, i + len);
while (--len >= 0)
{
VARRAY_INT (*vecp, i) = INSN_UID (XVECEXP (insns, 0, len));
++i;
}
}
else
tmp = insns;
len = 0;
while (tmp != NULL_RTX)
{
int i = VARRAY_SIZE (*vecp);
VARRAY_GROW (*vecp, i + 1);
VARRAY_INT (*vecp, i) = INSN_UID (insns);
len++;
tmp = NEXT_INSN (tmp);
}
i = VARRAY_SIZE (*vecp);
VARRAY_GROW (*vecp, i + len);
tmp = insns;
while (tmp != NULL_RTX)
{
VARRAY_INT (*vecp, i) = INSN_UID (tmp);
i++;
tmp = NEXT_INSN (tmp);
}
}
/* Determine how many INSN_UIDs in VEC are part of INSN. */
/* Determine how many INSN_UIDs in VEC are part of INSN. Because we can
be running after reorg, SEQUENCE rtl is possible. */
static int
contains (insn, vec)
@ -7264,20 +7269,21 @@ struct epi_info
static void handle_epilogue_set PARAMS ((rtx, struct epi_info *));
static void emit_equiv_load PARAMS ((struct epi_info *));
/* Modify SEQ, a SEQUENCE that is part of the epilogue, to no modifications
to the stack pointer. Return the new sequence. */
/* Modify INSN, a list of one or more insns that is part of the epilogue, to
no modifications to the stack pointer. Return the new list of insns. */
static rtx
keep_stack_depressed (seq)
rtx seq;
keep_stack_depressed (insns)
rtx insns;
{
int i, j;
int j;
struct epi_info info;
rtx insn, next;
/* If the epilogue is just a single instruction, it ust be OK as is. */
if (GET_CODE (seq) != SEQUENCE)
return seq;
if (NEXT_INSN (insns) == NULL_RTX)
return insns;
/* Otherwise, start a sequence, initialize the information we have, and
process all the insns we were given. */
@ -7287,13 +7293,16 @@ keep_stack_depressed (seq)
info.sp_offset = 0;
info.equiv_reg_src = 0;
for (i = 0; i < XVECLEN (seq, 0); i++)
insn = insns;
next = NULL_RTX;
while (insn != NULL_RTX)
{
rtx insn = XVECEXP (seq, 0, i);
next = NEXT_INSN (insn);
if (!INSN_P (insn))
{
add_insn (insn);
insn = next;
continue;
}
@ -7329,6 +7338,7 @@ keep_stack_depressed (seq)
{
emit_equiv_load (&info);
add_insn (insn);
insn = next;
continue;
}
else if (GET_CODE (retaddr) == MEM
@ -7429,11 +7439,13 @@ keep_stack_depressed (seq)
info.sp_equiv_reg = info.new_sp_equiv_reg;
info.sp_offset = info.new_sp_offset;
insn = next;
}
seq = gen_sequence ();
insns = get_insns ();
end_sequence ();
return seq;
return insns;
}
/* SET is a SET from an insn in the epilogue. P is a pointer to the epi_info
@ -7548,12 +7560,10 @@ thread_prologue_and_epilogue_insns (f)
emit_insn (seq);
/* Retain a map of the prologue insns. */
if (GET_CODE (seq) != SEQUENCE)
seq = get_insns ();
record_insns (seq, &prologue);
prologue_end = emit_note (NULL, NOTE_INSN_PROLOGUE_END);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
/* Can't deal with multiple successors of the entry block
@ -7712,11 +7722,9 @@ thread_prologue_and_epilogue_insns (f)
emit_jump_insn (seq);
/* Retain a map of the epilogue insns. */
if (GET_CODE (seq) != SEQUENCE)
seq = get_insns ();
record_insns (seq, &epilogue);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
insert_insn_on_edge (seq, e);
@ -7745,13 +7753,13 @@ epilogue_done:
seq = gen_sibcall_epilogue ();
end_sequence ();
/* Retain a map of the epilogue insns. Used in life analysis to
avoid getting rid of sibcall epilogue insns. Do this before we
actually emit the sequence. */
record_insns (seq, &sibcall_epilogue);
i = PREV_INSN (insn);
newinsn = emit_insn_before (seq, insn);
/* Retain a map of the epilogue insns. Used in life analysis to
avoid getting rid of sibcall epilogue insns. */
record_insns (GET_CODE (seq) == SEQUENCE
? seq : newinsn, &sibcall_epilogue);
}
#endif

35
gcc/gcse.c
View File

@ -4819,7 +4819,7 @@ process_insert_insn (expr)
else if (insn_invalid_p (emit_insn (gen_rtx_SET (VOIDmode, reg, exp))))
abort ();
pat = gen_sequence ();
pat = get_insns ();
end_sequence ();
return pat;
@ -4843,10 +4843,15 @@ insert_insn_end_bb (expr, bb, pre)
rtx new_insn;
rtx reg = expr->reaching_reg;
int regno = REGNO (reg);
rtx pat;
int i;
rtx pat, pat_end;
pat = process_insert_insn (expr);
if (pat == NULL_RTX || ! INSN_P (pat))
abort ();
pat_end = pat;
while (NEXT_INSN (pat_end) != NULL_RTX)
pat_end = NEXT_INSN (pat_end);
/* If the last insn is a jump, insert EXPR in front [taking care to
handle cc0, etc. properly]. Similary we need to care trapping
@ -4934,26 +4939,16 @@ insert_insn_end_bb (expr, bb, pre)
else
new_insn = emit_insn_after (pat, insn);
/* Keep block number table up to date.
Note, PAT could be a multiple insn sequence, we have to make
sure that each insn in the sequence is handled. */
if (GET_CODE (pat) == SEQUENCE)
while (1)
{
for (i = 0; i < XVECLEN (pat, 0); i++)
if (INSN_P (pat))
{
rtx insn = XVECEXP (pat, 0, i);
if (INSN_P (insn))
add_label_notes (PATTERN (insn), new_insn);
note_stores (PATTERN (insn), record_set_info, insn);
add_label_notes (PATTERN (pat), new_insn);
note_stores (PATTERN (pat), record_set_info, pat);
}
}
else
{
add_label_notes (pat, new_insn);
/* Keep register set table up to date. */
record_one_set (regno, new_insn);
if (pat == pat_end)
break;
pat = NEXT_INSN (pat);
}
gcse_create_count++;

1
gcc/genattrtab.c
View File

@ -6183,6 +6183,7 @@ from the machine description file `md'. */\n\n");
printf ("#include \"insn-attr.h\"\n");
printf ("#include \"toplev.h\"\n");
printf ("#include \"flags.h\"\n");
printf ("#include \"function.h\"\n");
printf ("\n");
printf ("#define operands recog_data.operand\n\n");

12
gcc/genemit.c
View File

@ -555,15 +555,15 @@ gen_expand (expand)
printf (" emit_barrier ();");
}
/* Call `gen_sequence' to make a SEQUENCE out of all the
/* Call `get_insns' to extract the list of all the
insns emitted within this gen_... function. */
printf (" _val = gen_sequence ();\n");
printf (" _val = get_insns ();\n");
printf (" end_sequence ();\n");
printf (" return _val;\n}\n\n");
}
/* Like gen_expand, but generates a SEQUENCE. */
/* Like gen_expand, but generates insns resulting from splitting SPLIT. */
static void
gen_split (split)
@ -667,10 +667,10 @@ gen_split (split)
printf (" emit_barrier ();");
}
/* Call `gen_sequence' to make a SEQUENCE out of all the
/* Call `get_insns' to make a list of all the
insns emitted within this gen_... function. */
printf (" _val = gen_sequence ();\n");
printf (" _val = get_insns ();\n");
printf (" end_sequence ();\n");
printf (" return _val;\n}\n\n");
@ -841,7 +841,7 @@ from the machine description file `md'. */\n\n");
printf ("#include \"toplev.h\"\n");
printf ("#include \"ggc.h\"\n\n");
printf ("#define FAIL return (end_sequence (), _val)\n");
printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n\n");
printf ("#define DONE return (_val = get_insns (), end_sequence (), _val)\n\n");
/* Read the machine description. */

8
gcc/genrecog.c
View File

@ -43,11 +43,11 @@
This program also generates the function `split_insns', which
returns 0 if the rtl could not be split, or it returns the split
rtl in a SEQUENCE.
rtl as an INSN list.
This program also generates the function `peephole2_insns', which
returns 0 if the rtl could not be matched. If there was a match,
the new rtl is returned in a SEQUENCE, and LAST_INSN will point
the new rtl is returned in an INSN list, and LAST_INSN will point
to the last recognized insn in the old sequence. */
#include "hconfig.h"
@ -2431,10 +2431,10 @@ write_header ()
puts ("\n\
The function split_insns returns 0 if the rtl could not\n\
be split or the split rtl in a SEQUENCE if it can be.\n\
be split or the split rtl as an INSN list if it can be.\n\
\n\
The function peephole2_insns returns 0 if the rtl could not\n\
be matched. If there was a match, the new rtl is returned in a SEQUENCE,\n\
be matched. If there was a match, the new rtl is returned in an INSN list,\n\
and LAST_INSN will point to the last recognized insn in the old sequence.\n\
*/\n\n");
}

28
gcc/ifcvt.c
View File

@ -532,7 +532,7 @@ noce_emit_store_flag (if_info, x, reversep, normalize)
{
tmp = get_insns ();
end_sequence ();
emit_insns (tmp);
emit_insn (tmp);
if_info->cond_earliest = if_info->jump;
@ -612,7 +612,7 @@ noce_try_store_flag (if_info)
seq = get_insns ();
end_sequence ();
emit_insns_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
emit_insn_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
return TRUE;
}
@ -747,7 +747,7 @@ noce_try_store_flag_constants (if_info)
if (seq_contains_jump (seq))
return FALSE;
emit_insns_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
emit_insn_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
return TRUE;
}
@ -807,8 +807,8 @@ noce_try_store_flag_inc (if_info)
if (seq_contains_jump (seq))
return FALSE;
emit_insns_before_scope (seq, if_info->jump,
INSN_SCOPE (if_info->insn_a));
emit_insn_before_scope (seq, if_info->jump,
INSN_SCOPE (if_info->insn_a));
return TRUE;
}
@ -860,8 +860,8 @@ noce_try_store_flag_mask (if_info)
if (seq_contains_jump (seq))
return FALSE;
emit_insns_before_scope (seq, if_info->jump,
INSN_SCOPE (if_info->insn_a));
emit_insn_before_scope (seq, if_info->jump,
INSN_SCOPE (if_info->insn_a));
return TRUE;
}
@ -900,7 +900,7 @@ noce_emit_cmove (if_info, x, code, cmp_a, cmp_b, vfalse, vtrue)
{
tmp = get_insns ();
end_sequence ();
emit_insns (tmp);
emit_insn (tmp);
return x;
}
@ -956,8 +956,8 @@ noce_try_cmove (if_info)
seq = get_insns ();
end_sequence ();
emit_insns_before_scope (seq, if_info->jump,
INSN_SCOPE (if_info->insn_a));
emit_insn_before_scope (seq, if_info->jump,
INSN_SCOPE (if_info->insn_a));
return TRUE;
}
else
@ -1119,7 +1119,7 @@ noce_try_cmove_arith (if_info)
tmp = get_insns ();
end_sequence ();
emit_insns_before_scope (tmp, if_info->jump, INSN_SCOPE (if_info->insn_a));
emit_insn_before_scope (tmp, if_info->jump, INSN_SCOPE (if_info->insn_a));
return TRUE;
end_seq_and_fail:
@ -1371,7 +1371,7 @@ noce_try_minmax (if_info)
if (seq_contains_jump (seq))
return FALSE;
emit_insns_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
emit_insn_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
if_info->cond = cond;
if_info->cond_earliest = earliest;
@ -1489,7 +1489,7 @@ noce_try_abs (if_info)
if (seq_contains_jump (seq))
return FALSE;
emit_insns_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
emit_insn_before_scope (seq, if_info->jump, INSN_SCOPE (if_info->insn_a));
if_info->cond = cond;
if_info->cond_earliest = earliest;
@ -1758,7 +1758,7 @@ noce_process_if_block (test_bb, then_bb, else_bb, join_bb)
{
start_sequence ();
noce_emit_move_insn (copy_rtx (orig_x), x);
insn_b = gen_sequence ();
insn_b = get_insns ();
end_sequence ();
emit_insn_after_scope (insn_b, test_bb->end, INSN_SCOPE (insn_a));

6
gcc/integrate.c
View File

@ -1942,7 +1942,7 @@ copy_rtx_and_substitute (orig, map, for_lhs)
SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
emit_insn_after (seq, map->insns_at_start);
return temp;
@ -1975,7 +1975,7 @@ copy_rtx_and_substitute (orig, map, for_lhs)
SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
emit_insn_after (seq, map->insns_at_start);
return temp;
@ -3128,7 +3128,7 @@ emit_initial_value_sets ()
seq = get_insns ();
end_sequence ();
emit_insns_after (seq, get_insns ());
emit_insn_after (seq, get_insns ());
}
/* If the backend knows where to allocate pseudos for hard

4
gcc/jump.c
View File

@ -1540,7 +1540,9 @@ delete_prior_computation (note, insn)
break;
/* If we reach a SEQUENCE, it is too complex to try to
do anything with it, so give up. */
do anything with it, so give up. We can be run during
and after reorg, so SEQUENCE rtl can legitimately show
up here. */
if (GET_CODE (pat) == SEQUENCE)
break;

10
gcc/lcm.c
View File

@ -1228,12 +1228,11 @@ optimize_mode_switching (file)
start_sequence ();
EMIT_MODE_SET (entity_map[j], mode, live_at_edge);
mode_set = gen_sequence ();
mode_set = get_insns ();
end_sequence ();
/* Do not bother to insert empty sequence. */
if (GET_CODE (mode_set) == SEQUENCE
&& !XVECLEN (mode_set, 0))
if (mode_set == NULL_RTX)
continue;
/* If this is an abnormal edge, we'll insert at the end
@ -1298,12 +1297,11 @@ optimize_mode_switching (file)
start_sequence ();
EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live);
mode_set = gen_sequence ();
mode_set = get_insns ();
end_sequence ();
/* Do not bother to insert empty sequence. */
if (GET_CODE (mode_set) == SEQUENCE
&& !XVECLEN (mode_set, 0))
if (mode_set == NULL_RTX)
continue;
emited = true;

99
gcc/loop.c
View File

@ -1949,11 +1949,10 @@ move_movables (loop, movables, threshold, insn_count)
start_sequence ();
emit_move_insn (m->set_dest, m->set_src);
temp = get_insns ();
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
add_label_notes (m->set_src, temp);
add_label_notes (m->set_src, seq);
i1 = loop_insn_hoist (loop, seq);
if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
@ -2088,7 +2087,7 @@ move_movables (loop, movables, threshold, insn_count)
abort ();
if (tem != reg)
emit_move_insn (reg, tem);
sequence = gen_sequence ();
sequence = get_insns ();
end_sequence ();
i1 = loop_insn_hoist (loop, sequence);
}
@ -2109,11 +2108,10 @@ move_movables (loop, movables, threshold, insn_count)
use the REG_EQUAL note. */
start_sequence ();
emit_move_insn (m->set_dest, m->set_src);
temp = get_insns ();
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
add_label_notes (m->set_src, temp);
add_label_notes (m->set_src, seq);
i1 = loop_insn_hoist (loop, seq);
if (! find_reg_note (i1, REG_EQUAL, NULL_RTX))
@ -4154,7 +4152,7 @@ emit_prefetch_instructions (loop)
loc = force_reg (Pmode, loc);
emit_insn (gen_prefetch (loc, GEN_INT (info[i].write),
GEN_INT (3)));
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
emit_insn_before (seq, before_insn);
@ -7735,7 +7733,7 @@ gen_add_mult (b, m, a, reg)
result = expand_mult_add (b, reg, m, a, GET_MODE (reg), 1);
if (reg != result)
emit_move_insn (reg, result);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
return seq;
@ -7749,24 +7747,29 @@ loop_regs_update (loop, seq)
const struct loop *loop ATTRIBUTE_UNUSED;
rtx seq;
{
rtx insn;
/* Update register info for alias analysis. */
if (GET_CODE (seq) == SEQUENCE)
if (seq == NULL_RTX)
return;
if (INSN_P (seq))
{
int i;
for (i = 0; i < XVECLEN (seq, 0); ++i)
insn = seq;
while (insn != NULL_RTX)
{
rtx set = single_set (XVECEXP (seq, 0, i));
rtx set = single_set (insn);
if (set && GET_CODE (SET_DEST (set)) == REG)
record_base_value (REGNO (SET_DEST (set)), SET_SRC (set), 0);
insn = NEXT_INSN (insn);
}
}
else
{
if (GET_CODE (seq) == SET
&& GET_CODE (SET_DEST (seq)) == REG)
record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
}
else if (GET_CODE (seq) == SET
&& GET_CODE (SET_DEST (seq)) == REG)
record_base_value (REGNO (SET_DEST (seq)), SET_SRC (seq), 0);
}
@ -7889,16 +7892,20 @@ iv_add_mult_cost (b, m, a, reg)
}
/* Test whether A * B can be computed without
an actual multiply insn. Value is 1 if so. */
an actual multiply insn. Value is 1 if so.
??? This function stinks because it generates a ton of wasted RTL
??? and as a result fragments GC memory to no end. There are other
??? places in the compiler which are invoked a lot and do the same
??? thing, generate wasted RTL just to see if something is possible. */
static int
product_cheap_p (a, b)
rtx a;
rtx b;
{
int i;
rtx tmp;
int win = 1;
int win, n_insns;
/* If only one is constant, make it B. */
if (GET_CODE (a) == CONST_INT)
@ -7918,31 +7925,31 @@ product_cheap_p (a, b)
start_sequence ();
expand_mult (GET_MODE (a), a, b, NULL_RTX, 1);
tmp = gen_sequence ();
tmp = get_insns ();
end_sequence ();
if (GET_CODE (tmp) == SEQUENCE)
win = 1;
if (INSN_P (tmp))
{
if (XVEC (tmp, 0) == 0)
win = 1;
else if (XVECLEN (tmp, 0) > 3)
win = 0;
else
for (i = 0; i < XVECLEN (tmp, 0); i++)
{
rtx insn = XVECEXP (tmp, 0, i);
n_insns = 0;
while (tmp != NULL_RTX)
{
rtx next = NEXT_INSN (tmp);
if (GET_CODE (insn) != INSN
|| (GET_CODE (PATTERN (insn)) == SET
&& GET_CODE (SET_SRC (PATTERN (insn))) == MULT)
|| (GET_CODE (PATTERN (insn)) == PARALLEL
&& GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET
&& GET_CODE (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))) == MULT))
{
win = 0;
break;
}
}
if (++n_insns > 3
|| GET_CODE (tmp) != INSN
|| (GET_CODE (PATTERN (tmp)) == SET
&& GET_CODE (SET_SRC (PATTERN (tmp))) == MULT)
|| (GET_CODE (PATTERN (tmp)) == PARALLEL
&& GET_CODE (XVECEXP (PATTERN (tmp), 0, 0)) == SET
&& GET_CODE (SET_SRC (XVECEXP (PATTERN (tmp), 0, 0))) == MULT))
{
win = 0;
break;
}
tmp = next;
}
}
else if (GET_CODE (tmp) == SET
&& GET_CODE (SET_SRC (tmp)) == MULT)
@ -8433,7 +8440,7 @@ check_dbra_loop (loop, insn_count)
create a sequence to hold all the insns from expand_inc. */
start_sequence ();
expand_inc (reg, new_add_val);
tem = gen_sequence ();
tem = get_insns ();
end_sequence ();
p = loop_insn_emit_before (loop, 0, bl->biv->insn, tem);
@ -8474,7 +8481,7 @@ check_dbra_loop (loop, insn_count)
emit_cmp_and_jump_insns (reg, const0_rtx, cmp_code, NULL_RTX,
GET_MODE (reg), 0,
XEXP (jump_label, 0));
tem = gen_sequence ();
tem = get_insns ();
end_sequence ();
emit_jump_insn_before (tem, loop_end);
@ -10492,7 +10499,7 @@ gen_load_of_final_value (reg, final_value)
final_value = force_operand (final_value, reg);
if (final_value != reg)
emit_move_insn (reg, final_value);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
return seq;
}

84
gcc/optabs.c
View File

@ -121,7 +121,7 @@ static void emit_cmp_and_jump_insn_1 PARAMS ((rtx, rtx, enum machine_mode,
static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *,
enum machine_mode *, int *));
/* Add a REG_EQUAL note to the last insn in SEQ. TARGET is being set to
/* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
the result of operation CODE applied to OP0 (and OP1 if it is a binary
operation).
@ -132,43 +132,65 @@ static void prepare_float_lib_cmp PARAMS ((rtx *, rtx *, enum rtx_code *,
again, ensuring that TARGET is not one of the operands. */
static int
add_equal_note (seq, target, code, op0, op1)
rtx seq;
add_equal_note (insns, target, code, op0, op1)
rtx insns;
rtx target;
enum rtx_code code;
rtx op0, op1;
{
rtx set;
int i;
rtx last_insn, insn, set;
rtx note;
if ((GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
&& GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
|| GET_CODE (seq) != SEQUENCE
|| (set = single_set (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1))) == 0
|| GET_CODE (target) == ZERO_EXTRACT
|| (! rtx_equal_p (SET_DEST (set), target)
/* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
SUBREG. */
&& (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
|| ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
target))))
if (! insns
|| ! INSN_P (insns)
|| NEXT_INSN (insns) == NULL_RTX)
abort ();
if (GET_RTX_CLASS (code) != '1' && GET_RTX_CLASS (code) != '2'
&& GET_RTX_CLASS (code) != 'c' && GET_RTX_CLASS (code) != '<')
return 1;
if (GET_CODE (target) == ZERO_EXTRACT)
return 1;
for (last_insn = insns;
NEXT_INSN (last_insn) != NULL_RTX;
last_insn = NEXT_INSN (last_insn))
;
set = single_set (last_insn);
if (set == NULL_RTX)
return 1;
if (! rtx_equal_p (SET_DEST (set), target)
/* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside the
SUBREG. */
&& (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
|| ! rtx_equal_p (SUBREG_REG (XEXP (SET_DEST (set), 0)),
target)))
return 1;
/* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
besides the last insn. */
if (reg_overlap_mentioned_p (target, op0)
|| (op1 && reg_overlap_mentioned_p (target, op1)))
for (i = XVECLEN (seq, 0) - 2; i >= 0; i--)
if (reg_set_p (target, XVECEXP (seq, 0, i)))
return 0;
{
insn = PREV_INSN (last_insn);
while (insn != NULL_RTX)
{
if (reg_set_p (target, insn))
return 0;
insn = PREV_INSN (insn);
}
}
if (GET_RTX_CLASS (code) == '1')
note = gen_rtx_fmt_e (code, GET_MODE (target), copy_rtx (op0));
else
note = gen_rtx_fmt_ee (code, GET_MODE (target), copy_rtx (op0), copy_rtx (op1));
set_unique_reg_note (XVECEXP (seq, 0, XVECLEN (seq, 0) - 1), REG_EQUAL, note);
set_unique_reg_note (last_insn, REG_EQUAL, note);
return 1;
}
@ -817,10 +839,10 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
pat = GEN_FCN (icode) (temp, xop0, xop1);
if (pat)
{
/* If PAT is a multi-insn sequence, try to add an appropriate
/* If PAT is composed of more than one insn, try to add an appropriate
REG_EQUAL note to it. If we can't because TEMP conflicts with an
operand, call ourselves again, this time without a target. */
if (GET_CODE (pat) == SEQUENCE
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& ! add_equal_note (pat, temp, binoptab->code, xop0, xop1))
{
delete_insns_since (last);
@ -1195,7 +1217,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods)
if (shift_count != BITS_PER_WORD)
emit_no_conflict_block (insns, target, op0, op1, equiv_value);
else
emit_insns (insns);
emit_insn (insns);
return target;
@ -2146,7 +2168,7 @@ expand_unop (mode, unoptab, op0, target, unsignedp)
pat = GEN_FCN (icode) (temp, xop0);
if (pat)
{
if (GET_CODE (pat) == SEQUENCE
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& ! add_equal_note (pat, temp, unoptab->code, xop0, NULL_RTX))
{
delete_insns_since (last);
@ -2538,7 +2560,7 @@ expand_complex_abs (mode, op0, target, unsignedp)
pat = GEN_FCN (icode) (temp, xop0);
if (pat)
{
if (GET_CODE (pat) == SEQUENCE
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX
&& ! add_equal_note (pat, temp, this_abs_optab->code, xop0,
NULL_RTX))
{
@ -2707,7 +2729,7 @@ emit_unop_insn (icode, target, op0, code)
pat = GEN_FCN (icode) (temp, op0);
if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN)
if (INSN_P (pat) && NEXT_INSN (pat) != NULL_RTX && code != UNKNOWN)
add_equal_note (pat, temp, code, op0, NULL_RTX);
emit_insn (pat);
@ -2754,12 +2776,12 @@ emit_no_conflict_block (insns, target, op0, op1, equiv)
rtx prev, next, first, last, insn;
if (GET_CODE (target) != REG || reload_in_progress)
return emit_insns (insns);
return emit_insn (insns);
else
for (insn = insns; insn; insn = NEXT_INSN (insn))
if (GET_CODE (insn) != INSN
|| find_reg_note (insn, REG_LIBCALL, NULL_RTX))
return emit_insns (insns);
return emit_insn (insns);
/* First emit all insns that do not store into words of the output and remove
these from the list. */
@ -4082,7 +4104,7 @@ have_sub2_insn (x, y)
}
/* Generate the body of an instruction to copy Y into X.
It may be a SEQUENCE, if one insn isn't enough. */
It may be a list of insns, if one insn isn't enough. */
rtx
gen_move_insn (x, y)
@ -4153,7 +4175,7 @@ gen_move_insn (x, y)
start_sequence ();
emit_move_insn_1 (x, y);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
return seq;
}
@ -5260,7 +5282,7 @@ gen_cond_trap (code, op1, op2, tcode)
if (insn)
{
emit_insn (insn);
insn = gen_sequence ();
insn = get_insns ();
}
end_sequence();
return insn;

2
gcc/profile.c
View File

@ -1295,7 +1295,7 @@ gen_edge_profiler (edgeno)
if (tmp != mem_ref)
emit_move_insn (copy_rtx (mem_ref), tmp);
sequence = gen_sequence ();
sequence = get_insns ();
end_sequence ();
return sequence;
}

25
gcc/recog.c
View File

@ -3065,7 +3065,7 @@ peephole2_optimize (dump_file)
cfg-related call notes. */
for (i = 0; i <= match_len; ++i)
{
int j, k;
int j;
rtx old_insn, new_insn, note;
j = i + peep2_current;
@ -3076,20 +3076,15 @@ peephole2_optimize (dump_file)
continue;
was_call = true;
new_insn = NULL_RTX;
if (GET_CODE (try) == SEQUENCE)
for (k = XVECLEN (try, 0) - 1; k >= 0; k--)
{
rtx x = XVECEXP (try, 0, k);
if (GET_CODE (x) == CALL_INSN)
{
new_insn = x;
break;
}
}
else if (GET_CODE (try) == CALL_INSN)
new_insn = try;
if (! new_insn)
new_insn = try;
while (new_insn != NULL_RTX)
{
if (GET_CODE (new_insn) == CALL_INSN)
break;
new_insn = NEXT_INSN (new_insn);
}
if (new_insn == NULL_RTX)
abort ();
CALL_INSN_FUNCTION_USAGE (new_insn)

7
gcc/reg-stack.c
View File

@ -2587,16 +2587,13 @@ compensate_edge (e, file)
current_block = NULL;
start_sequence ();
/* ??? change_stack needs some point to emit insns after.
Also needed to keep gen_sequence from returning a
pattern as opposed to a sequence, which would lose
REG_DEAD notes. */
/* ??? change_stack needs some point to emit insns after. */
after = emit_note (NULL, NOTE_INSN_DELETED);
tmpstack = regstack;
change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
insert_insn_on_edge (seq, e);

2
gcc/regmove.c
View File

@ -775,7 +775,7 @@ copy_src_to_dest (insn, src, dest, old_max_uid)
/* Generate the src->dest move. */
start_sequence ();
emit_move_insn (dest, src);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
/* If this sequence uses new registers, we may not use it. */
if (old_num_regs != reg_rtx_no

35
gcc/reload1.c
View File

@ -6822,7 +6822,7 @@ emit_output_reload_insns (chain, rl, j)
if (rl->when_needed == RELOAD_OTHER)
{
emit_insns (other_output_reload_insns[rl->opnum]);
emit_insn (other_output_reload_insns[rl->opnum]);
other_output_reload_insns[rl->opnum] = get_insns ();
}
else
@ -7038,25 +7038,25 @@ emit_reload_insns (chain)
reloads for the operand. The RELOAD_OTHER output reloads are
output in descending order by reload number. */
emit_insns_before (other_input_address_reload_insns, insn);
emit_insns_before (other_input_reload_insns, insn);
emit_insn_before (other_input_address_reload_insns, insn);
emit_insn_before (other_input_reload_insns, insn);
for (j = 0; j < reload_n_operands; j++)
{
emit_insns_before (inpaddr_address_reload_insns[j], insn);
emit_insns_before (input_address_reload_insns[j], insn);
emit_insns_before (input_reload_insns[j], insn);
emit_insn_before (inpaddr_address_reload_insns[j], insn);
emit_insn_before (input_address_reload_insns[j], insn);
emit_insn_before (input_reload_insns[j], insn);
}
emit_insns_before (other_operand_reload_insns, insn);
emit_insns_before (operand_reload_insns, insn);
emit_insn_before (other_operand_reload_insns, insn);
emit_insn_before (operand_reload_insns, insn);
for (j = 0; j < reload_n_operands; j++)
{
rtx x = emit_insns_after (outaddr_address_reload_insns[j], insn);
x = emit_insns_after (output_address_reload_insns[j], x);
x = emit_insns_after (output_reload_insns[j], x);
emit_insns_after (other_output_reload_insns[j], x);
rtx x = emit_insn_after (outaddr_address_reload_insns[j], insn);
x = emit_insn_after (output_address_reload_insns[j], x);
x = emit_insn_after (output_reload_insns[j], x);
emit_insn_after (other_output_reload_insns[j], x);
}
/* For all the spill regs newly reloaded in this instruction,
@ -9465,19 +9465,14 @@ fixup_abnormal_edges ()
next = NEXT_INSN (insn);
if (INSN_P (insn))
{
rtx seq;
delete_insn (insn);
/* We're not deleting it, we're moving it. */
INSN_DELETED_P (insn) = 0;
PREV_INSN (insn) = NULL_RTX;
NEXT_INSN (insn) = NULL_RTX;
/* Emit a sequence, rather than scarfing the pattern, so
that we don't lose REG_NOTES etc. */
/* ??? Could copy the test from gen_sequence, but don't
think it's worth the bother. */
seq = gen_rtx_SEQUENCE (VOIDmode, gen_rtvec (1, insn));
insert_insn_on_edge (seq, e);
insert_insn_on_edge (insn, e);
}
insn = next;
}

22
gcc/reorg.c
View File

@ -3240,6 +3240,7 @@ relax_delay_slots (first)
&& GET_CODE (next) == JUMP_INSN
&& GET_CODE (PATTERN (next)) == RETURN)
{
rtx after;
int i;
/* Delete the RETURN and just execute the delay list insns.
@ -3256,7 +3257,15 @@ relax_delay_slots (first)
trial = PREV_INSN (insn);
delete_related_insns (insn);
emit_insn_after (pat, trial);
if (GET_CODE (pat) != SEQUENCE)
abort ();
after = trial;
for (i = 0; i < XVECLEN (pat, 0); i++)
{
rtx this_insn = XVECEXP (pat, 0, i);
add_insn_after (this_insn, after);
after = this_insn;
}
delete_scheduled_jump (delay_insn);
continue;
}
@ -3352,6 +3361,7 @@ relax_delay_slots (first)
#endif
)
{
rtx after;
int i;
/* All this insn does is execute its delay list and jump to the
@ -3370,7 +3380,15 @@ relax_delay_slots (first)
trial = PREV_INSN (insn);
delete_related_insns (insn);
emit_insn_after (pat, trial);
if (GET_CODE (pat) != SEQUENCE)
abort ();
after = trial;
for (i = 0; i < XVECLEN (pat, 0); i++)
{
rtx this_insn = XVECEXP (pat, 0, i);
add_insn_after (this_insn, after);
after = this_insn;
}
delete_scheduled_jump (delay_insn);
continue;
}

6
gcc/rtl.h
View File

@ -1349,7 +1349,6 @@ extern void push_to_sequence PARAMS ((rtx));
extern void end_sequence PARAMS ((void));
extern void push_to_full_sequence PARAMS ((rtx, rtx));
extern void end_full_sequence PARAMS ((rtx*, rtx*));
extern rtx gen_sequence PARAMS ((void));
/* In varasm.c */
extern rtx immed_double_const PARAMS ((HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode));
@ -1394,11 +1393,6 @@ extern rtx emit_label_after PARAMS ((rtx, rtx));
extern rtx emit_note_after PARAMS ((int, rtx));
extern rtx emit_line_note_after PARAMS ((const char *, int, rtx));
extern rtx emit_insn PARAMS ((rtx));
extern rtx emit_insns PARAMS ((rtx));
extern rtx emit_insns_before PARAMS ((rtx, rtx));
extern rtx emit_insns_before_scope PARAMS ((rtx, rtx, tree));
extern rtx emit_insns_after PARAMS ((rtx, rtx));
extern rtx emit_insns_after_scope PARAMS ((rtx, rtx, tree));
extern rtx emit_jump_insn PARAMS ((rtx));
extern rtx emit_call_insn PARAMS ((rtx));
extern rtx emit_label PARAMS ((rtx));

14
gcc/sched-vis.c
View File

@ -702,18 +702,8 @@ print_pattern (buf, x, verbose)
}
break;
case SEQUENCE:
{
int i;
sprintf (t1, "%%{");
for (i = 0; i < XVECLEN (x, 0); i++)
{
print_insn (t2, XVECEXP (x, 0, i), verbose);
sprintf (t3, "%s%s;", t1, t2);
strcpy (t1, t3);
}
sprintf (buf, "%s%%}", t1);
}
/* Should never see SEQUENCE codes until after reorg. */
abort ();
break;
case ASM_INPUT:
sprintf (buf, "asm {%s}", XSTR (x, 0));

6
gcc/sibcall.c
View File

@ -541,11 +541,11 @@ replace_call_placeholder (insn, use)
sibcall_use_t use;
{
if (use == sibcall_use_tail_recursion)
emit_insns_before (XEXP (PATTERN (insn), 2), insn);
emit_insn_before (XEXP (PATTERN (insn), 2), insn);
else if (use == sibcall_use_sibcall)
emit_insns_before (XEXP (PATTERN (insn), 1), insn);
emit_insn_before (XEXP (PATTERN (insn), 1), insn);
else if (use == sibcall_use_normal)
emit_insns_before (XEXP (PATTERN (insn), 0), insn);
emit_insn_before (XEXP (PATTERN (insn), 0), insn);
else
abort ();

26
gcc/ssa.c
View File

@ -124,6 +124,8 @@ struct ssa_rename_from_hash_table_data {
partition reg_partition;
};
static rtx gen_sequence
PARAMS ((void));
static void ssa_rename_from_initialize
PARAMS ((void));
static rtx ssa_rename_from_lookup
@ -974,6 +976,28 @@ rename_insn_1 (ptr, data)
}
}
static rtx
gen_sequence ()
{
rtx first_insn = get_insns ();
rtx result;
rtx tem;
int i;
int len;
/* Count the insns in the chain. */
len = 0;
for (tem = first_insn; tem; tem = NEXT_INSN (tem))
len++;
result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
XVECEXP (result, 0, i) = tem;
return result;
}
static void
rename_block (bb, idom)
int bb;
@ -1449,7 +1473,7 @@ eliminate_phi (e, reg_partition)
ephi_create (i, visited, pred, succ, nodes);
}
insn = gen_sequence ();
insn = get_insns ();
end_sequence ();
insert_insn_on_edge (insn, e);
if (rtl_dump_file)

16
gcc/stmt.c
View File

@ -899,7 +899,7 @@ expand_fixup (tree_label, rtl_label, last_insn)
NOTE_BLOCK (end) = block;
fixup->context = block;
end_sequence ();
emit_insns_after (start, original_before_jump);
emit_insn_after (start, original_before_jump);
}
fixup->block_start_count = current_block_start_count;
@ -1044,7 +1044,7 @@ fixup_gotos (thisblock, stack_level, cleanup_list, first_insn, dont_jump_in)
(*lang_hooks.decls.poplevel) (1, 0, 0);
end_sequence ();
emit_insns_after (cleanup_insns, f->before_jump);
emit_insn_after (cleanup_insns, f->before_jump);
f->before_jump = 0;
}
@ -1084,7 +1084,7 @@ fixup_gotos (thisblock, stack_level, cleanup_list, first_insn, dont_jump_in)
end_sequence ();
if (cleanup_insns != 0)
f->before_jump
= emit_insns_after (cleanup_insns, f->before_jump);
= emit_insn_after (cleanup_insns, f->before_jump);
f->cleanup_list_list = TREE_CHAIN (lists);
}
@ -3421,7 +3421,7 @@ expand_nl_handler_label (slot, before_insn)
emit_move_insn (slot, gen_rtx_LABEL_REF (Pmode, handler_label));
insns = get_insns ();
end_sequence ();
emit_insns_before (insns, before_insn);
emit_insn_before (insns, before_insn);
emit_label (handler_label);
@ -3508,7 +3508,7 @@ expand_nl_goto_receivers (thisblock)
emit_move_insn (save_receiver, XEXP (slot, 0));
insns = get_insns ();
end_sequence ();
emit_insns_before (insns, thisblock->data.block.first_insn);
emit_insn_before (insns, thisblock->data.block.first_insn);
}
/* Jump around the handlers; they run only when specially invoked. */
@ -3994,7 +3994,7 @@ expand_decl_cleanup (decl, cleanup)
end_sequence ();
thisblock->data.block.last_unconditional_cleanup
= emit_insns_after (set_flag_0,
= emit_insn_after (set_flag_0,
thisblock->data.block.last_unconditional_cleanup);
emit_move_insn (flag, const1_rtx);
@ -4036,8 +4036,8 @@ expand_decl_cleanup (decl, cleanup)
end_sequence ();
if (seq)
thisblock->data.block.last_unconditional_cleanup
= emit_insns_after (seq,
thisblock->data.block.last_unconditional_cleanup);
= emit_insn_after (seq,
thisblock->data.block.last_unconditional_cleanup);
}
else
{

14
gcc/unroll.c
View File

@ -1026,7 +1026,7 @@ unroll_loop (loop, insn_count, strength_reduce_p)
LABEL_NUSES (labels[0])++;
}
sequence = gen_sequence ();
sequence = get_insns ();
end_sequence ();
loop_insn_hoist (loop, sequence);
@ -1758,12 +1758,6 @@ copy_loop_body (loop, copy_start, copy_end, map, exit_label, last_iteration,
start_sequence ();
/* Emit a NOTE_INSN_DELETED to force at least two insns onto the sequence.
Else gen_sequence could return a raw pattern for a jump which we pass
off to emit_insn_before (instead of emit_jump_insn_before) which causes
a variety of losing behaviors later. */
emit_note (0, NOTE_INSN_DELETED);
insn = copy_start;
do
{
@ -2278,7 +2272,7 @@ copy_loop_body (loop, copy_start, copy_end, map, exit_label, last_iteration,
if (final_label && LABEL_NUSES (final_label) > 0)
emit_label (final_label);
tem = gen_sequence ();
tem = get_insns ();
end_sequence ();
loop_insn_emit_before (loop, 0, insert_before, tem);
}
@ -2956,7 +2950,7 @@ find_splittable_givs (loop, bl, unroll_type, increment, unroll_number)
ret = force_operand (v->new_reg, tem);
if (ret != tem)
emit_move_insn (tem, ret);
sequence = gen_sequence ();
sequence = get_insns ();
end_sequence ();
loop_insn_hoist (loop, sequence);
@ -3312,7 +3306,7 @@ final_giv_value (loop, v)
tem = expand_simple_binop (GET_MODE (tem), MINUS, tem,
biv->add_val, NULL_RTX, 0,
OPTAB_LIB_WIDEN);
seq = gen_sequence ();
seq = get_insns ();
end_sequence ();
loop_insn_sink (loop, seq);
}