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sparc.md (ldd peephole2s): For load peepholes pass the destination register as a parameter to... 

* config/sparc/sparc.md (ldd peephole2s): For load peepholes pass
        the destination register as a parameter to mems_ok_for_ldd_peep.
        For store peepholes pass NULL_RTX.  Move all volatile checks ...
        * config/sparc/sparc.c (mems_ok_for_ldd_peep): ... here.  Add a
        register parameter, check it's not the same as base for an address.
        * config/sparc/sparc-protos.h (mems_ok_for_ldd_peep): Update.

From-SVN: r48188
This commit is contained in:
Dan Nicolaescu 2001-12-19 15:00:39 -08:00 committed by Richard Henderson
parent 30fa7e3306
commit 303f89334b
4 changed files with 63 additions and 57 deletions
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9
gcc/ChangeLog
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@ -1,3 +1,12 @@
2001-12-19 Dan Nicolaescu <dann@ics.uci.edu>
* config/sparc/sparc.md (ldd peephole2s): For load peepholes pass
the destination register as a parameter to mems_ok_for_ldd_peep.
For store peepholes pass NULL_RTX. Move all volatile checks ...
* config/sparc/sparc.c (mems_ok_for_ldd_peep): ... here. Add a
register parameter, check it's not the same as base for an address.
* config/sparc/sparc-protos.h (mems_ok_for_ldd_peep): Update.
2001-12-19 Jakub Jelinek <jakub@redhat.com> 2001-12-19 Jakub Jelinek <jakub@redhat.com>
* config/ia64/ia64.c (ia64_single_set): Return first set for * config/ia64/ia64.c (ia64_single_set): Return first set for

2
gcc/config/sparc/sparc-protos.h
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@ -91,7 +91,7 @@ extern const char *output_sibcall PARAMS ((rtx, rtx));
extern char *output_v9branch PARAMS ((rtx, int, int, int, int, int, rtx)); extern char *output_v9branch PARAMS ((rtx, int, int, int, int, int, rtx));
extern void emit_v9_brxx_insn PARAMS ((enum rtx_code, rtx, rtx)); extern void emit_v9_brxx_insn PARAMS ((enum rtx_code, rtx, rtx));
extern void print_operand PARAMS ((FILE *, rtx, int)); extern void print_operand PARAMS ((FILE *, rtx, int));
extern int mems_ok_for_ldd_peep PARAMS ((rtx, rtx)); extern int mems_ok_for_ldd_peep PARAMS ((rtx, rtx, rtx));
extern int arith_double_4096_operand PARAMS ((rtx, enum machine_mode)); extern int arith_double_4096_operand PARAMS ((rtx, enum machine_mode));
extern int arith_4096_operand PARAMS ((rtx, enum machine_mode)); extern int arith_4096_operand PARAMS ((rtx, enum machine_mode));
extern int zero_operand PARAMS ((rtx, enum machine_mode)); extern int zero_operand PARAMS ((rtx, enum machine_mode));

29
gcc/config/sparc/sparc.c
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@ -5677,23 +5677,37 @@ registers_ok_for_ldd_peep (reg1, reg2)
This can only happen when addr1 and addr2, the addresses in mem1 This can only happen when addr1 and addr2, the addresses in mem1
and mem2, are consecutive memory locations (addr1 + 4 == addr2). and mem2, are consecutive memory locations (addr1 + 4 == addr2).
addr1 must also be aligned on a 64-bit boundary. */ addr1 must also be aligned on a 64-bit boundary.
Also iff dependent_reg_rtx is not null it should not be used to
compute the address for mem1, i.e. we cannot optimize a sequence
like:
ld [%o0], %o0
ld [%o0 + 4], %o1
to
ldd [%o0], o0
For stores we don't have a similar problem, so dependent_reg_rtx is
NULL_RTX. */
int int
mems_ok_for_ldd_peep (mem1, mem2) mems_ok_for_ldd_peep (mem1, mem2, dependent_reg_rtx)
rtx mem1, mem2; rtx mem1, mem2, dependent_reg_rtx;
{ {
rtx addr1, addr2; rtx addr1, addr2;
unsigned int reg1; unsigned int reg1;
int offset1; int offset1;
addr1 = XEXP (mem1, 0); /* The mems cannot be volatile. */
addr2 = XEXP (mem2, 0); if (MEM_VOLATILE_P (mem1) || MEM_VOLATILE_P (mem2))
return 0;
/* mem1 should be aligned on a 64-bit boundary */ /* MEM1 should be aligned on a 64-bit boundary. */
if (MEM_ALIGN (mem1) < 64) if (MEM_ALIGN (mem1) < 64)
return 0; return 0;
addr1 = XEXP (mem1, 0);
addr2 = XEXP (mem2, 0);
/* Extract a register number and offset (if used) from the first addr. */ /* Extract a register number and offset (if used) from the first addr. */
if (GET_CODE (addr1) == PLUS) if (GET_CODE (addr1) == PLUS)
{ {
@ -5729,6 +5743,9 @@ mems_ok_for_ldd_peep (mem1, mem2)
if (reg1 != REGNO (XEXP (addr2, 0))) if (reg1 != REGNO (XEXP (addr2, 0)))
return 0; return 0;
if (dependent_reg_rtx != NULL_RTX && reg1 == REGNO (dependent_reg_rtx))
return 0;
/* The first offset must be evenly divisible by 8 to ensure the /* The first offset must be evenly divisible by 8 to ensure the
address is 64 bit aligned. */ address is 64 bit aligned. */
if (offset1 % 8 != 0) if (offset1 % 8 != 0)

40
gcc/config/sparc/sparc.md
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@ -8923,9 +8923,7 @@
(set (match_operand:SI 1 "memory_operand" "") (set (match_operand:SI 1 "memory_operand" "")
(const_int 0))] (const_int 0))]
"TARGET_V9 "TARGET_V9
&& ! MEM_VOLATILE_P (operands[0]) && mems_ok_for_ldd_peep (operands[0], operands[1], NULL_RTX)"
&& ! MEM_VOLATILE_P (operands[1])
&& mems_ok_for_ldd_peep (operands[0], operands[1])"
[(set (match_dup 0) [(set (match_dup 0)
(const_int 0))] (const_int 0))]
"operands[0] = change_address (operands[0], DImode, NULL);") "operands[0] = change_address (operands[0], DImode, NULL);")
@ -8936,9 +8934,7 @@
(set (match_operand:SI 1 "memory_operand" "") (set (match_operand:SI 1 "memory_operand" "")
(const_int 0))] (const_int 0))]
"TARGET_V9 "TARGET_V9
&& ! MEM_VOLATILE_P (operands[0]) && mems_ok_for_ldd_peep (operands[1], operands[0], NULL_RTX)"
&& ! MEM_VOLATILE_P (operands[1])
&& mems_ok_for_ldd_peep (operands[1], operands[0])"
[(set (match_dup 1) [(set (match_dup 1)
(const_int 0))] (const_int 0))]
"operands[1] = change_address (operands[1], DImode, NULL);") "operands[1] = change_address (operands[1], DImode, NULL);")
@ -8949,9 +8945,7 @@
(set (match_operand:SI 2 "register_operand" "") (set (match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "memory_operand" ""))] (match_operand:SI 3 "memory_operand" ""))]
"registers_ok_for_ldd_peep (operands[0], operands[2]) "registers_ok_for_ldd_peep (operands[0], operands[2])
&& ! MEM_VOLATILE_P (operands[1]) && mems_ok_for_ldd_peep (operands[1], operands[3], operands[0])"
&& ! MEM_VOLATILE_P (operands[3])
&& mems_ok_for_ldd_peep (operands[1], operands[3])"
[(set (match_dup 0) [(set (match_dup 0)
(match_dup 1))] (match_dup 1))]
"operands[1] = change_address (operands[1], DImode, NULL); "operands[1] = change_address (operands[1], DImode, NULL);
@ -8963,9 +8957,7 @@
(set (match_operand:SI 2 "memory_operand" "") (set (match_operand:SI 2 "memory_operand" "")
(match_operand:SI 3 "register_operand" ""))] (match_operand:SI 3 "register_operand" ""))]
"registers_ok_for_ldd_peep (operands[1], operands[3]) "registers_ok_for_ldd_peep (operands[1], operands[3])
&& ! MEM_VOLATILE_P (operands[0]) && mems_ok_for_ldd_peep (operands[0], operands[2], NULL_RTX)"
&& ! MEM_VOLATILE_P (operands[2])
&& mems_ok_for_ldd_peep (operands[0], operands[2])"
[(set (match_dup 0) [(set (match_dup 0)
(match_dup 1))] (match_dup 1))]
"operands[0] = change_address (operands[0], DImode, NULL); "operands[0] = change_address (operands[0], DImode, NULL);
@ -8977,9 +8969,7 @@
(set (match_operand:SF 2 "register_operand" "") (set (match_operand:SF 2 "register_operand" "")
(match_operand:SF 3 "memory_operand" ""))] (match_operand:SF 3 "memory_operand" ""))]
"registers_ok_for_ldd_peep (operands[0], operands[2]) "registers_ok_for_ldd_peep (operands[0], operands[2])
&& ! MEM_VOLATILE_P (operands[1]) && mems_ok_for_ldd_peep (operands[1], operands[3], operands[0])"
&& ! MEM_VOLATILE_P (operands[3])
&& mems_ok_for_ldd_peep (operands[1], operands[3])"
[(set (match_dup 0) [(set (match_dup 0)
(match_dup 1))] (match_dup 1))]
"operands[1] = change_address (operands[1], DFmode, NULL); "operands[1] = change_address (operands[1], DFmode, NULL);
@ -8991,9 +8981,7 @@
(set (match_operand:SF 2 "memory_operand" "") (set (match_operand:SF 2 "memory_operand" "")
(match_operand:SF 3 "register_operand" ""))] (match_operand:SF 3 "register_operand" ""))]
"registers_ok_for_ldd_peep (operands[1], operands[3]) "registers_ok_for_ldd_peep (operands[1], operands[3])
&& ! MEM_VOLATILE_P (operands[0]) && mems_ok_for_ldd_peep (operands[0], operands[2], NULL_RTX)"
&& ! MEM_VOLATILE_P (operands[2])
&& mems_ok_for_ldd_peep (operands[0], operands[2])"
[(set (match_dup 0) [(set (match_dup 0)
(match_dup 1))] (match_dup 1))]
"operands[0] = change_address (operands[0], DFmode, NULL); "operands[0] = change_address (operands[0], DFmode, NULL);
@ -9005,9 +8993,7 @@
(set (match_operand:SI 2 "register_operand" "") (set (match_operand:SI 2 "register_operand" "")
(match_operand:SI 3 "memory_operand" ""))] (match_operand:SI 3 "memory_operand" ""))]
"registers_ok_for_ldd_peep (operands[2], operands[0]) "registers_ok_for_ldd_peep (operands[2], operands[0])
&& ! MEM_VOLATILE_P (operands[3]) && mems_ok_for_ldd_peep (operands[3], operands[1], operands[2])"
&& ! MEM_VOLATILE_P (operands[1])
&& mems_ok_for_ldd_peep (operands[3], operands[1])"
[(set (match_dup 2) [(set (match_dup 2)
(match_dup 3))] (match_dup 3))]
"operands[3] = change_address (operands[3], DImode, NULL); "operands[3] = change_address (operands[3], DImode, NULL);
@ -9019,9 +9005,7 @@
(set (match_operand:SI 2 "memory_operand" "") (set (match_operand:SI 2 "memory_operand" "")
(match_operand:SI 3 "register_operand" ""))] (match_operand:SI 3 "register_operand" ""))]
"registers_ok_for_ldd_peep (operands[3], operands[1]) "registers_ok_for_ldd_peep (operands[3], operands[1])
&& ! MEM_VOLATILE_P (operands[2]) && mems_ok_for_ldd_peep (operands[2], operands[0], NULL_RTX)"
&& ! MEM_VOLATILE_P (operands[0])
&& mems_ok_for_ldd_peep (operands[2], operands[0])"
[(set (match_dup 2) [(set (match_dup 2)
(match_dup 3))] (match_dup 3))]
"operands[2] = change_address (operands[2], DImode, NULL); "operands[2] = change_address (operands[2], DImode, NULL);
@ -9034,9 +9018,7 @@
(set (match_operand:SF 2 "register_operand" "") (set (match_operand:SF 2 "register_operand" "")
(match_operand:SF 3 "memory_operand" ""))] (match_operand:SF 3 "memory_operand" ""))]
"registers_ok_for_ldd_peep (operands[2], operands[0]) "registers_ok_for_ldd_peep (operands[2], operands[0])
&& ! MEM_VOLATILE_P (operands[3]) && mems_ok_for_ldd_peep (operands[3], operands[1], operands[2])"
&& ! MEM_VOLATILE_P (operands[1])
&& mems_ok_for_ldd_peep (operands[3], operands[1])"
[(set (match_dup 2) [(set (match_dup 2)
(match_dup 3))] (match_dup 3))]
"operands[3] = change_address (operands[3], DFmode, NULL); "operands[3] = change_address (operands[3], DFmode, NULL);
@ -9048,9 +9030,7 @@
(set (match_operand:SF 2 "memory_operand" "") (set (match_operand:SF 2 "memory_operand" "")
(match_operand:SF 3 "register_operand" ""))] (match_operand:SF 3 "register_operand" ""))]
"registers_ok_for_ldd_peep (operands[3], operands[1]) "registers_ok_for_ldd_peep (operands[3], operands[1])
&& ! MEM_VOLATILE_P (operands[2]) && mems_ok_for_ldd_peep (operands[2], operands[0], NULL_RTX)"
&& ! MEM_VOLATILE_P (operands[0])
&& mems_ok_for_ldd_peep (operands[2], operands[0])"
[(set (match_dup 2) [(set (match_dup 2)
(match_dup 3))] (match_dup 3))]
"operands[2] = change_address (operands[2], DFmode, NULL); "operands[2] = change_address (operands[2], DFmode, NULL);