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m68k.md (movsf_cf_soft): Provide the same non-mov3q alternatives as movsi_cf.

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gcc/
	* config/m68k/m68k.md (movsf_cf_soft): Provide the same non-mov3q
	alternatives as movsi_cf.
	(movsf_cf_hard): Add commentary.

From-SVN: r122606
This commit is contained in:
Richard Sandiford 2007-03-06 08:59:20 +00:00 committed by Richard Sandiford
parent a40ed0f310
commit 31c5b44477
2 changed files with 10 additions and 2 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2007-03-06 Richard Sandiford <richard@codesourcery.com>
* config/m68k/m68k.md (movsf_cf_soft): Provide the same non-mov3q
alternatives as movsi_cf.
(movsf_cf_hard): Add commentary.
2007-03-06 Kazu Hirata <kazu@codesourcery.com>
Richard Sandiford <richard@codesourcery.com>

6
gcc/config/m68k/m68k.md
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@ -860,13 +860,15 @@
})
(define_insn "movsf_cf_soft"
[(set (match_operand:SF 0 "nonimmediate_operand" "=r,g")
(match_operand:SF 1 "general_operand" "g,r"))]
[(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>,g,U")
(match_operand:SF 1 "general_operand" "g,r<Q>,U"))]
"TARGET_COLDFIRE && !TARGET_COLDFIRE_FPU"
{
return "move%.l %1,%0";
})
;; SFmode MEMs are restricted to modes 2-4 if TARGET_COLDFIRE_FPU.
;; The move instructions can handle all combinations.
(define_insn "movsf_cf_hard"
[(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>U, f, f,mr,f,r<Q>,f
,m")