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sparc.h (GENERAL_OR_I64, [...]): Remove.

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* config/sparc/sparc.h (GENERAL_OR_I64, REGISTER_MOVE_COST): Remove.
	* config/sparc/sparc.c (TARGET_REGISTER_MOVE_COST): Define.
	(general_or_i64_p, sparc_register_move_cost): New function.

From-SVN: r172732
This commit is contained in:
Anatoly Sokolov 2011-04-19 22:23:23 +04:00 committed by Anatoly Sokolov
parent 5ad7db5fa3
commit 32257ddc4e
3 changed files with 41 additions and 12 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2011-04-19 Anatoly Sokolov <aesok@post.ru>
* config/sparc/sparc.h (GENERAL_OR_I64, REGISTER_MOVE_COST): Remove.
* config/sparc/sparc.c (TARGET_REGISTER_MOVE_COST): Define.
(general_or_i64_p, sparc_register_move_cost): New function.
2011-04-19 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
* doc/install.texi (Configuration, --enable-threads): Remove mach.

35
gcc/config/sparc/sparc.c
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@ -422,6 +422,8 @@ static rtx sparc_tls_get_addr (void);
static rtx sparc_tls_got (void);
static const char *get_some_local_dynamic_name (void);
static int get_some_local_dynamic_name_1 (rtx *, void *);
static int sparc_register_move_cost (enum machine_mode,
reg_class_t, reg_class_t);
static bool sparc_rtx_costs (rtx, int, int, int *, bool);
static rtx sparc_function_value (const_tree, const_tree, bool);
static rtx sparc_libcall_value (enum machine_mode, const_rtx);
@ -560,6 +562,8 @@ static const struct default_options sparc_option_optimization_table[] =
#define TARGET_RTX_COSTS sparc_rtx_costs
#undef TARGET_ADDRESS_COST
#define TARGET_ADDRESS_COST hook_int_rtx_bool_0
#undef TARGET_REGISTER_MOVE_COST
#define TARGET_REGISTER_MOVE_COST sparc_register_move_cost
#undef TARGET_PROMOTE_FUNCTION_MODE
#define TARGET_PROMOTE_FUNCTION_MODE sparc_promote_function_mode
@ -9124,6 +9128,37 @@ sparc_rtx_costs (rtx x, int code, int outer_code, int *total,
}
}
/* Return true if CLASS is either GENERAL_REGS or I64_REGS. */
static inline bool
general_or_i64_p (reg_class_t rclass)
{
return (rclass == GENERAL_REGS || rclass == I64_REGS);
}
/* Implement TARGET_REGISTER_MOVE_COST. */
static int
sparc_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED,
reg_class_t from, reg_class_t to)
{
if ((FP_REG_CLASS_P (from) && general_or_i64_p (to))
|| (general_or_i64_p (from) && FP_REG_CLASS_P (to))
|| from == FPCC_REGS
|| to == FPCC_REGS)
{
if (sparc_cpu == PROCESSOR_ULTRASPARC
|| sparc_cpu == PROCESSOR_ULTRASPARC3
|| sparc_cpu == PROCESSOR_NIAGARA
|| sparc_cpu == PROCESSOR_NIAGARA2)
return 12;
return 6;
}
return 2;
}
/* Emit the sequence of insns SEQ while preserving the registers REG and REG2.
This is achieved by means of a manual dynamic stack space allocation in
the current frame. We make the assumption that SEQ doesn't contain any

12
gcc/config/sparc/sparc.h
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@ -1715,18 +1715,6 @@ do { \
#define DITF_CONVERSION_LIBFUNCS 0
#define SUN_INTEGER_MULTIPLY_64 0
/* Compute extra cost of moving data between one register class
and another. */
#define GENERAL_OR_I64(C) ((C) == GENERAL_REGS || (C) == I64_REGS)
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
(((FP_REG_CLASS_P (CLASS1) && GENERAL_OR_I64 (CLASS2)) \
|| (GENERAL_OR_I64 (CLASS1) && FP_REG_CLASS_P (CLASS2)) \
|| (CLASS1) == FPCC_REGS || (CLASS2) == FPCC_REGS) \
? ((sparc_cpu == PROCESSOR_ULTRASPARC \
|| sparc_cpu == PROCESSOR_ULTRASPARC3 \
|| sparc_cpu == PROCESSOR_NIAGARA \
|| sparc_cpu == PROCESSOR_NIAGARA2) ? 12 : 6) : 2)
/* Provide the cost of a branch. For pre-v9 processors we use
a value of 3 to take into account the potential annulling of
the delay slot (which ends up being a bubble in the pipeline slot)