re PR middle-end/18641 (Another ICE caused by reload of a pseudo reg into f0 for a DImode expr)
2004-12-11 David Edelsohn <edelsohn@gnu.org> Ulrich Weigand <uweigand@de.ibm.com> PR target/18641 * config/rs6000/darwin.h (PREFERRED_RELOAD_CLASS): Reload all constants into all register classes intersecting with FLOAT_REGS via memory. * config/rs6000/rs6000.h (PREFERRED_RELOAD_CLASS): Same. * config/rs6000/rs6000.md (movdi_internal32): Ignore FPRs when choosing register preferences. (movdi_internal64): Same. Co-Authored-By: Ulrich Weigand <uweigand@de.ibm.com> From-SVN: r92032
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@ -1,3 +1,15 @@
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2004-12-11 David Edelsohn <edelsohn@gnu.org>
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Ulrich Weigand <uweigand@de.ibm.com>
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PR target/18641
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* config/rs6000/darwin.h (PREFERRED_RELOAD_CLASS): Reload all
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constants into all register classes intersecting with FLOAT_REGS
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via memory.
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* config/rs6000/rs6000.h (PREFERRED_RELOAD_CLASS): Same.
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* config/rs6000/rs6000.md (movdi_internal32): Ignore FPRs when
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choosing register preferences.
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(movdi_internal64): Same.
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2004-12-11 Kazu Hirata <kazu@cs.umass.edu>
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* tree-into-ssa.c (rewrite_ssa_into_ssa): Free SSA_NAME_AUX
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@ -342,8 +342,8 @@ do { \
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#undef PREFERRED_RELOAD_CLASS
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#define PREFERRED_RELOAD_CLASS(X,CLASS) \
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((GET_CODE (X) == CONST_DOUBLE \
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&& GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
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((CONSTANT_P (X) \
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&& reg_classes_intersect_p ((CLASS), FLOAT_REGS)) \
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? NO_REGS \
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: ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == HIGH) \
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&& reg_class_subset_p (BASE_REGS, (CLASS))) \
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@ -1397,13 +1397,13 @@ enum reg_class
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*/
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#define PREFERRED_RELOAD_CLASS(X,CLASS) \
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(((GET_CODE (X) == CONST_DOUBLE \
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&& GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
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? NO_REGS \
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: (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
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&& (CLASS) == NON_SPECIAL_REGS) \
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? GENERAL_REGS \
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: (CLASS)))
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((CONSTANT_P (X) \
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&& reg_classes_intersect_p ((CLASS), FLOAT_REGS)) \
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? NO_REGS \
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: (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
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&& (CLASS) == NON_SPECIAL_REGS) \
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? GENERAL_REGS \
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: (CLASS))
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/* Return the register class of a scratch register needed to copy IN into
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or out of a register in CLASS in MODE. If it can be done directly,
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@ -8496,7 +8496,7 @@
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; List r->r after r->"o<>", otherwise reload will try to reload a
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; non-offsettable address by using r->r which won't make progress.
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(define_insn "*movdi_internal32"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=o<>,r,r,f,f,m,r")
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[(set (match_operand:DI 0 "nonimmediate_operand" "=o<>,r,r,*f,*f,m,r")
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(match_operand:DI 1 "input_operand" "r,r,m,f,m,f,IJKnGHF"))]
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"! TARGET_POWERPC64
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&& (gpc_reg_operand (operands[0], DImode)
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@ -8567,7 +8567,7 @@
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}")
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(define_insn "*movdi_internal64"
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,m,r,r,r,r,??f,f,m,r,*h,*h")
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[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,m,r,r,r,r,*f,*f,m,r,*h,*h")
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(match_operand:DI 1 "input_operand" "r,m,r,I,L,nF,R,f,m,f,*h,r,0"))]
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"TARGET_POWERPC64
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&& (gpc_reg_operand (operands[0], DImode)
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