backport: re PR target/80210 (ICE in in extract_insn, at recog.c:2311 on ppc64 for with __builtin_pow)

gcc/
	Backport from mainline
	2017-10-02  Peter Bergner  <bergner@vnet.ibm.com>

	PR target/80210
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Rewrite
	function to not use the have_cpu variable.  Do not set cpu_index,
	rs6000_cpu_index or rs6000_tune_index if we end up using TARGET_DEFAULT
	or the default cpu.
	(rs6000_valid_attribute_p): Remove duplicate initializations of
	old_optimize and func_optimize.
	(rs6000_pragma_target_parse): Call rs6000_activate_target_options ().
	(rs6000_activate_target_options): Make global.
	* config/rs6000/rs6000-protos.h (rs6000_activate_target_options): Add
	prototype.

gcc/testsuite/
	Backport from mainline
	2017-10-02  Peter Bergner  <bergner@vnet.ibm.com>

	PR target/80210
	* gcc.target/powerpc/pr80210-2.c: New test.

From-SVN: r255655
This commit is contained in:
Peter Bergner 2017-12-14 11:43:32 -06:00 committed by Peter Bergner
parent 31ceab27a8
commit 34f5d7982a
5 changed files with 93 additions and 88 deletions

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@ -1,3 +1,20 @@
2017-12-14 Peter Bergner <bergner@vnet.ibm.com>
Backport from mainline
2017-10-02 Peter Bergner <bergner@vnet.ibm.com>
PR target/80210
* config/rs6000/rs6000.c (rs6000_option_override_internal): Rewrite
function to not use the have_cpu variable. Do not set cpu_index,
rs6000_cpu_index or rs6000_tune_index if we end up using TARGET_DEFAULT
or the default cpu.
(rs6000_valid_attribute_p): Remove duplicate initializations of
old_optimize and func_optimize.
(rs6000_pragma_target_parse): Call rs6000_activate_target_options ().
(rs6000_activate_target_options): Make global.
* config/rs6000/rs6000-protos.h (rs6000_activate_target_options): Add
prototype.
2017-12-13 Peter Bergner <bergner@vnet.ibm.com>
Backport from mainline

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@ -240,6 +240,7 @@ extern void rs6000_cpu_cpp_builtins (struct cpp_reader *);
#ifdef TREE_CODE
extern bool rs6000_pragma_target_parse (tree, tree);
#endif
extern void rs6000_activate_target_options (tree new_tree);
extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT, HOST_WIDE_INT);
extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT,
HOST_WIDE_INT);

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@ -3985,14 +3985,10 @@ static bool
rs6000_option_override_internal (bool global_init_p)
{
bool ret = true;
bool have_cpu = false;
/* The default cpu requested at configure time, if any. */
const char *implicit_cpu = OPTION_TARGET_CPU_DEFAULT;
HOST_WIDE_INT set_masks;
HOST_WIDE_INT ignore_masks;
int cpu_index;
int cpu_index = -1;
int tune_index;
struct cl_target_option *main_target_opt
= ((global_init_p || target_option_default_node == NULL)
@ -4070,93 +4066,51 @@ rs6000_option_override_internal (bool global_init_p)
with -mtune on the command line. Process a '--with-cpu' configuration
request as an implicit --cpu. */
if (rs6000_cpu_index >= 0)
{
cpu_index = rs6000_cpu_index;
have_cpu = true;
}
cpu_index = rs6000_cpu_index;
else if (main_target_opt != NULL && main_target_opt->x_rs6000_cpu_index >= 0)
{
rs6000_cpu_index = cpu_index = main_target_opt->x_rs6000_cpu_index;
have_cpu = true;
}
else if (implicit_cpu)
{
rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (implicit_cpu);
have_cpu = true;
}
else
{
/* PowerPC 64-bit LE requires at least ISA 2.07. */
const char *default_cpu = ((!TARGET_POWERPC64)
? "powerpc"
: ((BYTES_BIG_ENDIAN)
? "powerpc64"
: "powerpc64le"));
cpu_index = main_target_opt->x_rs6000_cpu_index;
else if (OPTION_TARGET_CPU_DEFAULT)
cpu_index = rs6000_cpu_name_lookup (OPTION_TARGET_CPU_DEFAULT);
rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
have_cpu = false;
}
gcc_assert (cpu_index >= 0);
if (have_cpu)
if (cpu_index >= 0)
{
#ifndef HAVE_AS_POWER9
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER9)
const char *unavailable_cpu = NULL;
switch (processor_target_table[cpu_index].processor)
{
have_cpu = false;
warning (0, "will not generate power9 instructions because "
"assembler lacks power9 support");
}
#ifndef HAVE_AS_POWER9
case PROCESSOR_POWER9:
unavailable_cpu = "power9";
break;
#endif
#ifndef HAVE_AS_POWER8
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER8)
{
have_cpu = false;
warning (0, "will not generate power8 instructions because "
"assembler lacks power8 support");
}
case PROCESSOR_POWER8:
unavailable_cpu = "power8";
break;
#endif
#ifndef HAVE_AS_POPCNTD
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER7)
{
have_cpu = false;
warning (0, "will not generate power7 instructions because "
"assembler lacks power7 support");
}
case PROCESSOR_POWER7:
unavailable_cpu = "power7";
break;
#endif
#ifndef HAVE_AS_DFP
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER6)
{
have_cpu = false;
warning (0, "will not generate power6 instructions because "
"assembler lacks power6 support");
}
case PROCESSOR_POWER6:
unavailable_cpu = "power6";
break;
#endif
#ifndef HAVE_AS_POPCNTB
if (processor_target_table[rs6000_cpu_index].processor
== PROCESSOR_POWER5)
{
have_cpu = false;
warning (0, "will not generate power5 instructions because "
"assembler lacks power5 support");
}
case PROCESSOR_POWER5:
unavailable_cpu = "power5";
break;
#endif
if (!have_cpu)
default:
break;
}
if (unavailable_cpu)
{
/* PowerPC 64-bit LE requires at least ISA 2.07. */
const char *default_cpu = (!TARGET_POWERPC64
? "powerpc"
: (BYTES_BIG_ENDIAN
? "powerpc64"
: "powerpc64le"));
rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
cpu_index = -1;
warning (0, "will not generate %qs instructions because "
"assembler lacks %qs support", unavailable_cpu,
unavailable_cpu);
}
}
@ -4165,8 +4119,9 @@ rs6000_option_override_internal (bool global_init_p)
with those from the cpu, except for options that were explicitly set. If
we don't have a cpu, do not override the target bits set in
TARGET_DEFAULT. */
if (have_cpu)
if (cpu_index >= 0)
{
rs6000_cpu_index = cpu_index;
rs6000_isa_flags &= ~set_masks;
rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
& set_masks);
@ -4180,14 +4135,26 @@ rs6000_option_override_internal (bool global_init_p)
If there is a TARGET_DEFAULT, use that. Otherwise fall back to using
-mcpu=powerpc, -mcpu=powerpc64, or -mcpu=powerpc64le defaults. */
HOST_WIDE_INT flags = ((TARGET_DEFAULT) ? TARGET_DEFAULT
: processor_target_table[cpu_index].target_enable);
HOST_WIDE_INT flags;
if (TARGET_DEFAULT)
flags = TARGET_DEFAULT;
else
{
/* PowerPC 64-bit LE requires at least ISA 2.07. */
const char *default_cpu = (!TARGET_POWERPC64
? "powerpc"
: (BYTES_BIG_ENDIAN
? "powerpc64"
: "powerpc64le"));
int default_cpu_index = rs6000_cpu_name_lookup (default_cpu);
flags = processor_target_table[default_cpu_index].target_enable;
}
rs6000_isa_flags |= (flags & ~rs6000_isa_flags_explicit);
}
if (rs6000_tune_index >= 0)
tune_index = rs6000_tune_index;
else if (have_cpu)
else if (cpu_index >= 0)
rs6000_tune_index = tune_index = cpu_index;
else
{
@ -4199,7 +4166,7 @@ rs6000_option_override_internal (bool global_init_p)
for (i = 0; i < ARRAY_SIZE (processor_target_table); i++)
if (processor_target_table[i].processor == tune_proc)
{
rs6000_tune_index = tune_index = i;
tune_index = i;
break;
}
}
@ -4372,7 +4339,7 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags |= (ISA_3_0_MASKS_SERVER & ~ignore_masks);
else if (TARGET_P9_MINMAX)
{
if (have_cpu)
if (cpu_index >= 0)
{
if (cpu_index == PROCESSOR_POWER9)
{
@ -5122,7 +5089,7 @@ rs6000_option_override_internal (bool global_init_p)
default:
if (have_cpu && !(rs6000_isa_flags_explicit & OPTION_MASK_ISEL))
if (cpu_index >= 0 && !(rs6000_isa_flags_explicit & OPTION_MASK_ISEL))
rs6000_isa_flags &= ~OPTION_MASK_ISEL;
break;
@ -39475,9 +39442,9 @@ rs6000_valid_attribute_p (tree fndecl,
{
struct cl_target_option cur_target;
bool ret;
tree old_optimize = build_optimization_node (&global_options);
tree old_optimize;
tree new_target, new_optimize;
tree func_optimize = DECL_FUNCTION_SPECIFIC_OPTIMIZATION (fndecl);
tree func_optimize;
gcc_assert ((fndecl != NULL_TREE) && (args != NULL_TREE));
@ -39604,6 +39571,7 @@ rs6000_pragma_target_parse (tree args, tree pop_target)
}
target_option_current_node = cur_tree;
rs6000_activate_target_options (target_option_current_node);
/* If we have the preprocessor linked in (i.e. C or C++ languages), possibly
change the macros that are defined. */
@ -39644,7 +39612,7 @@ static GTY(()) tree rs6000_previous_fndecl;
/* Restore target's globals from NEW_TREE and invalidate the
rs6000_previous_fndecl cache. */
static void
void
rs6000_activate_target_options (tree new_tree)
{
cl_target_option_restore (&global_options, TREE_TARGET_OPTION (new_tree));

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@ -1,3 +1,11 @@
2017-12-14 Peter Bergner <bergner@vnet.ibm.com>
Backport from mainline
2017-10-02 Peter Bergner <bergner@vnet.ibm.com>
PR target/80210
* gcc.target/powerpc/pr80210-2.c: New test.
2017-12-14 Eric Botcazou <ebotcazou@adacore.com>
* gnat.dg/alignment13.adb: New test.

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@ -0,0 +1,11 @@
/* Test for ICE arising from GCC target pragma. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
#pragma GCC target "no-powerpc-gpopt"
double
foo (double a)
{
return __builtin_sqrt (a);
}
/* { dg-final { scan-assembler-not "fsqrt" } } */